2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
43 #define VG(x) ((void)0)
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
61 #include "fdl/freedreno_layout.h"
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
66 /* Pre-declarations needed for WSI entrypoints */
69 typedef struct xcb_connection_t xcb_connection_t
;
70 typedef uint32_t xcb_visualid_t
;
71 typedef uint32_t xcb_window_t
;
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
78 #include "tu_entrypoints.h"
81 #define MAX_VERTEX_ATTRIBS 32
83 #define MAX_VSC_PIPES 32
84 #define MAX_VIEWPORTS 1
85 #define MAX_SCISSORS 16
86 #define MAX_DISCARD_RECTANGLES 4
87 #define MAX_PUSH_CONSTANTS_SIZE 128
88 #define MAX_PUSH_DESCRIPTORS 32
89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
91 #define MAX_DYNAMIC_BUFFERS \
92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
93 #define MAX_SAMPLES_LOG2 4
94 #define NUM_META_FS_KEYS 13
95 #define TU_MAX_DRM_DEVICES 8
97 /* The Qualcomm driver exposes 0x20000058 */
98 #define MAX_STORAGE_BUFFER_RANGE 0x20000000
100 #define NUM_DEPTH_CLEAR_PIPELINES 3
103 * This is the point we switch from using CP to compute shader
104 * for certain buffer operations.
106 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
108 #define A6XX_TEX_CONST_DWORDS 16
109 #define A6XX_TEX_SAMP_DWORDS 4
114 TU_MEM_HEAP_VRAM_CPU_ACCESS
,
122 TU_MEM_TYPE_GTT_WRITE_COMBINE
,
123 TU_MEM_TYPE_VRAM_CPU_ACCESS
,
124 TU_MEM_TYPE_GTT_CACHED
,
128 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
130 static inline uint32_t
131 align_u32(uint32_t v
, uint32_t a
)
133 assert(a
!= 0 && a
== (a
& -a
));
134 return (v
+ a
- 1) & ~(a
- 1);
137 static inline uint32_t
138 align_u32_npot(uint32_t v
, uint32_t a
)
140 return (v
+ a
- 1) / a
* a
;
143 static inline uint64_t
144 align_u64(uint64_t v
, uint64_t a
)
146 assert(a
!= 0 && a
== (a
& -a
));
147 return (v
+ a
- 1) & ~(a
- 1);
150 static inline int32_t
151 align_i32(int32_t v
, int32_t a
)
153 assert(a
!= 0 && a
== (a
& -a
));
154 return (v
+ a
- 1) & ~(a
- 1);
157 /** Alignment must be a power of 2. */
159 tu_is_aligned(uintmax_t n
, uintmax_t a
)
161 assert(a
== (a
& -a
));
162 return (n
& (a
- 1)) == 0;
165 static inline uint32_t
166 round_up_u32(uint32_t v
, uint32_t a
)
168 return (v
+ a
- 1) / a
;
171 static inline uint64_t
172 round_up_u64(uint64_t v
, uint64_t a
)
174 return (v
+ a
- 1) / a
;
177 static inline uint32_t
178 tu_minify(uint32_t n
, uint32_t levels
)
180 if (unlikely(n
== 0))
183 return MAX2(n
>> levels
, 1);
186 tu_clamp_f(float f
, float min
, float max
)
199 tu_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
201 if (*inout_mask
& clear_mask
) {
202 *inout_mask
&= ~clear_mask
;
209 #define for_each_bit(b, dword) \
210 for (uint32_t __dword = (dword); \
211 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
213 #define typed_memcpy(dest, src, count) \
215 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
216 memcpy((dest), (src), (count) * sizeof(*(src))); \
219 #define COND(bool, val) ((bool) ? (val) : 0)
221 /* Whenever we generate an error, pass it through this function. Useful for
222 * debugging, where we can break on it. Only call at error site, not when
223 * propagating errors. Might be useful to plug in a stack trace here.
229 __vk_errorf(struct tu_instance
*instance
,
236 #define vk_error(instance, error) \
237 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
238 #define vk_errorf(instance, error, format, ...) \
239 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
242 __tu_finishme(const char *file
, int line
, const char *format
, ...)
245 tu_loge(const char *format
, ...) tu_printflike(1, 2);
247 tu_loge_v(const char *format
, va_list va
);
249 tu_logi(const char *format
, ...) tu_printflike(1, 2);
251 tu_logi_v(const char *format
, va_list va
);
254 * Print a FINISHME message, including its source location.
256 #define tu_finishme(format, ...) \
258 static bool reported = false; \
260 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
265 /* A non-fatal assert. Useful for debugging. */
267 #define tu_assert(x) \
269 if (unlikely(!(x))) \
270 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
276 /* Suppress -Wunused in stub functions */
277 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
279 __tu_use_args(int ignore
, ...)
285 tu_finishme("stub %s", __func__); \
289 tu_lookup_entrypoint_unchecked(const char *name
);
291 tu_lookup_entrypoint_checked(
293 uint32_t core_version
,
294 const struct tu_instance_extension_table
*instance
,
295 const struct tu_device_extension_table
*device
);
297 struct tu_physical_device
299 VK_LOADER_DATA _loader_data
;
301 struct tu_instance
*instance
;
304 char name
[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE
];
305 uint8_t driver_uuid
[VK_UUID_SIZE
];
306 uint8_t device_uuid
[VK_UUID_SIZE
];
307 uint8_t cache_uuid
[VK_UUID_SIZE
];
309 struct wsi_device wsi_device
;
316 uint32_t tile_align_w
;
317 uint32_t tile_align_h
;
319 /* This is the drivers on-disk cache used as a fallback as opposed to
320 * the pipeline cache defined by apps.
322 struct disk_cache
*disk_cache
;
324 struct tu_device_extension_table supported_extensions
;
329 TU_DEBUG_STARTUP
= 1 << 0,
330 TU_DEBUG_NIR
= 1 << 1,
331 TU_DEBUG_IR3
= 1 << 2,
332 TU_DEBUG_NOBIN
= 1 << 3,
337 VK_LOADER_DATA _loader_data
;
339 VkAllocationCallbacks alloc
;
341 uint32_t api_version
;
342 int physical_device_count
;
343 struct tu_physical_device physical_devices
[TU_MAX_DRM_DEVICES
];
345 enum tu_debug_flags debug_flags
;
347 struct vk_debug_report_instance debug_report_callbacks
;
349 struct tu_instance_extension_table enabled_extensions
;
353 tu_wsi_init(struct tu_physical_device
*physical_device
);
355 tu_wsi_finish(struct tu_physical_device
*physical_device
);
358 tu_instance_extension_supported(const char *name
);
360 tu_physical_device_api_version(struct tu_physical_device
*dev
);
362 tu_physical_device_extension_supported(struct tu_physical_device
*dev
,
367 struct tu_pipeline_cache
369 struct tu_device
*device
;
370 pthread_mutex_t mutex
;
374 uint32_t kernel_count
;
375 struct cache_entry
**hash_table
;
378 VkAllocationCallbacks alloc
;
381 struct tu_pipeline_key
386 tu_pipeline_cache_init(struct tu_pipeline_cache
*cache
,
387 struct tu_device
*device
);
389 tu_pipeline_cache_finish(struct tu_pipeline_cache
*cache
);
391 tu_pipeline_cache_load(struct tu_pipeline_cache
*cache
,
395 struct tu_shader_variant
;
398 tu_create_shader_variants_from_pipeline_cache(
399 struct tu_device
*device
,
400 struct tu_pipeline_cache
*cache
,
401 const unsigned char *sha1
,
402 struct tu_shader_variant
**variants
);
405 tu_pipeline_cache_insert_shaders(struct tu_device
*device
,
406 struct tu_pipeline_cache
*cache
,
407 const unsigned char *sha1
,
408 struct tu_shader_variant
**variants
,
409 const void *const *codes
,
410 const unsigned *code_sizes
);
414 VkAllocationCallbacks alloc
;
416 struct tu_pipeline_cache cache
;
420 #define TU_QUEUE_GENERAL 0
422 #define TU_MAX_QUEUE_FAMILIES 1
426 struct wsi_fence
*fence_wsi
;
432 tu_fence_init(struct tu_fence
*fence
, bool signaled
);
434 tu_fence_finish(struct tu_fence
*fence
);
436 tu_fence_update_fd(struct tu_fence
*fence
, int fd
);
438 tu_fence_copy(struct tu_fence
*fence
, const struct tu_fence
*src
);
440 tu_fence_signal(struct tu_fence
*fence
);
442 tu_fence_wait_idle(struct tu_fence
*fence
);
446 VK_LOADER_DATA _loader_data
;
447 struct tu_device
*device
;
448 uint32_t queue_family_index
;
450 VkDeviceQueueCreateFlags flags
;
452 uint32_t msm_queue_id
;
453 struct tu_fence submit_fence
;
458 VK_LOADER_DATA _loader_data
;
460 VkAllocationCallbacks alloc
;
462 struct tu_instance
*instance
;
464 struct tu_meta_state meta_state
;
466 struct tu_queue
*queues
[TU_MAX_QUEUE_FAMILIES
];
467 int queue_count
[TU_MAX_QUEUE_FAMILIES
];
469 struct tu_physical_device
*physical_device
;
471 struct ir3_compiler
*compiler
;
473 /* Backup in-memory cache to be used if the app doesn't provide one */
474 struct tu_pipeline_cache
*mem_cache
;
476 struct list_head shader_slabs
;
477 mtx_t shader_slab_mutex
;
479 struct tu_device_extension_table enabled_extensions
;
491 tu_bo_init_new(struct tu_device
*dev
, struct tu_bo
*bo
, uint64_t size
);
493 tu_bo_init_dmabuf(struct tu_device
*dev
,
498 tu_bo_export_dmabuf(struct tu_device
*dev
, struct tu_bo
*bo
);
500 tu_bo_finish(struct tu_device
*dev
, struct tu_bo
*bo
);
502 tu_bo_map(struct tu_device
*dev
, struct tu_bo
*bo
);
507 const struct tu_bo
*bo
;
513 struct ts_cs_memory
{
522 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
523 * is full. tu_cs_begin must be called before command packet emission and
524 * tu_cs_end must be called after.
526 * This mode may create multiple entries internally. The entries must be
527 * submitted together.
532 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
533 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
536 * This mode does not create any entry or any BO.
541 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
542 * command packet emission. tu_cs_begin_sub_stream must be called to get a
543 * sub-stream to emit comamnd packets to. When done with the sub-stream,
544 * tu_cs_end_sub_stream must be called.
546 * This mode does not create any entry internally.
548 TU_CS_MODE_SUB_STREAM
,
555 uint32_t *reserved_end
;
558 enum tu_cs_mode mode
;
559 uint32_t next_bo_size
;
561 struct tu_cs_entry
*entries
;
562 uint32_t entry_count
;
563 uint32_t entry_capacity
;
567 uint32_t bo_capacity
;
570 struct tu_device_memory
575 /* for dedicated allocations */
576 struct tu_image
*image
;
577 struct tu_buffer
*buffer
;
584 struct tu_descriptor_range
590 struct tu_descriptor_set
592 const struct tu_descriptor_set_layout
*layout
;
596 uint32_t *mapped_ptr
;
597 struct tu_descriptor_range
*dynamic_descriptors
;
599 struct tu_bo
*descriptors
[0];
602 struct tu_push_descriptor_set
604 struct tu_descriptor_set set
;
608 struct tu_descriptor_pool_entry
612 struct tu_descriptor_set
*set
;
615 struct tu_descriptor_pool
618 uint64_t current_offset
;
621 uint8_t *host_memory_base
;
622 uint8_t *host_memory_ptr
;
623 uint8_t *host_memory_end
;
625 uint32_t entry_count
;
626 uint32_t max_entry_count
;
627 struct tu_descriptor_pool_entry entries
[0];
630 struct tu_descriptor_update_template_entry
632 VkDescriptorType descriptor_type
;
634 /* The number of descriptors to update */
635 uint32_t descriptor_count
;
637 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
641 /* In dwords. Not valid/used for dynamic descriptors */
644 uint32_t buffer_offset
;
646 /* Only valid for combined image samplers and samplers */
647 uint16_t has_sampler
;
653 /* For push descriptors */
654 const uint32_t *immutable_samplers
;
657 struct tu_descriptor_update_template
659 uint32_t entry_count
;
660 VkPipelineBindPoint bind_point
;
661 struct tu_descriptor_update_template_entry entry
[0];
668 VkBufferUsageFlags usage
;
669 VkBufferCreateFlags flags
;
672 VkDeviceSize bo_offset
;
675 static inline uint64_t
676 tu_buffer_iova(struct tu_buffer
*buffer
)
678 return buffer
->bo
->iova
+ buffer
->bo_offset
;
681 enum tu_dynamic_state_bits
683 TU_DYNAMIC_VIEWPORT
= 1 << 0,
684 TU_DYNAMIC_SCISSOR
= 1 << 1,
685 TU_DYNAMIC_LINE_WIDTH
= 1 << 2,
686 TU_DYNAMIC_DEPTH_BIAS
= 1 << 3,
687 TU_DYNAMIC_BLEND_CONSTANTS
= 1 << 4,
688 TU_DYNAMIC_DEPTH_BOUNDS
= 1 << 5,
689 TU_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6,
690 TU_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7,
691 TU_DYNAMIC_STENCIL_REFERENCE
= 1 << 8,
692 TU_DYNAMIC_DISCARD_RECTANGLE
= 1 << 9,
693 TU_DYNAMIC_ALL
= (1 << 10) - 1,
696 struct tu_vertex_binding
698 struct tu_buffer
*buffer
;
702 struct tu_viewport_state
705 VkViewport viewports
[MAX_VIEWPORTS
];
708 struct tu_scissor_state
711 VkRect2D scissors
[MAX_SCISSORS
];
714 struct tu_discard_rectangle_state
717 VkRect2D rectangles
[MAX_DISCARD_RECTANGLES
];
720 struct tu_dynamic_state
723 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
724 * Defines the set of saved dynamic state.
728 struct tu_viewport_state viewport
;
730 struct tu_scissor_state scissor
;
741 float blend_constants
[4];
753 } stencil_compare_mask
;
759 } stencil_write_mask
;
767 struct tu_discard_rectangle_state discard_rectangle
;
770 extern const struct tu_dynamic_state default_dynamic_state
;
773 tu_get_debug_option_name(int id
);
776 tu_get_perftest_option_name(int id
);
778 struct tu_descriptor_state
780 struct tu_descriptor_set
*sets
[MAX_SETS
];
783 struct tu_push_descriptor_set push_set
;
785 uint64_t dynamic_buffers
[MAX_DYNAMIC_BUFFERS
];
796 struct tu_tiling_config
798 VkRect2D render_area
;
800 /* position and size of the first tile */
802 /* number of tiles */
803 VkExtent2D tile_count
;
805 /* size of the first VSC pipe */
807 /* number of VSC pipes */
808 VkExtent2D pipe_count
;
810 /* pipe register values */
811 uint32_t pipe_config
[MAX_VSC_PIPES
];
812 uint32_t pipe_sizes
[MAX_VSC_PIPES
];
815 enum tu_cmd_dirty_bits
817 TU_CMD_DIRTY_PIPELINE
= 1 << 0,
818 TU_CMD_DIRTY_COMPUTE_PIPELINE
= 1 << 1,
819 TU_CMD_DIRTY_VERTEX_BUFFERS
= 1 << 2,
820 TU_CMD_DIRTY_DESCRIPTOR_SETS
= 1 << 3,
821 TU_CMD_DIRTY_PUSH_CONSTANTS
= 1 << 4,
823 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 16,
824 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 17,
825 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 18,
826 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 19,
833 struct tu_pipeline
*pipeline
;
834 struct tu_pipeline
*compute_pipeline
;
839 struct tu_buffer
*buffers
[MAX_VBS
];
840 VkDeviceSize offsets
[MAX_VBS
];
843 struct tu_dynamic_state dynamic
;
846 struct tu_buffer
*index_buffer
;
847 uint64_t index_offset
;
849 uint32_t max_index_count
;
852 const struct tu_render_pass
*pass
;
853 const struct tu_subpass
*subpass
;
854 const struct tu_framebuffer
*framebuffer
;
856 struct tu_tiling_config tiling_config
;
858 struct tu_cs_entry tile_load_ib
;
859 struct tu_cs_entry tile_store_ib
;
864 VkAllocationCallbacks alloc
;
865 struct list_head cmd_buffers
;
866 struct list_head free_cmd_buffers
;
867 uint32_t queue_family_index
;
870 struct tu_cmd_buffer_upload
875 struct list_head list
;
878 enum tu_cmd_buffer_status
880 TU_CMD_BUFFER_STATUS_INVALID
,
881 TU_CMD_BUFFER_STATUS_INITIAL
,
882 TU_CMD_BUFFER_STATUS_RECORDING
,
883 TU_CMD_BUFFER_STATUS_EXECUTABLE
,
884 TU_CMD_BUFFER_STATUS_PENDING
,
891 struct drm_msm_gem_submit_bo
*bo_infos
;
894 #define TU_BO_LIST_FAILED (~0)
897 tu_bo_list_init(struct tu_bo_list
*list
);
899 tu_bo_list_destroy(struct tu_bo_list
*list
);
901 tu_bo_list_reset(struct tu_bo_list
*list
);
903 tu_bo_list_add(struct tu_bo_list
*list
,
904 const struct tu_bo
*bo
,
907 tu_bo_list_merge(struct tu_bo_list
*list
, const struct tu_bo_list
*other
);
911 VK_LOADER_DATA _loader_data
;
913 struct tu_device
*device
;
915 struct tu_cmd_pool
*pool
;
916 struct list_head pool_link
;
918 VkCommandBufferUsageFlags usage_flags
;
919 VkCommandBufferLevel level
;
920 enum tu_cmd_buffer_status status
;
922 struct tu_cmd_state state
;
923 struct tu_vertex_binding vertex_bindings
[MAX_VBS
];
924 uint32_t queue_family_index
;
926 uint32_t push_constants
[MAX_PUSH_CONSTANTS_SIZE
/ 4];
927 VkShaderStageFlags push_constant_stages
;
928 struct tu_descriptor_set meta_push_descriptors
;
930 struct tu_descriptor_state descriptors
[VK_PIPELINE_BIND_POINT_RANGE_SIZE
];
932 struct tu_cmd_buffer_upload upload
;
934 VkResult record_result
;
936 struct tu_bo_list bo_list
;
938 struct tu_cs draw_cs
;
942 uint32_t marker_seqno
;
944 struct tu_bo scratch_bo
;
945 uint32_t scratch_seqno
;
946 #define VSC_OVERFLOW 0x8
947 #define VSC_SCRATCH 0x10
949 struct tu_bo vsc_data
;
950 struct tu_bo vsc_data2
;
951 uint32_t vsc_data_pitch
;
952 uint32_t vsc_data2_pitch
;
958 /* Temporary struct for tracking a register state to be written, used by
959 * a6xx-pack.h and tu_cs_emit_regs()
961 struct tu_reg_value
{
972 tu6_emit_event_write(struct tu_cmd_buffer
*cmd
,
974 enum vgt_event_type event
,
978 tu_get_memory_fd(struct tu_device
*device
,
979 struct tu_device_memory
*memory
,
982 static inline struct tu_descriptor_state
*
983 tu_get_descriptors_state(struct tu_cmd_buffer
*cmd_buffer
,
984 VkPipelineBindPoint bind_point
)
986 return &cmd_buffer
->descriptors
[bind_point
];
990 * Takes x,y,z as exact numbers of invocations, instead of blocks.
992 * Limitations: Can't call normal dispatch functions without binding or
994 * the compute pipeline.
997 tu_unaligned_dispatch(struct tu_cmd_buffer
*cmd_buffer
,
1007 struct tu_shader_module
;
1009 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
1010 #define TU_HASH_SHADER_SISCHED (1 << 1)
1011 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
1013 tu_hash_shaders(unsigned char *hash
,
1014 const VkPipelineShaderStageCreateInfo
**stages
,
1015 const struct tu_pipeline_layout
*layout
,
1016 const struct tu_pipeline_key
*key
,
1019 static inline gl_shader_stage
1020 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1022 assert(__builtin_popcount(vk_stage
) == 1);
1023 return ffs(vk_stage
) - 1;
1026 static inline VkShaderStageFlagBits
1027 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1029 return (1 << mesa_stage
);
1032 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1034 #define tu_foreach_stage(stage, stage_bits) \
1035 for (gl_shader_stage stage, \
1036 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1037 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1039 struct tu_shader_module
1041 unsigned char sha1
[20];
1044 const uint32_t *code
[0];
1047 struct tu_shader_compile_options
1049 struct ir3_shader_key key
;
1052 bool include_binning_pass
;
1055 struct tu_descriptor_map
1057 /* TODO: avoid fixed size array/justify the size */
1058 unsigned num
; /* number of array entries */
1059 unsigned num_desc
; /* Number of descriptors (sum of array_size[]) */
1068 struct ir3_shader ir3_shader
;
1070 struct tu_descriptor_map texture_map
;
1071 struct tu_descriptor_map sampler_map
;
1072 struct tu_descriptor_map ubo_map
;
1073 struct tu_descriptor_map ssbo_map
;
1074 struct tu_descriptor_map image_map
;
1076 /* This may be true for vertex shaders. When true, variants[1] is the
1077 * binning variant and binning_binary is non-NULL.
1079 bool has_binning_pass
;
1082 void *binning_binary
;
1084 struct ir3_shader_variant variants
[0];
1088 tu_shader_create(struct tu_device
*dev
,
1089 gl_shader_stage stage
,
1090 const VkPipelineShaderStageCreateInfo
*stage_info
,
1091 struct tu_pipeline_layout
*layout
,
1092 const VkAllocationCallbacks
*alloc
);
1095 tu_shader_destroy(struct tu_device
*dev
,
1096 struct tu_shader
*shader
,
1097 const VkAllocationCallbacks
*alloc
);
1100 tu_shader_compile_options_init(
1101 struct tu_shader_compile_options
*options
,
1102 const VkGraphicsPipelineCreateInfo
*pipeline_info
);
1105 tu_shader_compile(struct tu_device
*dev
,
1106 struct tu_shader
*shader
,
1107 const struct tu_shader
*next_stage
,
1108 const struct tu_shader_compile_options
*options
,
1109 const VkAllocationCallbacks
*alloc
);
1111 struct tu_program_descriptor_linkage
1113 struct ir3_ubo_analysis_state ubo_state
;
1114 struct ir3_const_state const_state
;
1118 struct tu_descriptor_map texture_map
;
1119 struct tu_descriptor_map sampler_map
;
1120 struct tu_descriptor_map ubo_map
;
1121 struct tu_descriptor_map ssbo_map
;
1122 struct tu_descriptor_map image_map
;
1129 struct tu_dynamic_state dynamic_state
;
1131 struct tu_pipeline_layout
*layout
;
1133 bool need_indirect_descriptor_sets
;
1134 VkShaderStageFlags active_stages
;
1138 struct tu_bo binary_bo
;
1139 struct tu_cs_entry state_ib
;
1140 struct tu_cs_entry binning_state_ib
;
1142 struct tu_program_descriptor_linkage link
[MESA_SHADER_STAGES
];
1147 uint8_t bindings
[MAX_VERTEX_ATTRIBS
];
1148 uint16_t strides
[MAX_VERTEX_ATTRIBS
];
1149 uint16_t offsets
[MAX_VERTEX_ATTRIBS
];
1152 uint8_t binning_bindings
[MAX_VERTEX_ATTRIBS
];
1153 uint16_t binning_strides
[MAX_VERTEX_ATTRIBS
];
1154 uint16_t binning_offsets
[MAX_VERTEX_ATTRIBS
];
1155 uint32_t binning_count
;
1157 struct tu_cs_entry state_ib
;
1158 struct tu_cs_entry binning_state_ib
;
1163 enum pc_di_primtype primtype
;
1164 bool primitive_restart
;
1169 struct tu_cs_entry state_ib
;
1174 uint32_t gras_su_cntl
;
1175 struct tu_cs_entry state_ib
;
1180 struct tu_cs_entry state_ib
;
1185 struct tu_cs_entry state_ib
;
1190 uint32_t local_size
[3];
1195 tu6_emit_viewport(struct tu_cs
*cs
, const VkViewport
*viewport
);
1198 tu6_emit_scissor(struct tu_cs
*cs
, const VkRect2D
*scissor
);
1201 tu6_emit_gras_su_cntl(struct tu_cs
*cs
,
1202 uint32_t gras_su_cntl
,
1206 tu6_emit_depth_bias(struct tu_cs
*cs
,
1207 float constant_factor
,
1209 float slope_factor
);
1212 tu6_emit_stencil_compare_mask(struct tu_cs
*cs
,
1217 tu6_emit_stencil_write_mask(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1220 tu6_emit_stencil_reference(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1223 tu6_emit_blend_constants(struct tu_cs
*cs
, const float constants
[4]);
1225 struct tu_userdata_info
*
1226 tu_lookup_user_sgpr(struct tu_pipeline
*pipeline
,
1227 gl_shader_stage stage
,
1230 struct tu_shader_variant
*
1231 tu_get_shader(struct tu_pipeline
*pipeline
, gl_shader_stage stage
);
1233 struct tu_graphics_pipeline_create_info
1236 bool db_depth_clear
;
1237 bool db_stencil_clear
;
1238 bool db_depth_disable_expclear
;
1239 bool db_stencil_disable_expclear
;
1240 bool db_flush_depth_inplace
;
1241 bool db_flush_stencil_inplace
;
1242 bool db_resummarize
;
1243 uint32_t custom_blend_mode
;
1246 struct tu_native_format
1248 int vtx
; /* VFMTn_xxx or -1 */
1249 int tex
; /* TFMTn_xxx or -1 */
1250 int rb
; /* RBn_xxx or -1 */
1251 int swap
; /* enum a3xx_color_swap */
1252 bool present
; /* internal only; always true to external users */
1255 const struct tu_native_format
*
1256 tu6_get_native_format(VkFormat format
);
1259 tu_pack_clear_value(const VkClearValue
*val
,
1264 tu_2d_clear_color(const VkClearColorValue
*val
, VkFormat format
, uint32_t buf
[4]);
1267 tu_2d_clear_zs(const VkClearDepthStencilValue
*val
, VkFormat format
, uint32_t buf
[4]);
1269 enum a6xx_2d_ifmt
tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt
);
1270 enum a6xx_depth_format
tu6_pipe2depth(VkFormat format
);
1272 struct tu_image_level
1274 VkDeviceSize offset
;
1282 /* The original VkFormat provided by the client. This may not match any
1283 * of the actual surface formats.
1286 VkImageAspectFlags aspects
;
1287 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1288 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1289 VkImageCreateFlags flags
; /** VkImageCreateInfo::flags */
1291 uint32_t level_count
;
1292 uint32_t layer_count
;
1293 VkSampleCountFlagBits samples
;
1298 struct fdl_layout layout
;
1300 unsigned queue_family_mask
;
1304 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1305 VkDeviceMemory owned_memory
;
1307 /* Set when bound */
1309 VkDeviceSize bo_offset
;
1313 tu_image_queue_family_mask(const struct tu_image
*image
,
1315 uint32_t queue_family
);
1317 static inline uint32_t
1318 tu_get_layerCount(const struct tu_image
*image
,
1319 const VkImageSubresourceRange
*range
)
1321 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
1322 ? image
->layer_count
- range
->baseArrayLayer
1323 : range
->layerCount
;
1326 static inline uint32_t
1327 tu_get_levelCount(const struct tu_image
*image
,
1328 const VkImageSubresourceRange
*range
)
1330 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
1331 ? image
->level_count
- range
->baseMipLevel
1332 : range
->levelCount
;
1335 static inline VkDeviceSize
1336 tu_layer_size(struct tu_image
*image
, int level
)
1338 return fdl_layer_stride(&image
->layout
, level
);
1341 static inline uint32_t
1342 tu_image_stride(struct tu_image
*image
, int level
)
1344 return image
->layout
.slices
[level
].pitch
* image
->layout
.cpp
;
1347 static inline uint64_t
1348 tu_image_base(struct tu_image
*image
, int level
, int layer
)
1350 return image
->bo
->iova
+ image
->bo_offset
+
1351 fdl_surface_offset(&image
->layout
, level
, layer
);
1354 #define tu_image_base_ref(image, level, layer) \
1356 .bo_offset = (image->bo_offset + fdl_surface_offset(&image->layout, \
1359 #define tu_image_view_base_ref(iview) \
1360 tu_image_base_ref(iview->image, iview->base_mip, iview->base_layer)
1362 static inline VkDeviceSize
1363 tu_image_ubwc_size(struct tu_image
*image
, int level
)
1365 return image
->layout
.ubwc_size
;
1368 static inline uint32_t
1369 tu_image_ubwc_pitch(struct tu_image
*image
, int level
)
1371 return image
->layout
.ubwc_slices
[level
].pitch
;
1374 static inline uint64_t
1375 tu_image_ubwc_surface_offset(struct tu_image
*image
, int level
, int layer
)
1377 return image
->layout
.ubwc_slices
[level
].offset
+
1378 layer
* tu_image_ubwc_size(image
, level
);
1381 static inline uint64_t
1382 tu_image_ubwc_base(struct tu_image
*image
, int level
, int layer
)
1384 return image
->bo
->iova
+ image
->bo_offset
+
1385 tu_image_ubwc_surface_offset(image
, level
, layer
);
1388 #define tu_image_ubwc_base_ref(image, level, layer) \
1390 .bo_offset = (image->bo_offset + tu_image_ubwc_surface_offset(image, \
1393 #define tu_image_view_ubwc_base_ref(iview) \
1394 tu_image_ubwc_base_ref(iview->image, iview->base_mip, iview->base_layer)
1397 tu6_get_image_tile_mode(struct tu_image
*image
, int level
);
1398 enum a3xx_msaa_samples
1399 tu_msaa_samples(uint32_t samples
);
1401 struct tu_image_view
1403 struct tu_image
*image
; /**< VkImageViewCreateInfo::image */
1405 VkImageViewType type
;
1406 VkImageAspectFlags aspect_mask
;
1408 uint32_t base_layer
;
1409 uint32_t layer_count
;
1411 uint32_t level_count
;
1412 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1414 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1416 /* Descriptor for use as a storage image as opposed to a sampled image.
1417 * This has a few differences for cube maps (e.g. type).
1419 uint32_t storage_descriptor
[A6XX_TEX_CONST_DWORDS
];
1424 uint32_t state
[A6XX_TEX_SAMP_DWORDS
];
1427 VkBorderColor border
;
1431 tu_image_create(VkDevice _device
,
1432 const VkImageCreateInfo
*pCreateInfo
,
1433 const VkAllocationCallbacks
*alloc
,
1438 tu_image_from_gralloc(VkDevice device_h
,
1439 const VkImageCreateInfo
*base_info
,
1440 const VkNativeBufferANDROID
*gralloc_info
,
1441 const VkAllocationCallbacks
*alloc
,
1442 VkImage
*out_image_h
);
1445 tu_image_view_init(struct tu_image_view
*view
,
1446 struct tu_device
*device
,
1447 const VkImageViewCreateInfo
*pCreateInfo
);
1449 struct tu_buffer_view
1451 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1453 struct tu_buffer
*buffer
;
1456 tu_buffer_view_init(struct tu_buffer_view
*view
,
1457 struct tu_device
*device
,
1458 const VkBufferViewCreateInfo
*pCreateInfo
);
1460 static inline struct VkExtent3D
1461 tu_sanitize_image_extent(const VkImageType imageType
,
1462 const struct VkExtent3D imageExtent
)
1464 switch (imageType
) {
1465 case VK_IMAGE_TYPE_1D
:
1466 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
1467 case VK_IMAGE_TYPE_2D
:
1468 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
1469 case VK_IMAGE_TYPE_3D
:
1472 unreachable("invalid image type");
1476 static inline struct VkOffset3D
1477 tu_sanitize_image_offset(const VkImageType imageType
,
1478 const struct VkOffset3D imageOffset
)
1480 switch (imageType
) {
1481 case VK_IMAGE_TYPE_1D
:
1482 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
1483 case VK_IMAGE_TYPE_2D
:
1484 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
1485 case VK_IMAGE_TYPE_3D
:
1488 unreachable("invalid image type");
1492 struct tu_attachment_info
1494 struct tu_image_view
*attachment
;
1497 struct tu_framebuffer
1503 uint32_t attachment_count
;
1504 struct tu_attachment_info attachments
[0];
1507 struct tu_subpass_attachment
1509 uint32_t attachment
;
1514 uint32_t input_count
;
1515 uint32_t color_count
;
1516 struct tu_subpass_attachment
*input_attachments
;
1517 struct tu_subpass_attachment
*color_attachments
;
1518 struct tu_subpass_attachment
*resolve_attachments
;
1519 struct tu_subpass_attachment depth_stencil_attachment
;
1521 VkSampleCountFlagBits samples
;
1524 struct tu_render_pass_attachment
1528 VkAttachmentLoadOp load_op
;
1529 VkAttachmentLoadOp stencil_load_op
;
1530 VkAttachmentStoreOp store_op
;
1531 VkAttachmentStoreOp stencil_store_op
;
1532 int32_t gmem_offset
;
1535 struct tu_render_pass
1537 uint32_t attachment_count
;
1538 uint32_t subpass_count
;
1539 uint32_t gmem_pixels
;
1540 struct tu_subpass_attachment
*subpass_attachments
;
1541 struct tu_render_pass_attachment
*attachments
;
1542 struct tu_subpass subpasses
[0];
1546 tu_device_init_meta(struct tu_device
*device
);
1548 tu_device_finish_meta(struct tu_device
*device
);
1550 struct tu_query_pool
1555 uint32_t pipeline_statistics
;
1562 uint32_t temp_syncobj
;
1566 tu_set_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1567 VkPipelineBindPoint bind_point
,
1568 struct tu_descriptor_set
*set
,
1572 tu_update_descriptor_sets(struct tu_device
*device
,
1573 struct tu_cmd_buffer
*cmd_buffer
,
1574 VkDescriptorSet overrideSet
,
1575 uint32_t descriptorWriteCount
,
1576 const VkWriteDescriptorSet
*pDescriptorWrites
,
1577 uint32_t descriptorCopyCount
,
1578 const VkCopyDescriptorSet
*pDescriptorCopies
);
1581 tu_update_descriptor_set_with_template(
1582 struct tu_device
*device
,
1583 struct tu_cmd_buffer
*cmd_buffer
,
1584 struct tu_descriptor_set
*set
,
1585 VkDescriptorUpdateTemplate descriptorUpdateTemplate
,
1589 tu_meta_push_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1590 VkPipelineBindPoint pipelineBindPoint
,
1591 VkPipelineLayout _layout
,
1593 uint32_t descriptorWriteCount
,
1594 const VkWriteDescriptorSet
*pDescriptorWrites
);
1597 tu_drm_get_gpu_id(const struct tu_physical_device
*dev
, uint32_t *id
);
1600 tu_drm_get_gmem_size(const struct tu_physical_device
*dev
, uint32_t *size
);
1603 tu_drm_submitqueue_new(const struct tu_device
*dev
,
1605 uint32_t *queue_id
);
1608 tu_drm_submitqueue_close(const struct tu_device
*dev
, uint32_t queue_id
);
1611 tu_gem_new(const struct tu_device
*dev
, uint64_t size
, uint32_t flags
);
1613 tu_gem_import_dmabuf(const struct tu_device
*dev
,
1617 tu_gem_export_dmabuf(const struct tu_device
*dev
, uint32_t gem_handle
);
1619 tu_gem_close(const struct tu_device
*dev
, uint32_t gem_handle
);
1621 tu_gem_info_offset(const struct tu_device
*dev
, uint32_t gem_handle
);
1623 tu_gem_info_iova(const struct tu_device
*dev
, uint32_t gem_handle
);
1625 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1627 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1629 return (struct __tu_type *) _handle; \
1632 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1634 return (__VkType) _obj; \
1637 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1639 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1641 return (struct __tu_type *) (uintptr_t) _handle; \
1644 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1646 return (__VkType)(uintptr_t) _obj; \
1649 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1650 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1652 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer
, VkCommandBuffer
)
1653 TU_DEFINE_HANDLE_CASTS(tu_device
, VkDevice
)
1654 TU_DEFINE_HANDLE_CASTS(tu_instance
, VkInstance
)
1655 TU_DEFINE_HANDLE_CASTS(tu_physical_device
, VkPhysicalDevice
)
1656 TU_DEFINE_HANDLE_CASTS(tu_queue
, VkQueue
)
1658 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool
, VkCommandPool
)
1659 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer
, VkBuffer
)
1660 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view
, VkBufferView
)
1661 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool
, VkDescriptorPool
)
1662 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set
, VkDescriptorSet
)
1663 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout
,
1664 VkDescriptorSetLayout
)
1665 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template
,
1666 VkDescriptorUpdateTemplate
)
1667 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory
, VkDeviceMemory
)
1668 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence
, VkFence
)
1669 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event
, VkEvent
)
1670 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer
, VkFramebuffer
)
1671 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image
, VkImage
)
1672 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view
, VkImageView
);
1673 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache
, VkPipelineCache
)
1674 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline
, VkPipeline
)
1675 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout
, VkPipelineLayout
)
1676 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool
, VkQueryPool
)
1677 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass
, VkRenderPass
)
1678 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler
, VkSampler
)
1679 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module
, VkShaderModule
)
1680 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore
, VkSemaphore
)
1682 #endif /* TU_PRIVATE_H */