2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
43 #define VG(x) ((void)0)
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
61 #include "fdl/freedreno_layout.h"
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
66 /* Pre-declarations needed for WSI entrypoints */
69 typedef struct xcb_connection_t xcb_connection_t
;
70 typedef uint32_t xcb_visualid_t
;
71 typedef uint32_t xcb_window_t
;
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
78 #include "tu_entrypoints.h"
80 #include "vk_format.h"
83 #define MAX_VERTEX_ATTRIBS 32
85 #define MAX_VSC_PIPES 32
86 #define MAX_VIEWPORTS 1
87 #define MAX_SCISSORS 16
88 #define MAX_DISCARD_RECTANGLES 4
89 #define MAX_PUSH_CONSTANTS_SIZE 128
90 #define MAX_PUSH_DESCRIPTORS 32
91 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
92 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
93 #define MAX_DYNAMIC_BUFFERS \
94 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
95 #define MAX_SAMPLES_LOG2 4
96 #define NUM_META_FS_KEYS 13
97 #define TU_MAX_DRM_DEVICES 8
99 /* The Qualcomm driver exposes 0x20000058 */
100 #define MAX_STORAGE_BUFFER_RANGE 0x20000000
101 /* We use ldc for uniform buffer loads, just like the Qualcomm driver, so
102 * expose the same maximum range.
103 * TODO: The SIZE bitfield is 15 bits, and in 4-dword units, so the actual
104 * range might be higher.
106 #define MAX_UNIFORM_BUFFER_RANGE 0x10000
108 #define NUM_DEPTH_CLEAR_PIPELINES 3
111 * This is the point we switch from using CP to compute shader
112 * for certain buffer operations.
114 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
116 #define A6XX_TEX_CONST_DWORDS 16
117 #define A6XX_TEX_SAMP_DWORDS 4
122 TU_MEM_HEAP_VRAM_CPU_ACCESS
,
130 TU_MEM_TYPE_GTT_WRITE_COMBINE
,
131 TU_MEM_TYPE_VRAM_CPU_ACCESS
,
132 TU_MEM_TYPE_GTT_CACHED
,
136 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
138 static inline uint32_t
139 align_u32(uint32_t v
, uint32_t a
)
141 assert(a
!= 0 && a
== (a
& -a
));
142 return (v
+ a
- 1) & ~(a
- 1);
145 static inline uint32_t
146 align_u32_npot(uint32_t v
, uint32_t a
)
148 return (v
+ a
- 1) / a
* a
;
151 static inline uint64_t
152 align_u64(uint64_t v
, uint64_t a
)
154 assert(a
!= 0 && a
== (a
& -a
));
155 return (v
+ a
- 1) & ~(a
- 1);
158 static inline int32_t
159 align_i32(int32_t v
, int32_t a
)
161 assert(a
!= 0 && a
== (a
& -a
));
162 return (v
+ a
- 1) & ~(a
- 1);
165 /** Alignment must be a power of 2. */
167 tu_is_aligned(uintmax_t n
, uintmax_t a
)
169 assert(a
== (a
& -a
));
170 return (n
& (a
- 1)) == 0;
173 static inline uint32_t
174 round_up_u32(uint32_t v
, uint32_t a
)
176 return (v
+ a
- 1) / a
;
179 static inline uint64_t
180 round_up_u64(uint64_t v
, uint64_t a
)
182 return (v
+ a
- 1) / a
;
185 static inline uint32_t
186 tu_minify(uint32_t n
, uint32_t levels
)
188 if (unlikely(n
== 0))
191 return MAX2(n
>> levels
, 1);
194 tu_clamp_f(float f
, float min
, float max
)
207 tu_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
209 if (*inout_mask
& clear_mask
) {
210 *inout_mask
&= ~clear_mask
;
217 #define for_each_bit(b, dword) \
218 for (uint32_t __dword = (dword); \
219 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
221 #define typed_memcpy(dest, src, count) \
223 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
224 memcpy((dest), (src), (count) * sizeof(*(src))); \
227 #define COND(bool, val) ((bool) ? (val) : 0)
229 /* Whenever we generate an error, pass it through this function. Useful for
230 * debugging, where we can break on it. Only call at error site, not when
231 * propagating errors. Might be useful to plug in a stack trace here.
237 __vk_errorf(struct tu_instance
*instance
,
244 #define vk_error(instance, error) \
245 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
246 #define vk_errorf(instance, error, format, ...) \
247 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
250 __tu_finishme(const char *file
, int line
, const char *format
, ...)
253 tu_loge(const char *format
, ...) tu_printflike(1, 2);
255 tu_loge_v(const char *format
, va_list va
);
257 tu_logi(const char *format
, ...) tu_printflike(1, 2);
259 tu_logi_v(const char *format
, va_list va
);
262 * Print a FINISHME message, including its source location.
264 #define tu_finishme(format, ...) \
266 static bool reported = false; \
268 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
273 /* A non-fatal assert. Useful for debugging. */
275 #define tu_assert(x) \
277 if (unlikely(!(x))) \
278 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
284 /* Suppress -Wunused in stub functions */
285 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
287 __tu_use_args(int ignore
, ...)
293 tu_finishme("stub %s", __func__); \
297 tu_lookup_entrypoint_unchecked(const char *name
);
299 tu_lookup_entrypoint_checked(
301 uint32_t core_version
,
302 const struct tu_instance_extension_table
*instance
,
303 const struct tu_device_extension_table
*device
);
305 struct tu_physical_device
307 VK_LOADER_DATA _loader_data
;
309 struct tu_instance
*instance
;
312 char name
[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE
];
313 uint8_t driver_uuid
[VK_UUID_SIZE
];
314 uint8_t device_uuid
[VK_UUID_SIZE
];
315 uint8_t cache_uuid
[VK_UUID_SIZE
];
317 struct wsi_device wsi_device
;
325 uint32_t ccu_offset_gmem
;
326 uint32_t ccu_offset_bypass
;
327 #define GMEM_ALIGN_W 16
328 #define GMEM_ALIGN_H 4
331 uint32_t RB_UNKNOWN_8E04_blit
; /* for CP_BLIT's */
332 uint32_t PC_UNKNOWN_9805
;
333 uint32_t SP_UNKNOWN_A0F8
;
336 /* This is the drivers on-disk cache used as a fallback as opposed to
337 * the pipeline cache defined by apps.
339 struct disk_cache
*disk_cache
;
341 struct tu_device_extension_table supported_extensions
;
346 TU_DEBUG_STARTUP
= 1 << 0,
347 TU_DEBUG_NIR
= 1 << 1,
348 TU_DEBUG_IR3
= 1 << 2,
349 TU_DEBUG_NOBIN
= 1 << 3,
350 TU_DEBUG_SYSMEM
= 1 << 4,
351 TU_DEBUG_FORCEBIN
= 1 << 5,
356 VK_LOADER_DATA _loader_data
;
358 VkAllocationCallbacks alloc
;
360 uint32_t api_version
;
361 int physical_device_count
;
362 struct tu_physical_device physical_devices
[TU_MAX_DRM_DEVICES
];
364 enum tu_debug_flags debug_flags
;
366 struct vk_debug_report_instance debug_report_callbacks
;
368 struct tu_instance_extension_table enabled_extensions
;
372 tu_wsi_init(struct tu_physical_device
*physical_device
);
374 tu_wsi_finish(struct tu_physical_device
*physical_device
);
377 tu_instance_extension_supported(const char *name
);
379 tu_physical_device_api_version(struct tu_physical_device
*dev
);
381 tu_physical_device_extension_supported(struct tu_physical_device
*dev
,
386 struct tu_pipeline_cache
388 struct tu_device
*device
;
389 pthread_mutex_t mutex
;
393 uint32_t kernel_count
;
394 struct cache_entry
**hash_table
;
397 VkAllocationCallbacks alloc
;
400 struct tu_pipeline_key
405 tu_pipeline_cache_init(struct tu_pipeline_cache
*cache
,
406 struct tu_device
*device
);
408 tu_pipeline_cache_finish(struct tu_pipeline_cache
*cache
);
410 tu_pipeline_cache_load(struct tu_pipeline_cache
*cache
,
414 struct tu_shader_variant
;
417 tu_create_shader_variants_from_pipeline_cache(
418 struct tu_device
*device
,
419 struct tu_pipeline_cache
*cache
,
420 const unsigned char *sha1
,
421 struct tu_shader_variant
**variants
);
424 tu_pipeline_cache_insert_shaders(struct tu_device
*device
,
425 struct tu_pipeline_cache
*cache
,
426 const unsigned char *sha1
,
427 struct tu_shader_variant
**variants
,
428 const void *const *codes
,
429 const unsigned *code_sizes
);
433 VkAllocationCallbacks alloc
;
435 struct tu_pipeline_cache cache
;
439 #define TU_QUEUE_GENERAL 0
441 #define TU_MAX_QUEUE_FAMILIES 1
445 struct wsi_fence
*fence_wsi
;
451 tu_fence_init(struct tu_fence
*fence
, bool signaled
);
453 tu_fence_finish(struct tu_fence
*fence
);
455 tu_fence_update_fd(struct tu_fence
*fence
, int fd
);
457 tu_fence_copy(struct tu_fence
*fence
, const struct tu_fence
*src
);
459 tu_fence_signal(struct tu_fence
*fence
);
461 tu_fence_wait_idle(struct tu_fence
*fence
);
465 VK_LOADER_DATA _loader_data
;
466 struct tu_device
*device
;
467 uint32_t queue_family_index
;
469 VkDeviceQueueCreateFlags flags
;
471 uint32_t msm_queue_id
;
472 struct tu_fence submit_fence
;
485 VK_LOADER_DATA _loader_data
;
487 VkAllocationCallbacks alloc
;
489 struct tu_instance
*instance
;
491 struct tu_meta_state meta_state
;
493 struct tu_queue
*queues
[TU_MAX_QUEUE_FAMILIES
];
494 int queue_count
[TU_MAX_QUEUE_FAMILIES
];
496 struct tu_physical_device
*physical_device
;
498 struct ir3_compiler
*compiler
;
500 /* Backup in-memory cache to be used if the app doesn't provide one */
501 struct tu_pipeline_cache
*mem_cache
;
503 struct tu_bo vsc_data
;
504 struct tu_bo vsc_data2
;
505 uint32_t vsc_data_pitch
;
506 uint32_t vsc_data2_pitch
;
508 struct tu_bo border_color
;
510 struct list_head shader_slabs
;
511 mtx_t shader_slab_mutex
;
513 struct tu_device_extension_table enabled_extensions
;
517 tu_bo_init_new(struct tu_device
*dev
, struct tu_bo
*bo
, uint64_t size
);
519 tu_bo_init_dmabuf(struct tu_device
*dev
,
524 tu_bo_export_dmabuf(struct tu_device
*dev
, struct tu_bo
*bo
);
526 tu_bo_finish(struct tu_device
*dev
, struct tu_bo
*bo
);
528 tu_bo_map(struct tu_device
*dev
, struct tu_bo
*bo
);
533 const struct tu_bo
*bo
;
539 struct ts_cs_memory
{
548 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
549 * is full. tu_cs_begin must be called before command packet emission and
550 * tu_cs_end must be called after.
552 * This mode may create multiple entries internally. The entries must be
553 * submitted together.
558 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
559 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
562 * This mode does not create any entry or any BO.
567 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
568 * command packet emission. tu_cs_begin_sub_stream must be called to get a
569 * sub-stream to emit comamnd packets to. When done with the sub-stream,
570 * tu_cs_end_sub_stream must be called.
572 * This mode does not create any entry internally.
574 TU_CS_MODE_SUB_STREAM
,
581 uint32_t *reserved_end
;
584 struct tu_device
*device
;
585 enum tu_cs_mode mode
;
586 uint32_t next_bo_size
;
588 struct tu_cs_entry
*entries
;
589 uint32_t entry_count
;
590 uint32_t entry_capacity
;
594 uint32_t bo_capacity
;
596 /* state for cond_exec_start/cond_exec_end */
598 uint32_t *cond_dwords
;
601 struct tu_device_memory
606 /* for dedicated allocations */
607 struct tu_image
*image
;
608 struct tu_buffer
*buffer
;
615 struct tu_descriptor_range
621 struct tu_descriptor_set
623 const struct tu_descriptor_set_layout
*layout
;
624 struct tu_descriptor_pool
*pool
;
628 uint32_t *mapped_ptr
;
630 uint32_t *dynamic_descriptors
;
632 struct tu_bo
*buffers
[0];
635 struct tu_push_descriptor_set
637 struct tu_descriptor_set set
;
641 struct tu_descriptor_pool_entry
645 struct tu_descriptor_set
*set
;
648 struct tu_descriptor_pool
651 uint64_t current_offset
;
654 uint8_t *host_memory_base
;
655 uint8_t *host_memory_ptr
;
656 uint8_t *host_memory_end
;
658 uint32_t entry_count
;
659 uint32_t max_entry_count
;
660 struct tu_descriptor_pool_entry entries
[0];
663 struct tu_descriptor_update_template_entry
665 VkDescriptorType descriptor_type
;
667 /* The number of descriptors to update */
668 uint32_t descriptor_count
;
670 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
674 /* In dwords. Not valid/used for dynamic descriptors */
677 uint32_t buffer_offset
;
679 /* Only valid for combined image samplers and samplers */
680 uint16_t has_sampler
;
686 /* For push descriptors */
687 const uint32_t *immutable_samplers
;
690 struct tu_descriptor_update_template
692 uint32_t entry_count
;
693 VkPipelineBindPoint bind_point
;
694 struct tu_descriptor_update_template_entry entry
[0];
701 VkBufferUsageFlags usage
;
702 VkBufferCreateFlags flags
;
705 VkDeviceSize bo_offset
;
708 static inline uint64_t
709 tu_buffer_iova(struct tu_buffer
*buffer
)
711 return buffer
->bo
->iova
+ buffer
->bo_offset
;
714 enum tu_dynamic_state_bits
716 TU_DYNAMIC_VIEWPORT
= 1 << 0,
717 TU_DYNAMIC_SCISSOR
= 1 << 1,
718 TU_DYNAMIC_LINE_WIDTH
= 1 << 2,
719 TU_DYNAMIC_DEPTH_BIAS
= 1 << 3,
720 TU_DYNAMIC_BLEND_CONSTANTS
= 1 << 4,
721 TU_DYNAMIC_DEPTH_BOUNDS
= 1 << 5,
722 TU_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6,
723 TU_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7,
724 TU_DYNAMIC_STENCIL_REFERENCE
= 1 << 8,
725 TU_DYNAMIC_DISCARD_RECTANGLE
= 1 << 9,
726 TU_DYNAMIC_ALL
= (1 << 10) - 1,
729 struct tu_vertex_binding
731 struct tu_buffer
*buffer
;
735 struct tu_viewport_state
738 VkViewport viewports
[MAX_VIEWPORTS
];
741 struct tu_scissor_state
744 VkRect2D scissors
[MAX_SCISSORS
];
747 struct tu_discard_rectangle_state
750 VkRect2D rectangles
[MAX_DISCARD_RECTANGLES
];
753 struct tu_dynamic_state
756 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
757 * Defines the set of saved dynamic state.
761 struct tu_viewport_state viewport
;
763 struct tu_scissor_state scissor
;
774 float blend_constants
[4];
786 } stencil_compare_mask
;
792 } stencil_write_mask
;
800 struct tu_discard_rectangle_state discard_rectangle
;
803 extern const struct tu_dynamic_state default_dynamic_state
;
806 tu_get_debug_option_name(int id
);
809 tu_get_perftest_option_name(int id
);
811 struct tu_descriptor_state
813 struct tu_descriptor_set
*sets
[MAX_SETS
];
815 struct tu_push_descriptor_set push_set
;
817 uint32_t dynamic_descriptors
[MAX_DYNAMIC_BUFFERS
* A6XX_TEX_CONST_DWORDS
];
818 uint32_t input_attachments
[MAX_RTS
* A6XX_TEX_CONST_DWORDS
];
829 struct tu_tiling_config
831 VkRect2D render_area
;
833 /* position and size of the first tile */
835 /* number of tiles */
836 VkExtent2D tile_count
;
838 /* size of the first VSC pipe */
840 /* number of VSC pipes */
841 VkExtent2D pipe_count
;
843 /* pipe register values */
844 uint32_t pipe_config
[MAX_VSC_PIPES
];
845 uint32_t pipe_sizes
[MAX_VSC_PIPES
];
847 /* Whether sysmem rendering must be used */
851 enum tu_cmd_dirty_bits
853 TU_CMD_DIRTY_PIPELINE
= 1 << 0,
854 TU_CMD_DIRTY_COMPUTE_PIPELINE
= 1 << 1,
855 TU_CMD_DIRTY_VERTEX_BUFFERS
= 1 << 2,
856 TU_CMD_DIRTY_DESCRIPTOR_SETS
= 1 << 3,
857 TU_CMD_DIRTY_COMPUTE_DESCRIPTOR_SETS
= 1 << 4,
858 TU_CMD_DIRTY_PUSH_CONSTANTS
= 1 << 5,
859 TU_CMD_DIRTY_STREAMOUT_BUFFERS
= 1 << 6,
860 TU_CMD_DIRTY_INPUT_ATTACHMENTS
= 1 << 7,
862 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 16,
863 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 17,
864 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 18,
865 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 19,
866 TU_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 20,
867 TU_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 21,
870 struct tu_streamout_state
{
871 uint16_t stride
[IR3_MAX_SO_BUFFERS
];
872 uint32_t ncomp
[IR3_MAX_SO_BUFFERS
];
873 uint32_t prog
[IR3_MAX_SO_OUTPUTS
* 2];
875 uint32_t vpc_so_buf_cntl
;
882 struct tu_pipeline
*pipeline
;
883 struct tu_pipeline
*compute_pipeline
;
888 struct tu_buffer
*buffers
[MAX_VBS
];
889 VkDeviceSize offsets
[MAX_VBS
];
892 struct tu_dynamic_state dynamic
;
894 /* Stream output buffers */
897 struct tu_buffer
*buffers
[IR3_MAX_SO_BUFFERS
];
898 VkDeviceSize offsets
[IR3_MAX_SO_BUFFERS
];
899 VkDeviceSize sizes
[IR3_MAX_SO_BUFFERS
];
902 uint8_t streamout_reset
;
903 uint8_t streamout_enabled
;
906 struct tu_buffer
*index_buffer
;
907 uint64_t index_offset
;
909 uint32_t max_index_count
;
912 const struct tu_render_pass
*pass
;
913 const struct tu_subpass
*subpass
;
914 const struct tu_framebuffer
*framebuffer
;
916 struct tu_tiling_config tiling_config
;
918 struct tu_cs_entry tile_store_ib
;
923 VkAllocationCallbacks alloc
;
924 struct list_head cmd_buffers
;
925 struct list_head free_cmd_buffers
;
926 uint32_t queue_family_index
;
929 struct tu_cmd_buffer_upload
934 struct list_head list
;
937 enum tu_cmd_buffer_status
939 TU_CMD_BUFFER_STATUS_INVALID
,
940 TU_CMD_BUFFER_STATUS_INITIAL
,
941 TU_CMD_BUFFER_STATUS_RECORDING
,
942 TU_CMD_BUFFER_STATUS_EXECUTABLE
,
943 TU_CMD_BUFFER_STATUS_PENDING
,
950 struct drm_msm_gem_submit_bo
*bo_infos
;
953 #define TU_BO_LIST_FAILED (~0)
956 tu_bo_list_init(struct tu_bo_list
*list
);
958 tu_bo_list_destroy(struct tu_bo_list
*list
);
960 tu_bo_list_reset(struct tu_bo_list
*list
);
962 tu_bo_list_add(struct tu_bo_list
*list
,
963 const struct tu_bo
*bo
,
966 tu_bo_list_merge(struct tu_bo_list
*list
, const struct tu_bo_list
*other
);
968 /* This struct defines the layout of the scratch_bo */
971 uint32_t seqno
; /* seqno for async CP_EVENT_WRITE, etc */
973 volatile uint32_t vsc_overflow
;
975 /* flag set from cmdstream when VSC overflow detected: */
976 uint32_t vsc_scratch
;
981 /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
988 #define ctrl_offset(member) offsetof(struct tu6_control, member)
992 VK_LOADER_DATA _loader_data
;
994 struct tu_device
*device
;
996 struct tu_cmd_pool
*pool
;
997 struct list_head pool_link
;
999 VkCommandBufferUsageFlags usage_flags
;
1000 VkCommandBufferLevel level
;
1001 enum tu_cmd_buffer_status status
;
1003 struct tu_cmd_state state
;
1004 struct tu_vertex_binding vertex_bindings
[MAX_VBS
];
1005 uint32_t queue_family_index
;
1007 uint32_t push_constants
[MAX_PUSH_CONSTANTS_SIZE
/ 4];
1008 VkShaderStageFlags push_constant_stages
;
1009 struct tu_descriptor_set meta_push_descriptors
;
1011 struct tu_descriptor_state descriptors
[VK_PIPELINE_BIND_POINT_RANGE_SIZE
];
1013 struct tu_cmd_buffer_upload upload
;
1015 VkResult record_result
;
1017 struct tu_bo_list bo_list
;
1019 struct tu_cs draw_cs
;
1020 struct tu_cs draw_epilogue_cs
;
1021 struct tu_cs sub_cs
;
1023 struct tu_bo scratch_bo
;
1024 uint32_t scratch_seqno
;
1026 struct tu_bo vsc_data
;
1027 struct tu_bo vsc_data2
;
1028 uint32_t vsc_data_pitch
;
1029 uint32_t vsc_data2_pitch
;
1035 /* Temporary struct for tracking a register state to be written, used by
1036 * a6xx-pack.h and tu_cs_emit_regs()
1038 struct tu_reg_value
{
1049 tu6_emit_event_write(struct tu_cmd_buffer
*cmd
,
1051 enum vgt_event_type event
,
1055 tu_get_memory_fd(struct tu_device
*device
,
1056 struct tu_device_memory
*memory
,
1059 static inline struct tu_descriptor_state
*
1060 tu_get_descriptors_state(struct tu_cmd_buffer
*cmd_buffer
,
1061 VkPipelineBindPoint bind_point
)
1063 return &cmd_buffer
->descriptors
[bind_point
];
1067 * Takes x,y,z as exact numbers of invocations, instead of blocks.
1069 * Limitations: Can't call normal dispatch functions without binding or
1071 * the compute pipeline.
1074 tu_unaligned_dispatch(struct tu_cmd_buffer
*cmd_buffer
,
1084 struct tu_shader_module
;
1086 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
1087 #define TU_HASH_SHADER_SISCHED (1 << 1)
1088 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
1090 tu_hash_shaders(unsigned char *hash
,
1091 const VkPipelineShaderStageCreateInfo
**stages
,
1092 const struct tu_pipeline_layout
*layout
,
1093 const struct tu_pipeline_key
*key
,
1096 static inline gl_shader_stage
1097 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1099 assert(__builtin_popcount(vk_stage
) == 1);
1100 return ffs(vk_stage
) - 1;
1103 static inline VkShaderStageFlagBits
1104 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1106 return (1 << mesa_stage
);
1109 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1111 #define tu_foreach_stage(stage, stage_bits) \
1112 for (gl_shader_stage stage, \
1113 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1114 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1116 struct tu_shader_module
1118 unsigned char sha1
[20];
1121 const uint32_t *code
[0];
1124 struct tu_shader_compile_options
1126 struct ir3_shader_key key
;
1129 bool include_binning_pass
;
1132 struct tu_push_constant_range
1140 struct ir3_shader ir3_shader
;
1142 struct tu_push_constant_range push_consts
;
1143 unsigned attachment_idx
[MAX_RTS
];
1145 /* This may be true for vertex shaders. When true, variants[1] is the
1146 * binning variant and binning_binary is non-NULL.
1148 bool has_binning_pass
;
1151 void *binning_binary
;
1153 struct ir3_shader_variant variants
[0];
1157 tu_shader_create(struct tu_device
*dev
,
1158 gl_shader_stage stage
,
1159 const VkPipelineShaderStageCreateInfo
*stage_info
,
1160 struct tu_pipeline_layout
*layout
,
1161 const VkAllocationCallbacks
*alloc
);
1164 tu_shader_destroy(struct tu_device
*dev
,
1165 struct tu_shader
*shader
,
1166 const VkAllocationCallbacks
*alloc
);
1169 tu_shader_compile_options_init(
1170 struct tu_shader_compile_options
*options
,
1171 const VkGraphicsPipelineCreateInfo
*pipeline_info
);
1174 tu_shader_compile(struct tu_device
*dev
,
1175 struct tu_shader
*shader
,
1176 const struct tu_shader
*next_stage
,
1177 const struct tu_shader_compile_options
*options
,
1178 const VkAllocationCallbacks
*alloc
);
1180 struct tu_program_descriptor_linkage
1182 struct ir3_ubo_analysis_state ubo_state
;
1183 struct ir3_const_state const_state
;
1187 struct tu_push_constant_range push_consts
;
1194 struct tu_dynamic_state dynamic_state
;
1196 struct tu_pipeline_layout
*layout
;
1198 bool need_indirect_descriptor_sets
;
1199 VkShaderStageFlags active_stages
;
1201 struct tu_streamout_state streamout
;
1205 struct tu_bo binary_bo
;
1206 struct tu_cs_entry state_ib
;
1207 struct tu_cs_entry binning_state_ib
;
1209 struct tu_program_descriptor_linkage link
[MESA_SHADER_STAGES
];
1210 unsigned input_attachment_idx
[MAX_RTS
];
1215 uint8_t bindings
[MAX_VERTEX_ATTRIBS
];
1218 uint8_t binning_bindings
[MAX_VERTEX_ATTRIBS
];
1219 uint32_t binning_count
;
1221 struct tu_cs_entry state_ib
;
1222 struct tu_cs_entry binning_state_ib
;
1227 enum pc_di_primtype primtype
;
1228 bool primitive_restart
;
1233 struct tu_cs_entry state_ib
;
1238 uint32_t gras_su_cntl
;
1239 struct tu_cs_entry state_ib
;
1244 struct tu_cs_entry state_ib
;
1249 struct tu_cs_entry state_ib
;
1254 uint32_t local_size
[3];
1259 tu6_emit_viewport(struct tu_cs
*cs
, const VkViewport
*viewport
);
1262 tu6_emit_scissor(struct tu_cs
*cs
, const VkRect2D
*scissor
);
1265 tu6_emit_gras_su_cntl(struct tu_cs
*cs
,
1266 uint32_t gras_su_cntl
,
1270 tu6_emit_depth_bias(struct tu_cs
*cs
,
1271 float constant_factor
,
1273 float slope_factor
);
1276 tu6_emit_stencil_compare_mask(struct tu_cs
*cs
,
1281 tu6_emit_stencil_write_mask(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1284 tu6_emit_stencil_reference(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1287 tu6_emit_blend_constants(struct tu_cs
*cs
, const float constants
[4]);
1289 void tu6_emit_msaa(struct tu_cs
*cs
, VkSampleCountFlagBits samples
);
1291 void tu6_emit_window_scissor(struct tu_cs
*cs
, uint32_t x1
, uint32_t y1
, uint32_t x2
, uint32_t y2
);
1293 void tu6_emit_window_offset(struct tu_cs
*cs
, uint32_t x1
, uint32_t y1
);
1295 struct tu_image_view
;
1298 tu_resolve_sysmem(struct tu_cmd_buffer
*cmd
,
1300 struct tu_image_view
*src
,
1301 struct tu_image_view
*dst
,
1303 const VkRect2D
*rect
);
1306 tu_clear_sysmem_attachment(struct tu_cmd_buffer
*cmd
,
1309 const VkRenderPassBeginInfo
*info
);
1312 tu_clear_gmem_attachment(struct tu_cmd_buffer
*cmd
,
1315 const VkRenderPassBeginInfo
*info
);
1318 tu_load_gmem_attachment(struct tu_cmd_buffer
*cmd
, struct tu_cs
*cs
, uint32_t a
);
1320 /* expose this function to be able to emit load without checking LOAD_OP */
1322 tu_emit_load_gmem_attachment(struct tu_cmd_buffer
*cmd
, struct tu_cs
*cs
, uint32_t a
);
1324 /* note: gmem store can also resolve */
1326 tu_store_gmem_attachment(struct tu_cmd_buffer
*cmd
,
1331 struct tu_userdata_info
*
1332 tu_lookup_user_sgpr(struct tu_pipeline
*pipeline
,
1333 gl_shader_stage stage
,
1336 struct tu_shader_variant
*
1337 tu_get_shader(struct tu_pipeline
*pipeline
, gl_shader_stage stage
);
1339 struct tu_graphics_pipeline_create_info
1342 bool db_depth_clear
;
1343 bool db_stencil_clear
;
1344 bool db_depth_disable_expclear
;
1345 bool db_stencil_disable_expclear
;
1346 bool db_flush_depth_inplace
;
1347 bool db_flush_stencil_inplace
;
1348 bool db_resummarize
;
1349 uint32_t custom_blend_mode
;
1352 enum tu_supported_formats
{
1358 struct tu_native_format
1360 enum a6xx_format fmt
: 8;
1361 enum a3xx_color_swap swap
: 8;
1362 enum a6xx_tile_mode tile_mode
: 8;
1363 enum tu_supported_formats supported
: 8;
1366 struct tu_native_format
tu6_format_vtx(VkFormat format
);
1367 struct tu_native_format
tu6_format_color(VkFormat format
, enum a6xx_tile_mode tile_mode
);
1368 struct tu_native_format
tu6_format_texture(VkFormat format
, enum a6xx_tile_mode tile_mode
);
1370 static inline enum a6xx_format
1371 tu6_base_format(VkFormat format
)
1373 /* note: tu6_format_color doesn't care about tiling for .fmt field */
1374 return tu6_format_color(format
, TILE6_LINEAR
).fmt
;
1377 enum a6xx_depth_format
tu6_pipe2depth(VkFormat format
);
1382 /* The original VkFormat provided by the client. This may not match any
1383 * of the actual surface formats.
1386 VkImageAspectFlags aspects
;
1387 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1388 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1389 VkImageCreateFlags flags
; /** VkImageCreateInfo::flags */
1391 uint32_t level_count
;
1392 uint32_t layer_count
;
1393 VkSampleCountFlagBits samples
;
1395 struct fdl_layout layout
;
1397 unsigned queue_family_mask
;
1401 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1402 VkDeviceMemory owned_memory
;
1404 /* Set when bound */
1406 VkDeviceSize bo_offset
;
1410 tu_image_queue_family_mask(const struct tu_image
*image
,
1412 uint32_t queue_family
);
1414 static inline uint32_t
1415 tu_get_layerCount(const struct tu_image
*image
,
1416 const VkImageSubresourceRange
*range
)
1418 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
1419 ? image
->layer_count
- range
->baseArrayLayer
1420 : range
->layerCount
;
1423 static inline uint32_t
1424 tu_get_levelCount(const struct tu_image
*image
,
1425 const VkImageSubresourceRange
*range
)
1427 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
1428 ? image
->level_count
- range
->baseMipLevel
1429 : range
->levelCount
;
1432 static inline VkDeviceSize
1433 tu_layer_size(struct tu_image
*image
, int level
)
1435 return fdl_layer_stride(&image
->layout
, level
);
1438 static inline uint32_t
1439 tu_image_stride(struct tu_image
*image
, int level
)
1441 return image
->layout
.slices
[level
].pitch
* image
->layout
.cpp
;
1444 /* to get the right pitch for compressed formats */
1445 static inline uint32_t
1446 tu_image_pitch(struct tu_image
*image
, int level
)
1448 uint32_t stride
= tu_image_stride(image
, level
);
1449 return stride
/ vk_format_get_blockwidth(image
->vk_format
);
1452 static inline uint64_t
1453 tu_image_base(struct tu_image
*image
, int level
, int layer
)
1455 return image
->bo
->iova
+ image
->bo_offset
+
1456 fdl_surface_offset(&image
->layout
, level
, layer
);
1459 #define tu_image_base_ref(image, level, layer) \
1461 .bo_offset = (image->bo_offset + fdl_surface_offset(&image->layout, \
1464 #define tu_image_view_base_ref(iview) \
1465 tu_image_base_ref(iview->image, iview->base_mip, iview->base_layer)
1467 static inline VkDeviceSize
1468 tu_image_ubwc_size(struct tu_image
*image
, int level
)
1470 return image
->layout
.ubwc_layer_size
;
1473 static inline uint32_t
1474 tu_image_ubwc_pitch(struct tu_image
*image
, int level
)
1476 return image
->layout
.ubwc_slices
[level
].pitch
;
1479 static inline uint64_t
1480 tu_image_ubwc_surface_offset(struct tu_image
*image
, int level
, int layer
)
1482 return image
->layout
.ubwc_slices
[level
].offset
+
1483 layer
* tu_image_ubwc_size(image
, level
);
1486 static inline uint64_t
1487 tu_image_ubwc_base(struct tu_image
*image
, int level
, int layer
)
1489 return image
->bo
->iova
+ image
->bo_offset
+
1490 tu_image_ubwc_surface_offset(image
, level
, layer
);
1493 #define tu_image_ubwc_base_ref(image, level, layer) \
1495 .bo_offset = (image->bo_offset + tu_image_ubwc_surface_offset(image, \
1498 #define tu_image_view_ubwc_base_ref(iview) \
1499 tu_image_ubwc_base_ref(iview->image, iview->base_mip, iview->base_layer)
1501 #define tu_image_view_ubwc_pitches(iview) \
1502 .pitch = tu_image_ubwc_pitch(iview->image, iview->base_mip), \
1503 .array_pitch = tu_image_ubwc_size(iview->image, iview->base_mip) >> 2
1506 tu6_get_image_tile_mode(struct tu_image
*image
, int level
);
1507 enum a3xx_msaa_samples
1508 tu_msaa_samples(uint32_t samples
);
1509 enum a6xx_tex_fetchsize
1510 tu6_fetchsize(VkFormat format
);
1512 static inline struct tu_native_format
1513 tu6_format_image(struct tu_image
*image
, VkFormat format
, uint32_t level
)
1515 struct tu_native_format fmt
=
1516 tu6_format_color(format
, image
->layout
.tile_mode
);
1517 fmt
.tile_mode
= tu6_get_image_tile_mode(image
, level
);
1521 static inline struct tu_native_format
1522 tu6_format_image_src(struct tu_image
*image
, VkFormat format
, uint32_t level
)
1524 struct tu_native_format fmt
=
1525 tu6_format_texture(format
, image
->layout
.tile_mode
);
1526 fmt
.tile_mode
= tu6_get_image_tile_mode(image
, level
);
1530 struct tu_image_view
1532 struct tu_image
*image
; /**< VkImageViewCreateInfo::image */
1534 VkImageViewType type
;
1535 VkImageAspectFlags aspect_mask
;
1537 uint32_t base_layer
;
1538 uint32_t layer_count
;
1540 uint32_t level_count
;
1541 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1543 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1545 /* Descriptor for use as a storage image as opposed to a sampled image.
1546 * This has a few differences for cube maps (e.g. type).
1548 uint32_t storage_descriptor
[A6XX_TEX_CONST_DWORDS
];
1552 uint32_t descriptor
[A6XX_TEX_SAMP_DWORDS
];
1556 tu_image_create(VkDevice _device
,
1557 const VkImageCreateInfo
*pCreateInfo
,
1558 const VkAllocationCallbacks
*alloc
,
1563 tu_image_from_gralloc(VkDevice device_h
,
1564 const VkImageCreateInfo
*base_info
,
1565 const VkNativeBufferANDROID
*gralloc_info
,
1566 const VkAllocationCallbacks
*alloc
,
1567 VkImage
*out_image_h
);
1570 tu_image_view_init(struct tu_image_view
*view
,
1571 struct tu_device
*device
,
1572 const VkImageViewCreateInfo
*pCreateInfo
);
1574 struct tu_buffer_view
1576 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1578 struct tu_buffer
*buffer
;
1581 tu_buffer_view_init(struct tu_buffer_view
*view
,
1582 struct tu_device
*device
,
1583 const VkBufferViewCreateInfo
*pCreateInfo
);
1585 static inline struct VkExtent3D
1586 tu_sanitize_image_extent(const VkImageType imageType
,
1587 const struct VkExtent3D imageExtent
)
1589 switch (imageType
) {
1590 case VK_IMAGE_TYPE_1D
:
1591 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
1592 case VK_IMAGE_TYPE_2D
:
1593 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
1594 case VK_IMAGE_TYPE_3D
:
1597 unreachable("invalid image type");
1601 static inline struct VkOffset3D
1602 tu_sanitize_image_offset(const VkImageType imageType
,
1603 const struct VkOffset3D imageOffset
)
1605 switch (imageType
) {
1606 case VK_IMAGE_TYPE_1D
:
1607 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
1608 case VK_IMAGE_TYPE_2D
:
1609 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
1610 case VK_IMAGE_TYPE_3D
:
1613 unreachable("invalid image type");
1617 struct tu_attachment_info
1619 struct tu_image_view
*attachment
;
1622 struct tu_framebuffer
1628 uint32_t attachment_count
;
1629 struct tu_attachment_info attachments
[0];
1632 struct tu_subpass_attachment
1634 uint32_t attachment
;
1639 uint32_t input_count
;
1640 uint32_t color_count
;
1641 struct tu_subpass_attachment
*input_attachments
;
1642 struct tu_subpass_attachment
*color_attachments
;
1643 struct tu_subpass_attachment
*resolve_attachments
;
1644 struct tu_subpass_attachment depth_stencil_attachment
;
1646 VkSampleCountFlagBits samples
;
1649 struct tu_render_pass_attachment
1654 VkAttachmentLoadOp load_op
;
1655 VkAttachmentLoadOp stencil_load_op
;
1656 VkAttachmentStoreOp store_op
;
1657 VkAttachmentStoreOp stencil_store_op
;
1658 int32_t gmem_offset
;
1661 struct tu_render_pass
1663 uint32_t attachment_count
;
1664 uint32_t subpass_count
;
1665 uint32_t gmem_pixels
;
1666 struct tu_subpass_attachment
*subpass_attachments
;
1667 struct tu_render_pass_attachment
*attachments
;
1668 struct tu_subpass subpasses
[0];
1672 tu_device_init_meta(struct tu_device
*device
);
1674 tu_device_finish_meta(struct tu_device
*device
);
1676 struct tu_query_pool
1681 uint32_t pipeline_statistics
;
1688 uint32_t temp_syncobj
;
1692 tu_set_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1693 VkPipelineBindPoint bind_point
,
1694 struct tu_descriptor_set
*set
,
1698 tu_update_descriptor_sets(struct tu_device
*device
,
1699 struct tu_cmd_buffer
*cmd_buffer
,
1700 VkDescriptorSet overrideSet
,
1701 uint32_t descriptorWriteCount
,
1702 const VkWriteDescriptorSet
*pDescriptorWrites
,
1703 uint32_t descriptorCopyCount
,
1704 const VkCopyDescriptorSet
*pDescriptorCopies
);
1707 tu_update_descriptor_set_with_template(
1708 struct tu_device
*device
,
1709 struct tu_cmd_buffer
*cmd_buffer
,
1710 struct tu_descriptor_set
*set
,
1711 VkDescriptorUpdateTemplate descriptorUpdateTemplate
,
1715 tu_meta_push_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1716 VkPipelineBindPoint pipelineBindPoint
,
1717 VkPipelineLayout _layout
,
1719 uint32_t descriptorWriteCount
,
1720 const VkWriteDescriptorSet
*pDescriptorWrites
);
1723 tu_drm_get_gpu_id(const struct tu_physical_device
*dev
, uint32_t *id
);
1726 tu_drm_get_gmem_size(const struct tu_physical_device
*dev
, uint32_t *size
);
1729 tu_drm_get_gmem_base(const struct tu_physical_device
*dev
, uint64_t *base
);
1732 tu_drm_submitqueue_new(const struct tu_device
*dev
,
1734 uint32_t *queue_id
);
1737 tu_drm_submitqueue_close(const struct tu_device
*dev
, uint32_t queue_id
);
1740 tu_gem_new(const struct tu_device
*dev
, uint64_t size
, uint32_t flags
);
1742 tu_gem_import_dmabuf(const struct tu_device
*dev
,
1746 tu_gem_export_dmabuf(const struct tu_device
*dev
, uint32_t gem_handle
);
1748 tu_gem_close(const struct tu_device
*dev
, uint32_t gem_handle
);
1750 tu_gem_info_offset(const struct tu_device
*dev
, uint32_t gem_handle
);
1752 tu_gem_info_iova(const struct tu_device
*dev
, uint32_t gem_handle
);
1754 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1756 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1758 return (struct __tu_type *) _handle; \
1761 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1763 return (__VkType) _obj; \
1766 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1768 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1770 return (struct __tu_type *) (uintptr_t) _handle; \
1773 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1775 return (__VkType)(uintptr_t) _obj; \
1778 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1779 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1781 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer
, VkCommandBuffer
)
1782 TU_DEFINE_HANDLE_CASTS(tu_device
, VkDevice
)
1783 TU_DEFINE_HANDLE_CASTS(tu_instance
, VkInstance
)
1784 TU_DEFINE_HANDLE_CASTS(tu_physical_device
, VkPhysicalDevice
)
1785 TU_DEFINE_HANDLE_CASTS(tu_queue
, VkQueue
)
1787 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool
, VkCommandPool
)
1788 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer
, VkBuffer
)
1789 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view
, VkBufferView
)
1790 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool
, VkDescriptorPool
)
1791 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set
, VkDescriptorSet
)
1792 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout
,
1793 VkDescriptorSetLayout
)
1794 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template
,
1795 VkDescriptorUpdateTemplate
)
1796 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory
, VkDeviceMemory
)
1797 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence
, VkFence
)
1798 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event
, VkEvent
)
1799 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer
, VkFramebuffer
)
1800 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image
, VkImage
)
1801 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view
, VkImageView
);
1802 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache
, VkPipelineCache
)
1803 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline
, VkPipeline
)
1804 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout
, VkPipelineLayout
)
1805 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool
, VkQueryPool
)
1806 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass
, VkRenderPass
)
1807 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler
, VkSampler
)
1808 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module
, VkShaderModule
)
1809 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore
, VkSemaphore
)
1811 #endif /* TU_PRIVATE_H */