2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
43 #define VG(x) ((void)0)
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
61 #include "fdl/freedreno_layout.h"
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
66 /* Pre-declarations needed for WSI entrypoints */
69 typedef struct xcb_connection_t xcb_connection_t
;
70 typedef uint32_t xcb_visualid_t
;
71 typedef uint32_t xcb_window_t
;
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
78 #include "tu_entrypoints.h"
80 #include "vk_format.h"
83 #define MAX_VERTEX_ATTRIBS 32
85 #define MAX_VSC_PIPES 32
86 #define MAX_VIEWPORTS 1
87 #define MAX_SCISSORS 16
88 #define MAX_DISCARD_RECTANGLES 4
89 #define MAX_PUSH_CONSTANTS_SIZE 128
90 #define MAX_PUSH_DESCRIPTORS 32
91 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
92 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
93 #define MAX_DYNAMIC_BUFFERS \
94 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
95 #define MAX_SAMPLES_LOG2 4
96 #define NUM_META_FS_KEYS 13
97 #define TU_MAX_DRM_DEVICES 8
99 /* The Qualcomm driver exposes 0x20000058 */
100 #define MAX_STORAGE_BUFFER_RANGE 0x20000000
102 #define NUM_DEPTH_CLEAR_PIPELINES 3
105 * This is the point we switch from using CP to compute shader
106 * for certain buffer operations.
108 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
110 #define A6XX_TEX_CONST_DWORDS 16
111 #define A6XX_TEX_SAMP_DWORDS 4
116 TU_MEM_HEAP_VRAM_CPU_ACCESS
,
124 TU_MEM_TYPE_GTT_WRITE_COMBINE
,
125 TU_MEM_TYPE_VRAM_CPU_ACCESS
,
126 TU_MEM_TYPE_GTT_CACHED
,
130 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
132 static inline uint32_t
133 align_u32(uint32_t v
, uint32_t a
)
135 assert(a
!= 0 && a
== (a
& -a
));
136 return (v
+ a
- 1) & ~(a
- 1);
139 static inline uint32_t
140 align_u32_npot(uint32_t v
, uint32_t a
)
142 return (v
+ a
- 1) / a
* a
;
145 static inline uint64_t
146 align_u64(uint64_t v
, uint64_t a
)
148 assert(a
!= 0 && a
== (a
& -a
));
149 return (v
+ a
- 1) & ~(a
- 1);
152 static inline int32_t
153 align_i32(int32_t v
, int32_t a
)
155 assert(a
!= 0 && a
== (a
& -a
));
156 return (v
+ a
- 1) & ~(a
- 1);
159 /** Alignment must be a power of 2. */
161 tu_is_aligned(uintmax_t n
, uintmax_t a
)
163 assert(a
== (a
& -a
));
164 return (n
& (a
- 1)) == 0;
167 static inline uint32_t
168 round_up_u32(uint32_t v
, uint32_t a
)
170 return (v
+ a
- 1) / a
;
173 static inline uint64_t
174 round_up_u64(uint64_t v
, uint64_t a
)
176 return (v
+ a
- 1) / a
;
179 static inline uint32_t
180 tu_minify(uint32_t n
, uint32_t levels
)
182 if (unlikely(n
== 0))
185 return MAX2(n
>> levels
, 1);
188 tu_clamp_f(float f
, float min
, float max
)
201 tu_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
203 if (*inout_mask
& clear_mask
) {
204 *inout_mask
&= ~clear_mask
;
211 #define for_each_bit(b, dword) \
212 for (uint32_t __dword = (dword); \
213 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
215 #define typed_memcpy(dest, src, count) \
217 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
218 memcpy((dest), (src), (count) * sizeof(*(src))); \
221 #define COND(bool, val) ((bool) ? (val) : 0)
223 /* Whenever we generate an error, pass it through this function. Useful for
224 * debugging, where we can break on it. Only call at error site, not when
225 * propagating errors. Might be useful to plug in a stack trace here.
231 __vk_errorf(struct tu_instance
*instance
,
238 #define vk_error(instance, error) \
239 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
240 #define vk_errorf(instance, error, format, ...) \
241 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
244 __tu_finishme(const char *file
, int line
, const char *format
, ...)
247 tu_loge(const char *format
, ...) tu_printflike(1, 2);
249 tu_loge_v(const char *format
, va_list va
);
251 tu_logi(const char *format
, ...) tu_printflike(1, 2);
253 tu_logi_v(const char *format
, va_list va
);
256 * Print a FINISHME message, including its source location.
258 #define tu_finishme(format, ...) \
260 static bool reported = false; \
262 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
267 /* A non-fatal assert. Useful for debugging. */
269 #define tu_assert(x) \
271 if (unlikely(!(x))) \
272 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
278 /* Suppress -Wunused in stub functions */
279 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
281 __tu_use_args(int ignore
, ...)
287 tu_finishme("stub %s", __func__); \
291 tu_lookup_entrypoint_unchecked(const char *name
);
293 tu_lookup_entrypoint_checked(
295 uint32_t core_version
,
296 const struct tu_instance_extension_table
*instance
,
297 const struct tu_device_extension_table
*device
);
299 struct tu_physical_device
301 VK_LOADER_DATA _loader_data
;
303 struct tu_instance
*instance
;
306 char name
[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE
];
307 uint8_t driver_uuid
[VK_UUID_SIZE
];
308 uint8_t device_uuid
[VK_UUID_SIZE
];
309 uint8_t cache_uuid
[VK_UUID_SIZE
];
311 struct wsi_device wsi_device
;
319 uint32_t ccu_offset_gmem
;
320 uint32_t ccu_offset_bypass
;
321 #define GMEM_ALIGN_W 16
322 #define GMEM_ALIGN_H 4
325 uint32_t RB_UNKNOWN_8E04_blit
; /* for CP_BLIT's */
326 uint32_t PC_UNKNOWN_9805
;
327 uint32_t SP_UNKNOWN_A0F8
;
330 /* This is the drivers on-disk cache used as a fallback as opposed to
331 * the pipeline cache defined by apps.
333 struct disk_cache
*disk_cache
;
335 struct tu_device_extension_table supported_extensions
;
340 TU_DEBUG_STARTUP
= 1 << 0,
341 TU_DEBUG_NIR
= 1 << 1,
342 TU_DEBUG_IR3
= 1 << 2,
343 TU_DEBUG_NOBIN
= 1 << 3,
344 TU_DEBUG_SYSMEM
= 1 << 4,
345 TU_DEBUG_FORCEBIN
= 1 << 5,
350 VK_LOADER_DATA _loader_data
;
352 VkAllocationCallbacks alloc
;
354 uint32_t api_version
;
355 int physical_device_count
;
356 struct tu_physical_device physical_devices
[TU_MAX_DRM_DEVICES
];
358 enum tu_debug_flags debug_flags
;
360 struct vk_debug_report_instance debug_report_callbacks
;
362 struct tu_instance_extension_table enabled_extensions
;
366 tu_wsi_init(struct tu_physical_device
*physical_device
);
368 tu_wsi_finish(struct tu_physical_device
*physical_device
);
371 tu_instance_extension_supported(const char *name
);
373 tu_physical_device_api_version(struct tu_physical_device
*dev
);
375 tu_physical_device_extension_supported(struct tu_physical_device
*dev
,
380 struct tu_pipeline_cache
382 struct tu_device
*device
;
383 pthread_mutex_t mutex
;
387 uint32_t kernel_count
;
388 struct cache_entry
**hash_table
;
391 VkAllocationCallbacks alloc
;
394 struct tu_pipeline_key
399 tu_pipeline_cache_init(struct tu_pipeline_cache
*cache
,
400 struct tu_device
*device
);
402 tu_pipeline_cache_finish(struct tu_pipeline_cache
*cache
);
404 tu_pipeline_cache_load(struct tu_pipeline_cache
*cache
,
408 struct tu_shader_variant
;
411 tu_create_shader_variants_from_pipeline_cache(
412 struct tu_device
*device
,
413 struct tu_pipeline_cache
*cache
,
414 const unsigned char *sha1
,
415 struct tu_shader_variant
**variants
);
418 tu_pipeline_cache_insert_shaders(struct tu_device
*device
,
419 struct tu_pipeline_cache
*cache
,
420 const unsigned char *sha1
,
421 struct tu_shader_variant
**variants
,
422 const void *const *codes
,
423 const unsigned *code_sizes
);
427 VkAllocationCallbacks alloc
;
429 struct tu_pipeline_cache cache
;
433 #define TU_QUEUE_GENERAL 0
435 #define TU_MAX_QUEUE_FAMILIES 1
439 struct wsi_fence
*fence_wsi
;
445 tu_fence_init(struct tu_fence
*fence
, bool signaled
);
447 tu_fence_finish(struct tu_fence
*fence
);
449 tu_fence_update_fd(struct tu_fence
*fence
, int fd
);
451 tu_fence_copy(struct tu_fence
*fence
, const struct tu_fence
*src
);
453 tu_fence_signal(struct tu_fence
*fence
);
455 tu_fence_wait_idle(struct tu_fence
*fence
);
459 VK_LOADER_DATA _loader_data
;
460 struct tu_device
*device
;
461 uint32_t queue_family_index
;
463 VkDeviceQueueCreateFlags flags
;
465 uint32_t msm_queue_id
;
466 struct tu_fence submit_fence
;
479 VK_LOADER_DATA _loader_data
;
481 VkAllocationCallbacks alloc
;
483 struct tu_instance
*instance
;
485 struct tu_meta_state meta_state
;
487 struct tu_queue
*queues
[TU_MAX_QUEUE_FAMILIES
];
488 int queue_count
[TU_MAX_QUEUE_FAMILIES
];
490 struct tu_physical_device
*physical_device
;
492 struct ir3_compiler
*compiler
;
494 /* Backup in-memory cache to be used if the app doesn't provide one */
495 struct tu_pipeline_cache
*mem_cache
;
497 struct tu_bo vsc_data
;
498 struct tu_bo vsc_data2
;
499 uint32_t vsc_data_pitch
;
500 uint32_t vsc_data2_pitch
;
502 struct tu_bo border_color
;
504 struct list_head shader_slabs
;
505 mtx_t shader_slab_mutex
;
507 struct tu_device_extension_table enabled_extensions
;
511 tu_bo_init_new(struct tu_device
*dev
, struct tu_bo
*bo
, uint64_t size
);
513 tu_bo_init_dmabuf(struct tu_device
*dev
,
518 tu_bo_export_dmabuf(struct tu_device
*dev
, struct tu_bo
*bo
);
520 tu_bo_finish(struct tu_device
*dev
, struct tu_bo
*bo
);
522 tu_bo_map(struct tu_device
*dev
, struct tu_bo
*bo
);
527 const struct tu_bo
*bo
;
533 struct ts_cs_memory
{
542 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
543 * is full. tu_cs_begin must be called before command packet emission and
544 * tu_cs_end must be called after.
546 * This mode may create multiple entries internally. The entries must be
547 * submitted together.
552 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
553 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
556 * This mode does not create any entry or any BO.
561 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
562 * command packet emission. tu_cs_begin_sub_stream must be called to get a
563 * sub-stream to emit comamnd packets to. When done with the sub-stream,
564 * tu_cs_end_sub_stream must be called.
566 * This mode does not create any entry internally.
568 TU_CS_MODE_SUB_STREAM
,
575 uint32_t *reserved_end
;
578 struct tu_device
*device
;
579 enum tu_cs_mode mode
;
580 uint32_t next_bo_size
;
582 struct tu_cs_entry
*entries
;
583 uint32_t entry_count
;
584 uint32_t entry_capacity
;
588 uint32_t bo_capacity
;
590 /* state for cond_exec_start/cond_exec_end */
592 uint32_t *cond_dwords
;
595 struct tu_device_memory
600 /* for dedicated allocations */
601 struct tu_image
*image
;
602 struct tu_buffer
*buffer
;
609 struct tu_descriptor_range
615 struct tu_descriptor_set
617 const struct tu_descriptor_set_layout
*layout
;
621 uint32_t *mapped_ptr
;
622 struct tu_descriptor_range
*dynamic_descriptors
;
624 struct tu_bo
*descriptors
[0];
627 struct tu_push_descriptor_set
629 struct tu_descriptor_set set
;
633 struct tu_descriptor_pool_entry
637 struct tu_descriptor_set
*set
;
640 struct tu_descriptor_pool
643 uint64_t current_offset
;
646 uint8_t *host_memory_base
;
647 uint8_t *host_memory_ptr
;
648 uint8_t *host_memory_end
;
650 uint32_t entry_count
;
651 uint32_t max_entry_count
;
652 struct tu_descriptor_pool_entry entries
[0];
655 struct tu_descriptor_update_template_entry
657 VkDescriptorType descriptor_type
;
659 /* The number of descriptors to update */
660 uint32_t descriptor_count
;
662 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
666 /* In dwords. Not valid/used for dynamic descriptors */
669 uint32_t buffer_offset
;
671 /* Only valid for combined image samplers and samplers */
672 uint16_t has_sampler
;
678 /* For push descriptors */
679 const uint32_t *immutable_samplers
;
682 struct tu_descriptor_update_template
684 uint32_t entry_count
;
685 VkPipelineBindPoint bind_point
;
686 struct tu_descriptor_update_template_entry entry
[0];
693 VkBufferUsageFlags usage
;
694 VkBufferCreateFlags flags
;
697 VkDeviceSize bo_offset
;
700 static inline uint64_t
701 tu_buffer_iova(struct tu_buffer
*buffer
)
703 return buffer
->bo
->iova
+ buffer
->bo_offset
;
706 enum tu_dynamic_state_bits
708 TU_DYNAMIC_VIEWPORT
= 1 << 0,
709 TU_DYNAMIC_SCISSOR
= 1 << 1,
710 TU_DYNAMIC_LINE_WIDTH
= 1 << 2,
711 TU_DYNAMIC_DEPTH_BIAS
= 1 << 3,
712 TU_DYNAMIC_BLEND_CONSTANTS
= 1 << 4,
713 TU_DYNAMIC_DEPTH_BOUNDS
= 1 << 5,
714 TU_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6,
715 TU_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7,
716 TU_DYNAMIC_STENCIL_REFERENCE
= 1 << 8,
717 TU_DYNAMIC_DISCARD_RECTANGLE
= 1 << 9,
718 TU_DYNAMIC_ALL
= (1 << 10) - 1,
721 struct tu_vertex_binding
723 struct tu_buffer
*buffer
;
727 struct tu_viewport_state
730 VkViewport viewports
[MAX_VIEWPORTS
];
733 struct tu_scissor_state
736 VkRect2D scissors
[MAX_SCISSORS
];
739 struct tu_discard_rectangle_state
742 VkRect2D rectangles
[MAX_DISCARD_RECTANGLES
];
745 struct tu_dynamic_state
748 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
749 * Defines the set of saved dynamic state.
753 struct tu_viewport_state viewport
;
755 struct tu_scissor_state scissor
;
766 float blend_constants
[4];
778 } stencil_compare_mask
;
784 } stencil_write_mask
;
792 struct tu_discard_rectangle_state discard_rectangle
;
795 extern const struct tu_dynamic_state default_dynamic_state
;
798 tu_get_debug_option_name(int id
);
801 tu_get_perftest_option_name(int id
);
803 struct tu_descriptor_state
805 struct tu_descriptor_set
*sets
[MAX_SETS
];
807 struct tu_push_descriptor_set push_set
;
809 uint64_t dynamic_buffers
[MAX_DYNAMIC_BUFFERS
];
820 struct tu_tiling_config
822 VkRect2D render_area
;
824 /* position and size of the first tile */
826 /* number of tiles */
827 VkExtent2D tile_count
;
829 /* size of the first VSC pipe */
831 /* number of VSC pipes */
832 VkExtent2D pipe_count
;
834 /* pipe register values */
835 uint32_t pipe_config
[MAX_VSC_PIPES
];
836 uint32_t pipe_sizes
[MAX_VSC_PIPES
];
838 /* Whether sysmem rendering must be used */
842 enum tu_cmd_dirty_bits
844 TU_CMD_DIRTY_PIPELINE
= 1 << 0,
845 TU_CMD_DIRTY_COMPUTE_PIPELINE
= 1 << 1,
846 TU_CMD_DIRTY_VERTEX_BUFFERS
= 1 << 2,
847 TU_CMD_DIRTY_DESCRIPTOR_SETS
= 1 << 3,
848 TU_CMD_DIRTY_PUSH_CONSTANTS
= 1 << 4,
849 TU_CMD_DIRTY_STREAMOUT_BUFFERS
= 1 << 5,
851 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 16,
852 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 17,
853 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 18,
854 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 19,
855 TU_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 20,
856 TU_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 21,
859 struct tu_streamout_state
{
860 uint16_t stride
[IR3_MAX_SO_BUFFERS
];
861 uint32_t ncomp
[IR3_MAX_SO_BUFFERS
];
862 uint32_t prog
[IR3_MAX_SO_OUTPUTS
* 2];
864 uint32_t vpc_so_buf_cntl
;
871 struct tu_pipeline
*pipeline
;
872 struct tu_pipeline
*compute_pipeline
;
877 struct tu_buffer
*buffers
[MAX_VBS
];
878 VkDeviceSize offsets
[MAX_VBS
];
881 struct tu_dynamic_state dynamic
;
883 /* Stream output buffers */
886 struct tu_buffer
*buffers
[IR3_MAX_SO_BUFFERS
];
887 VkDeviceSize offsets
[IR3_MAX_SO_BUFFERS
];
888 VkDeviceSize sizes
[IR3_MAX_SO_BUFFERS
];
891 uint8_t streamout_reset
;
892 uint8_t streamout_enabled
;
895 struct tu_buffer
*index_buffer
;
896 uint64_t index_offset
;
898 uint32_t max_index_count
;
901 const struct tu_render_pass
*pass
;
902 const struct tu_subpass
*subpass
;
903 const struct tu_framebuffer
*framebuffer
;
905 struct tu_tiling_config tiling_config
;
907 struct tu_cs_entry tile_store_ib
;
912 VkAllocationCallbacks alloc
;
913 struct list_head cmd_buffers
;
914 struct list_head free_cmd_buffers
;
915 uint32_t queue_family_index
;
918 struct tu_cmd_buffer_upload
923 struct list_head list
;
926 enum tu_cmd_buffer_status
928 TU_CMD_BUFFER_STATUS_INVALID
,
929 TU_CMD_BUFFER_STATUS_INITIAL
,
930 TU_CMD_BUFFER_STATUS_RECORDING
,
931 TU_CMD_BUFFER_STATUS_EXECUTABLE
,
932 TU_CMD_BUFFER_STATUS_PENDING
,
939 struct drm_msm_gem_submit_bo
*bo_infos
;
942 #define TU_BO_LIST_FAILED (~0)
945 tu_bo_list_init(struct tu_bo_list
*list
);
947 tu_bo_list_destroy(struct tu_bo_list
*list
);
949 tu_bo_list_reset(struct tu_bo_list
*list
);
951 tu_bo_list_add(struct tu_bo_list
*list
,
952 const struct tu_bo
*bo
,
955 tu_bo_list_merge(struct tu_bo_list
*list
, const struct tu_bo_list
*other
);
957 /* This struct defines the layout of the scratch_bo */
960 uint32_t seqno
; /* seqno for async CP_EVENT_WRITE, etc */
962 volatile uint32_t vsc_overflow
;
964 /* flag set from cmdstream when VSC overflow detected: */
965 uint32_t vsc_scratch
;
970 /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
977 #define ctrl_offset(member) offsetof(struct tu6_control, member)
981 VK_LOADER_DATA _loader_data
;
983 struct tu_device
*device
;
985 struct tu_cmd_pool
*pool
;
986 struct list_head pool_link
;
988 VkCommandBufferUsageFlags usage_flags
;
989 VkCommandBufferLevel level
;
990 enum tu_cmd_buffer_status status
;
992 struct tu_cmd_state state
;
993 struct tu_vertex_binding vertex_bindings
[MAX_VBS
];
994 uint32_t queue_family_index
;
996 uint32_t push_constants
[MAX_PUSH_CONSTANTS_SIZE
/ 4];
997 VkShaderStageFlags push_constant_stages
;
998 struct tu_descriptor_set meta_push_descriptors
;
1000 struct tu_descriptor_state descriptors
[VK_PIPELINE_BIND_POINT_RANGE_SIZE
];
1002 struct tu_cmd_buffer_upload upload
;
1004 VkResult record_result
;
1006 struct tu_bo_list bo_list
;
1008 struct tu_cs draw_cs
;
1009 struct tu_cs draw_epilogue_cs
;
1010 struct tu_cs sub_cs
;
1012 struct tu_bo scratch_bo
;
1013 uint32_t scratch_seqno
;
1015 struct tu_bo vsc_data
;
1016 struct tu_bo vsc_data2
;
1017 uint32_t vsc_data_pitch
;
1018 uint32_t vsc_data2_pitch
;
1024 /* Temporary struct for tracking a register state to be written, used by
1025 * a6xx-pack.h and tu_cs_emit_regs()
1027 struct tu_reg_value
{
1038 tu6_emit_event_write(struct tu_cmd_buffer
*cmd
,
1040 enum vgt_event_type event
,
1044 tu_get_memory_fd(struct tu_device
*device
,
1045 struct tu_device_memory
*memory
,
1048 static inline struct tu_descriptor_state
*
1049 tu_get_descriptors_state(struct tu_cmd_buffer
*cmd_buffer
,
1050 VkPipelineBindPoint bind_point
)
1052 return &cmd_buffer
->descriptors
[bind_point
];
1056 * Takes x,y,z as exact numbers of invocations, instead of blocks.
1058 * Limitations: Can't call normal dispatch functions without binding or
1060 * the compute pipeline.
1063 tu_unaligned_dispatch(struct tu_cmd_buffer
*cmd_buffer
,
1073 struct tu_shader_module
;
1075 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
1076 #define TU_HASH_SHADER_SISCHED (1 << 1)
1077 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
1079 tu_hash_shaders(unsigned char *hash
,
1080 const VkPipelineShaderStageCreateInfo
**stages
,
1081 const struct tu_pipeline_layout
*layout
,
1082 const struct tu_pipeline_key
*key
,
1085 static inline gl_shader_stage
1086 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1088 assert(__builtin_popcount(vk_stage
) == 1);
1089 return ffs(vk_stage
) - 1;
1092 static inline VkShaderStageFlagBits
1093 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1095 return (1 << mesa_stage
);
1098 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1100 #define tu_foreach_stage(stage, stage_bits) \
1101 for (gl_shader_stage stage, \
1102 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1103 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1105 struct tu_shader_module
1107 unsigned char sha1
[20];
1110 const uint32_t *code
[0];
1113 struct tu_shader_compile_options
1115 struct ir3_shader_key key
;
1118 bool include_binning_pass
;
1121 struct tu_descriptor_map
1123 /* TODO: avoid fixed size array/justify the size */
1124 unsigned num
; /* number of array entries */
1125 unsigned num_desc
; /* Number of descriptors (sum of array_size[]) */
1129 int array_size
[128];
1132 struct tu_push_constant_range
1140 struct ir3_shader ir3_shader
;
1142 struct tu_push_constant_range push_consts
;
1143 struct tu_descriptor_map texture_map
;
1144 struct tu_descriptor_map sampler_map
;
1145 struct tu_descriptor_map ubo_map
;
1146 struct tu_descriptor_map ssbo_map
;
1147 struct tu_descriptor_map image_map
;
1149 /* This may be true for vertex shaders. When true, variants[1] is the
1150 * binning variant and binning_binary is non-NULL.
1152 bool has_binning_pass
;
1155 void *binning_binary
;
1157 struct ir3_shader_variant variants
[0];
1161 tu_shader_create(struct tu_device
*dev
,
1162 gl_shader_stage stage
,
1163 const VkPipelineShaderStageCreateInfo
*stage_info
,
1164 struct tu_pipeline_layout
*layout
,
1165 const VkAllocationCallbacks
*alloc
);
1168 tu_shader_destroy(struct tu_device
*dev
,
1169 struct tu_shader
*shader
,
1170 const VkAllocationCallbacks
*alloc
);
1173 tu_shader_compile_options_init(
1174 struct tu_shader_compile_options
*options
,
1175 const VkGraphicsPipelineCreateInfo
*pipeline_info
);
1178 tu_shader_compile(struct tu_device
*dev
,
1179 struct tu_shader
*shader
,
1180 const struct tu_shader
*next_stage
,
1181 const struct tu_shader_compile_options
*options
,
1182 const VkAllocationCallbacks
*alloc
);
1184 struct tu_program_descriptor_linkage
1186 struct ir3_ubo_analysis_state ubo_state
;
1187 struct ir3_const_state const_state
;
1191 struct tu_push_constant_range push_consts
;
1192 struct tu_descriptor_map texture_map
;
1193 struct tu_descriptor_map sampler_map
;
1194 struct tu_descriptor_map ubo_map
;
1195 struct tu_descriptor_map ssbo_map
;
1196 struct tu_descriptor_map image_map
;
1203 struct tu_dynamic_state dynamic_state
;
1205 struct tu_pipeline_layout
*layout
;
1207 bool need_indirect_descriptor_sets
;
1208 VkShaderStageFlags active_stages
;
1210 struct tu_streamout_state streamout
;
1214 struct tu_bo binary_bo
;
1215 struct tu_cs_entry state_ib
;
1216 struct tu_cs_entry binning_state_ib
;
1218 struct tu_program_descriptor_linkage link
[MESA_SHADER_STAGES
];
1223 uint8_t bindings
[MAX_VERTEX_ATTRIBS
];
1226 uint8_t binning_bindings
[MAX_VERTEX_ATTRIBS
];
1227 uint32_t binning_count
;
1229 struct tu_cs_entry state_ib
;
1230 struct tu_cs_entry binning_state_ib
;
1235 enum pc_di_primtype primtype
;
1236 bool primitive_restart
;
1241 struct tu_cs_entry state_ib
;
1246 uint32_t gras_su_cntl
;
1247 struct tu_cs_entry state_ib
;
1252 struct tu_cs_entry state_ib
;
1257 struct tu_cs_entry state_ib
;
1262 uint32_t local_size
[3];
1267 tu6_emit_viewport(struct tu_cs
*cs
, const VkViewport
*viewport
);
1270 tu6_emit_scissor(struct tu_cs
*cs
, const VkRect2D
*scissor
);
1273 tu6_emit_gras_su_cntl(struct tu_cs
*cs
,
1274 uint32_t gras_su_cntl
,
1278 tu6_emit_depth_bias(struct tu_cs
*cs
,
1279 float constant_factor
,
1281 float slope_factor
);
1284 tu6_emit_stencil_compare_mask(struct tu_cs
*cs
,
1289 tu6_emit_stencil_write_mask(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1292 tu6_emit_stencil_reference(struct tu_cs
*cs
, uint32_t front
, uint32_t back
);
1295 tu6_emit_blend_constants(struct tu_cs
*cs
, const float constants
[4]);
1297 void tu6_emit_msaa(struct tu_cs
*cs
, VkSampleCountFlagBits samples
);
1299 void tu6_emit_window_scissor(struct tu_cs
*cs
, uint32_t x1
, uint32_t y1
, uint32_t x2
, uint32_t y2
);
1301 void tu6_emit_window_offset(struct tu_cs
*cs
, uint32_t x1
, uint32_t y1
);
1303 struct tu_image_view
;
1306 tu_resolve_sysmem(struct tu_cmd_buffer
*cmd
,
1308 struct tu_image_view
*src
,
1309 struct tu_image_view
*dst
,
1311 const VkRect2D
*rect
);
1314 tu_clear_sysmem_attachment(struct tu_cmd_buffer
*cmd
,
1317 const VkRenderPassBeginInfo
*info
);
1320 tu_clear_gmem_attachment(struct tu_cmd_buffer
*cmd
,
1323 const VkRenderPassBeginInfo
*info
);
1326 tu_load_gmem_attachment(struct tu_cmd_buffer
*cmd
, struct tu_cs
*cs
, uint32_t a
);
1328 /* expose this function to be able to emit load without checking LOAD_OP */
1330 tu_emit_load_gmem_attachment(struct tu_cmd_buffer
*cmd
, struct tu_cs
*cs
, uint32_t a
);
1332 /* note: gmem store can also resolve */
1334 tu_store_gmem_attachment(struct tu_cmd_buffer
*cmd
,
1339 struct tu_userdata_info
*
1340 tu_lookup_user_sgpr(struct tu_pipeline
*pipeline
,
1341 gl_shader_stage stage
,
1344 struct tu_shader_variant
*
1345 tu_get_shader(struct tu_pipeline
*pipeline
, gl_shader_stage stage
);
1347 struct tu_graphics_pipeline_create_info
1350 bool db_depth_clear
;
1351 bool db_stencil_clear
;
1352 bool db_depth_disable_expclear
;
1353 bool db_stencil_disable_expclear
;
1354 bool db_flush_depth_inplace
;
1355 bool db_flush_stencil_inplace
;
1356 bool db_resummarize
;
1357 uint32_t custom_blend_mode
;
1360 enum tu_supported_formats
{
1366 struct tu_native_format
1368 enum a6xx_format fmt
: 8;
1369 enum a3xx_color_swap swap
: 8;
1370 enum a6xx_tile_mode tile_mode
: 8;
1371 enum tu_supported_formats supported
: 8;
1374 struct tu_native_format
tu6_format_vtx(VkFormat format
);
1375 struct tu_native_format
tu6_format_color(VkFormat format
, enum a6xx_tile_mode tile_mode
);
1376 struct tu_native_format
tu6_format_texture(VkFormat format
, enum a6xx_tile_mode tile_mode
);
1378 static inline enum a6xx_format
1379 tu6_base_format(VkFormat format
)
1381 /* note: tu6_format_color doesn't care about tiling for .fmt field */
1382 return tu6_format_color(format
, TILE6_LINEAR
).fmt
;
1385 enum a6xx_depth_format
tu6_pipe2depth(VkFormat format
);
1390 /* The original VkFormat provided by the client. This may not match any
1391 * of the actual surface formats.
1394 VkImageAspectFlags aspects
;
1395 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1396 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1397 VkImageCreateFlags flags
; /** VkImageCreateInfo::flags */
1399 uint32_t level_count
;
1400 uint32_t layer_count
;
1401 VkSampleCountFlagBits samples
;
1403 struct fdl_layout layout
;
1405 unsigned queue_family_mask
;
1409 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1410 VkDeviceMemory owned_memory
;
1412 /* Set when bound */
1414 VkDeviceSize bo_offset
;
1418 tu_image_queue_family_mask(const struct tu_image
*image
,
1420 uint32_t queue_family
);
1422 static inline uint32_t
1423 tu_get_layerCount(const struct tu_image
*image
,
1424 const VkImageSubresourceRange
*range
)
1426 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
1427 ? image
->layer_count
- range
->baseArrayLayer
1428 : range
->layerCount
;
1431 static inline uint32_t
1432 tu_get_levelCount(const struct tu_image
*image
,
1433 const VkImageSubresourceRange
*range
)
1435 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
1436 ? image
->level_count
- range
->baseMipLevel
1437 : range
->levelCount
;
1440 static inline VkDeviceSize
1441 tu_layer_size(struct tu_image
*image
, int level
)
1443 return fdl_layer_stride(&image
->layout
, level
);
1446 static inline uint32_t
1447 tu_image_stride(struct tu_image
*image
, int level
)
1449 return image
->layout
.slices
[level
].pitch
* image
->layout
.cpp
;
1452 /* to get the right pitch for compressed formats */
1453 static inline uint32_t
1454 tu_image_pitch(struct tu_image
*image
, int level
)
1456 uint32_t stride
= tu_image_stride(image
, level
);
1457 return stride
/ vk_format_get_blockwidth(image
->vk_format
);
1460 static inline uint64_t
1461 tu_image_base(struct tu_image
*image
, int level
, int layer
)
1463 return image
->bo
->iova
+ image
->bo_offset
+
1464 fdl_surface_offset(&image
->layout
, level
, layer
);
1467 #define tu_image_base_ref(image, level, layer) \
1469 .bo_offset = (image->bo_offset + fdl_surface_offset(&image->layout, \
1472 #define tu_image_view_base_ref(iview) \
1473 tu_image_base_ref(iview->image, iview->base_mip, iview->base_layer)
1475 static inline VkDeviceSize
1476 tu_image_ubwc_size(struct tu_image
*image
, int level
)
1478 return image
->layout
.ubwc_layer_size
;
1481 static inline uint32_t
1482 tu_image_ubwc_pitch(struct tu_image
*image
, int level
)
1484 return image
->layout
.ubwc_slices
[level
].pitch
;
1487 static inline uint64_t
1488 tu_image_ubwc_surface_offset(struct tu_image
*image
, int level
, int layer
)
1490 return image
->layout
.ubwc_slices
[level
].offset
+
1491 layer
* tu_image_ubwc_size(image
, level
);
1494 static inline uint64_t
1495 tu_image_ubwc_base(struct tu_image
*image
, int level
, int layer
)
1497 return image
->bo
->iova
+ image
->bo_offset
+
1498 tu_image_ubwc_surface_offset(image
, level
, layer
);
1501 #define tu_image_ubwc_base_ref(image, level, layer) \
1503 .bo_offset = (image->bo_offset + tu_image_ubwc_surface_offset(image, \
1506 #define tu_image_view_ubwc_base_ref(iview) \
1507 tu_image_ubwc_base_ref(iview->image, iview->base_mip, iview->base_layer)
1509 #define tu_image_view_ubwc_pitches(iview) \
1510 .pitch = tu_image_ubwc_pitch(iview->image, iview->base_mip), \
1511 .array_pitch = tu_image_ubwc_size(iview->image, iview->base_mip) >> 2
1514 tu6_get_image_tile_mode(struct tu_image
*image
, int level
);
1515 enum a3xx_msaa_samples
1516 tu_msaa_samples(uint32_t samples
);
1517 enum a6xx_tex_fetchsize
1518 tu6_fetchsize(VkFormat format
);
1520 static inline struct tu_native_format
1521 tu6_format_image(struct tu_image
*image
, VkFormat format
, uint32_t level
)
1523 struct tu_native_format fmt
=
1524 tu6_format_color(format
, image
->layout
.tile_mode
);
1525 fmt
.tile_mode
= tu6_get_image_tile_mode(image
, level
);
1529 static inline struct tu_native_format
1530 tu6_format_image_src(struct tu_image
*image
, VkFormat format
, uint32_t level
)
1532 struct tu_native_format fmt
=
1533 tu6_format_texture(format
, image
->layout
.tile_mode
);
1534 fmt
.tile_mode
= tu6_get_image_tile_mode(image
, level
);
1538 struct tu_image_view
1540 struct tu_image
*image
; /**< VkImageViewCreateInfo::image */
1542 VkImageViewType type
;
1543 VkImageAspectFlags aspect_mask
;
1545 uint32_t base_layer
;
1546 uint32_t layer_count
;
1548 uint32_t level_count
;
1549 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1551 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1553 /* Descriptor for use as a storage image as opposed to a sampled image.
1554 * This has a few differences for cube maps (e.g. type).
1556 uint32_t storage_descriptor
[A6XX_TEX_CONST_DWORDS
];
1560 uint32_t descriptor
[A6XX_TEX_SAMP_DWORDS
];
1564 tu_image_create(VkDevice _device
,
1565 const VkImageCreateInfo
*pCreateInfo
,
1566 const VkAllocationCallbacks
*alloc
,
1571 tu_image_from_gralloc(VkDevice device_h
,
1572 const VkImageCreateInfo
*base_info
,
1573 const VkNativeBufferANDROID
*gralloc_info
,
1574 const VkAllocationCallbacks
*alloc
,
1575 VkImage
*out_image_h
);
1578 tu_image_view_init(struct tu_image_view
*view
,
1579 struct tu_device
*device
,
1580 const VkImageViewCreateInfo
*pCreateInfo
);
1582 struct tu_buffer_view
1584 uint32_t descriptor
[A6XX_TEX_CONST_DWORDS
];
1586 struct tu_buffer
*buffer
;
1589 tu_buffer_view_init(struct tu_buffer_view
*view
,
1590 struct tu_device
*device
,
1591 const VkBufferViewCreateInfo
*pCreateInfo
);
1593 static inline struct VkExtent3D
1594 tu_sanitize_image_extent(const VkImageType imageType
,
1595 const struct VkExtent3D imageExtent
)
1597 switch (imageType
) {
1598 case VK_IMAGE_TYPE_1D
:
1599 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
1600 case VK_IMAGE_TYPE_2D
:
1601 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
1602 case VK_IMAGE_TYPE_3D
:
1605 unreachable("invalid image type");
1609 static inline struct VkOffset3D
1610 tu_sanitize_image_offset(const VkImageType imageType
,
1611 const struct VkOffset3D imageOffset
)
1613 switch (imageType
) {
1614 case VK_IMAGE_TYPE_1D
:
1615 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
1616 case VK_IMAGE_TYPE_2D
:
1617 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
1618 case VK_IMAGE_TYPE_3D
:
1621 unreachable("invalid image type");
1625 struct tu_attachment_info
1627 struct tu_image_view
*attachment
;
1630 struct tu_framebuffer
1636 uint32_t attachment_count
;
1637 struct tu_attachment_info attachments
[0];
1640 struct tu_subpass_attachment
1642 uint32_t attachment
;
1647 uint32_t input_count
;
1648 uint32_t color_count
;
1649 struct tu_subpass_attachment
*input_attachments
;
1650 struct tu_subpass_attachment
*color_attachments
;
1651 struct tu_subpass_attachment
*resolve_attachments
;
1652 struct tu_subpass_attachment depth_stencil_attachment
;
1654 VkSampleCountFlagBits samples
;
1657 struct tu_render_pass_attachment
1662 VkAttachmentLoadOp load_op
;
1663 VkAttachmentLoadOp stencil_load_op
;
1664 VkAttachmentStoreOp store_op
;
1665 VkAttachmentStoreOp stencil_store_op
;
1666 int32_t gmem_offset
;
1669 struct tu_render_pass
1671 uint32_t attachment_count
;
1672 uint32_t subpass_count
;
1673 uint32_t gmem_pixels
;
1674 struct tu_subpass_attachment
*subpass_attachments
;
1675 struct tu_render_pass_attachment
*attachments
;
1676 struct tu_subpass subpasses
[0];
1680 tu_device_init_meta(struct tu_device
*device
);
1682 tu_device_finish_meta(struct tu_device
*device
);
1684 struct tu_query_pool
1689 uint32_t pipeline_statistics
;
1696 uint32_t temp_syncobj
;
1700 tu_set_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1701 VkPipelineBindPoint bind_point
,
1702 struct tu_descriptor_set
*set
,
1706 tu_update_descriptor_sets(struct tu_device
*device
,
1707 struct tu_cmd_buffer
*cmd_buffer
,
1708 VkDescriptorSet overrideSet
,
1709 uint32_t descriptorWriteCount
,
1710 const VkWriteDescriptorSet
*pDescriptorWrites
,
1711 uint32_t descriptorCopyCount
,
1712 const VkCopyDescriptorSet
*pDescriptorCopies
);
1715 tu_update_descriptor_set_with_template(
1716 struct tu_device
*device
,
1717 struct tu_cmd_buffer
*cmd_buffer
,
1718 struct tu_descriptor_set
*set
,
1719 VkDescriptorUpdateTemplate descriptorUpdateTemplate
,
1723 tu_meta_push_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1724 VkPipelineBindPoint pipelineBindPoint
,
1725 VkPipelineLayout _layout
,
1727 uint32_t descriptorWriteCount
,
1728 const VkWriteDescriptorSet
*pDescriptorWrites
);
1731 tu_drm_get_gpu_id(const struct tu_physical_device
*dev
, uint32_t *id
);
1734 tu_drm_get_gmem_size(const struct tu_physical_device
*dev
, uint32_t *size
);
1737 tu_drm_get_gmem_base(const struct tu_physical_device
*dev
, uint64_t *base
);
1740 tu_drm_submitqueue_new(const struct tu_device
*dev
,
1742 uint32_t *queue_id
);
1745 tu_drm_submitqueue_close(const struct tu_device
*dev
, uint32_t queue_id
);
1748 tu_gem_new(const struct tu_device
*dev
, uint64_t size
, uint32_t flags
);
1750 tu_gem_import_dmabuf(const struct tu_device
*dev
,
1754 tu_gem_export_dmabuf(const struct tu_device
*dev
, uint32_t gem_handle
);
1756 tu_gem_close(const struct tu_device
*dev
, uint32_t gem_handle
);
1758 tu_gem_info_offset(const struct tu_device
*dev
, uint32_t gem_handle
);
1760 tu_gem_info_iova(const struct tu_device
*dev
, uint32_t gem_handle
);
1762 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1764 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1766 return (struct __tu_type *) _handle; \
1769 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1771 return (__VkType) _obj; \
1774 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1776 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1778 return (struct __tu_type *) (uintptr_t) _handle; \
1781 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1783 return (__VkType)(uintptr_t) _obj; \
1786 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1787 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1789 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer
, VkCommandBuffer
)
1790 TU_DEFINE_HANDLE_CASTS(tu_device
, VkDevice
)
1791 TU_DEFINE_HANDLE_CASTS(tu_instance
, VkInstance
)
1792 TU_DEFINE_HANDLE_CASTS(tu_physical_device
, VkPhysicalDevice
)
1793 TU_DEFINE_HANDLE_CASTS(tu_queue
, VkQueue
)
1795 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool
, VkCommandPool
)
1796 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer
, VkBuffer
)
1797 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view
, VkBufferView
)
1798 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool
, VkDescriptorPool
)
1799 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set
, VkDescriptorSet
)
1800 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout
,
1801 VkDescriptorSetLayout
)
1802 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template
,
1803 VkDescriptorUpdateTemplate
)
1804 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory
, VkDeviceMemory
)
1805 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence
, VkFence
)
1806 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event
, VkEvent
)
1807 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer
, VkFramebuffer
)
1808 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image
, VkImage
)
1809 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view
, VkImageView
);
1810 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache
, VkPipelineCache
)
1811 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline
, VkPipeline
)
1812 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout
, VkPipelineLayout
)
1813 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool
, VkQueryPool
)
1814 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass
, VkRenderPass
)
1815 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler
, VkSampler
)
1816 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module
, VkShaderModule
)
1817 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore
, VkSemaphore
)
1819 #endif /* TU_PRIVATE_H */