src/gallium/auxiliary/gallivm/lp_bld_nir.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2019 Red Hat.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **************************************************************************/
  25
  26 #include "lp_bld_nir.h"
  27 #include "lp_bld_arit.h"
  28 #include "lp_bld_bitarit.h"
  29 #include "lp_bld_const.h"
  30 #include "lp_bld_gather.h"
  31 #include "lp_bld_logic.h"
  32 #include "lp_bld_quad.h"
  33 #include "lp_bld_flow.h"
  34 #include "lp_bld_struct.h"
  35 #include "lp_bld_debug.h"
  36 #include "lp_bld_printf.h"
  37 #include "nir_deref.h"
  38
  39 static void visit_cf_list(struct lp_build_nir_context *bld_base,
  40                           struct exec_list *list);
  41
  42 static LLVMValueRef cast_type(struct lp_build_nir_context *bld_base, LLVMValueRef val,
  43                               nir_alu_type alu_type, unsigned bit_size)
  44 {
  45    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
  46    switch (alu_type) {
  47    case nir_type_float:
  48       switch (bit_size) {
  49       case 32:
  50          return LLVMBuildBitCast(builder, val, bld_base->base.vec_type, "");
  51       case 64:
  52          return LLVMBuildBitCast(builder, val, bld_base->dbl_bld.vec_type, "");
  53       default:
  54          assert(0);
  55          break;
  56       }
  57       break;
  58    case nir_type_int:
  59       switch (bit_size) {
  60       case 8:
  61          return LLVMBuildBitCast(builder, val, bld_base->int8_bld.vec_type, "");
  62       case 16:
  63          return LLVMBuildBitCast(builder, val, bld_base->int16_bld.vec_type, "");
  64       case 32:
  65          return LLVMBuildBitCast(builder, val, bld_base->int_bld.vec_type, "");
  66       case 64:
  67          return LLVMBuildBitCast(builder, val, bld_base->int64_bld.vec_type, "");
  68       default:
  69          assert(0);
  70          break;
  71       }
  72       break;
  73    case nir_type_uint:
  74       switch (bit_size) {
  75       case 8:
  76          return LLVMBuildBitCast(builder, val, bld_base->uint8_bld.vec_type, "");
  77       case 16:
  78          return LLVMBuildBitCast(builder, val, bld_base->uint16_bld.vec_type, "");
  79       case 32:
  80          return LLVMBuildBitCast(builder, val, bld_base->uint_bld.vec_type, "");
  81       case 64:
  82          return LLVMBuildBitCast(builder, val, bld_base->uint64_bld.vec_type, "");
  83       default:
  84          assert(0);
  85          break;
  86       }
  87       break;
  88    case nir_type_uint32:
  89       return LLVMBuildBitCast(builder, val, bld_base->uint_bld.vec_type, "");
  90    default:
  91       return val;
  92    }
  93    return NULL;
  94 }
  95
  96
  97 static struct lp_build_context *get_flt_bld(struct lp_build_nir_context *bld_base,
  98                                             unsigned op_bit_size)
  99 {
 100    if (op_bit_size == 64)
 101       return &bld_base->dbl_bld;
 102    else
 103       return &bld_base->base;
 104 }
 105
 106 static unsigned glsl_sampler_to_pipe(int sampler_dim, bool is_array)
 107 {
 108    unsigned pipe_target = PIPE_BUFFER;
 109    switch (sampler_dim) {
 110    case GLSL_SAMPLER_DIM_1D:
 111       pipe_target = is_array ? PIPE_TEXTURE_1D_ARRAY : PIPE_TEXTURE_1D;
 112       break;
 113    case GLSL_SAMPLER_DIM_2D:
 114       pipe_target = is_array ? PIPE_TEXTURE_2D_ARRAY : PIPE_TEXTURE_2D;
 115       break;
 116    case GLSL_SAMPLER_DIM_3D:
 117       pipe_target = PIPE_TEXTURE_3D;
 118       break;
 119    case GLSL_SAMPLER_DIM_CUBE:
 120       pipe_target = is_array ? PIPE_TEXTURE_CUBE_ARRAY : PIPE_TEXTURE_CUBE;
 121       break;
 122    case GLSL_SAMPLER_DIM_RECT:
 123       pipe_target = PIPE_TEXTURE_RECT;
 124       break;
 125    case GLSL_SAMPLER_DIM_BUF:
 126       pipe_target = PIPE_BUFFER;
 127       break;
 128    default:
 129       break;
 130    }
 131    return pipe_target;
 132 }
 133
 134 static LLVMValueRef get_ssa_src(struct lp_build_nir_context *bld_base, nir_ssa_def *ssa)
 135 {
 136    return bld_base->ssa_defs[ssa->index];
 137 }
 138
 139 static LLVMValueRef get_src(struct lp_build_nir_context *bld_base, nir_src src);
 140
 141 static LLVMValueRef get_reg_src(struct lp_build_nir_context *bld_base, nir_reg_src src)
 142 {
 143    struct hash_entry *entry = _mesa_hash_table_search(bld_base->regs, src.reg);
 144    LLVMValueRef reg_storage = (LLVMValueRef)entry->data;
 145    struct lp_build_context *reg_bld = get_int_bld(bld_base, true, src.reg->bit_size);
 146    LLVMValueRef indir_src = NULL;
 147    if (src.indirect)
 148       indir_src = get_src(bld_base, *src.indirect);
 149    return bld_base->load_reg(bld_base, reg_bld, &src, indir_src, reg_storage);
 150 }
 151
 152 static LLVMValueRef get_src(struct lp_build_nir_context *bld_base, nir_src src)
 153 {
 154    if (src.is_ssa)
 155       return get_ssa_src(bld_base, src.ssa);
 156    else
 157       return get_reg_src(bld_base, src.reg);
 158 }
 159
 160 static void assign_ssa(struct lp_build_nir_context *bld_base, int idx, LLVMValueRef ptr)
 161 {
 162    bld_base->ssa_defs[idx] = ptr;
 163 }
 164
 165 static void assign_ssa_dest(struct lp_build_nir_context *bld_base, const nir_ssa_def *ssa,
 166                             LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 167 {
 168    assign_ssa(bld_base, ssa->index, ssa->num_components == 1 ? vals[0] : lp_nir_array_build_gather_values(bld_base->base.gallivm->builder, vals, ssa->num_components));
 169 }
 170
 171 static void assign_reg(struct lp_build_nir_context *bld_base, const nir_reg_dest *reg,
 172                        unsigned write_mask,
 173                        LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 174 {
 175    struct hash_entry *entry = _mesa_hash_table_search(bld_base->regs, reg->reg);
 176    LLVMValueRef reg_storage = (LLVMValueRef)entry->data;
 177    struct lp_build_context *reg_bld = get_int_bld(bld_base, true, reg->reg->bit_size);
 178    LLVMValueRef indir_src = NULL;
 179    if (reg->indirect)
 180       indir_src = get_src(bld_base, *reg->indirect);
 181    bld_base->store_reg(bld_base, reg_bld, reg, write_mask ? write_mask : 0xf, indir_src, reg_storage, vals);
 182 }
 183
 184 static void assign_dest(struct lp_build_nir_context *bld_base, const nir_dest *dest, LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 185 {
 186    if (dest->is_ssa)
 187       assign_ssa_dest(bld_base, &dest->ssa, vals);
 188    else
 189       assign_reg(bld_base, &dest->reg, 0, vals);
 190 }
 191
 192 static void assign_alu_dest(struct lp_build_nir_context *bld_base, const nir_alu_dest *dest, LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 193 {
 194    if (dest->dest.is_ssa)
 195       assign_ssa_dest(bld_base, &dest->dest.ssa, vals);
 196    else
 197       assign_reg(bld_base, &dest->dest.reg, dest->write_mask, vals);
 198 }
 199
 200 static LLVMValueRef int_to_bool32(struct lp_build_nir_context *bld_base,
 201                                 uint32_t src_bit_size,
 202                                 bool is_unsigned,
 203                                 LLVMValueRef val)
 204 {
 205    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 206    struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 207    LLVMValueRef result = lp_build_compare(bld_base->base.gallivm, int_bld->type, PIPE_FUNC_NOTEQUAL, val, int_bld->zero);
 208    if (src_bit_size == 64)
 209       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 210    return result;
 211 }
 212
 213 static LLVMValueRef flt_to_bool32(struct lp_build_nir_context *bld_base,
 214                                   uint32_t src_bit_size,
 215                                   LLVMValueRef val)
 216 {
 217    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 218    struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size);
 219    LLVMValueRef result = lp_build_cmp(flt_bld, PIPE_FUNC_NOTEQUAL, val, flt_bld->zero);
 220    if (src_bit_size == 64)
 221       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 222    return result;
 223 }
 224
 225 static LLVMValueRef fcmp32(struct lp_build_nir_context *bld_base,
 226                            enum pipe_compare_func compare,
 227                            uint32_t src_bit_size,
 228                            LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 229 {
 230    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 231    struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size);
 232    LLVMValueRef result;
 233
 234    if (compare != PIPE_FUNC_NOTEQUAL)
 235       result = lp_build_cmp_ordered(flt_bld, compare, src[0], src[1]);
 236    else
 237       result = lp_build_cmp(flt_bld, compare, src[0], src[1]);
 238    if (src_bit_size == 64)
 239       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 240    return result;
 241 }
 242
 243 static LLVMValueRef icmp32(struct lp_build_nir_context *bld_base,
 244                            enum pipe_compare_func compare,
 245                            bool is_unsigned,
 246                            uint32_t src_bit_size,
 247                            LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 248 {
 249    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 250    struct lp_build_context *i_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 251    LLVMValueRef result = lp_build_cmp(i_bld, compare, src[0], src[1]);
 252    if (src_bit_size < 32)
 253       result = LLVMBuildSExt(builder, result, bld_base->int_bld.vec_type, "");
 254    else if (src_bit_size == 64)
 255       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 256    return result;
 257 }
 258
 259 static LLVMValueRef get_alu_src(struct lp_build_nir_context *bld_base,
 260                                 nir_alu_src src,
 261                                 unsigned num_components)
 262 {
 263    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 264    struct gallivm_state *gallivm = bld_base->base.gallivm;
 265    LLVMValueRef value = get_src(bld_base, src.src);
 266    bool need_swizzle = false;
 267
 268    assert(value);
 269    unsigned src_components = nir_src_num_components(src.src);
 270    for (unsigned i = 0; i < num_components; ++i) {
 271       assert(src.swizzle[i] < src_components);
 272       if (src.swizzle[i] != i)
 273          need_swizzle = true;
 274    }
 275
 276    if (need_swizzle || num_components != src_components) {
 277       if (src_components > 1 && num_components == 1) {
 278          value = LLVMBuildExtractValue(gallivm->builder, value,
 279                                        src.swizzle[0], "");
 280       } else if (src_components == 1 && num_components > 1) {
 281          LLVMValueRef values[] = {value, value, value, value, value, value, value, value, value, value, value, value, value, value, value, value};
 282          value = lp_nir_array_build_gather_values(builder, values, num_components);
 283       } else {
 284          LLVMValueRef arr = LLVMGetUndef(LLVMArrayType(LLVMTypeOf(LLVMBuildExtractValue(builder, value, 0, "")), num_components));
 285          for (unsigned i = 0; i < num_components; i++)
 286             arr = LLVMBuildInsertValue(builder, arr, LLVMBuildExtractValue(builder, value, src.swizzle[i], ""), i, "");
 287          value = arr;
 288       }
 289    }
 290    assert(!src.negate);
 291    assert(!src.abs);
 292    return value;
 293 }
 294
 295 static LLVMValueRef emit_b2f(struct lp_build_nir_context *bld_base,
 296                              LLVMValueRef src0,
 297                              unsigned bitsize)
 298 {
 299    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 300    LLVMValueRef result = LLVMBuildAnd(builder, cast_type(bld_base, src0, nir_type_int, 32),
 301                                       LLVMBuildBitCast(builder, lp_build_const_vec(bld_base->base.gallivm, bld_base->base.type,
 302                                                                                    1.0), bld_base->int_bld.vec_type, ""),
 303                                       "");
 304    result = LLVMBuildBitCast(builder, result, bld_base->base.vec_type, "");
 305    switch (bitsize) {
 306    case 32:
 307       break;
 308    case 64:
 309       result = LLVMBuildFPExt(builder, result, bld_base->dbl_bld.vec_type, "");
 310       break;
 311    default:
 312       unreachable("unsupported bit size.");
 313    }
 314    return result;
 315 }
 316
 317 static LLVMValueRef emit_b2i(struct lp_build_nir_context *bld_base,
 318                              LLVMValueRef src0,
 319                              unsigned bitsize)
 320 {
 321    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 322    LLVMValueRef result = LLVMBuildAnd(builder, cast_type(bld_base, src0, nir_type_int, 32),
 323                                       lp_build_const_int_vec(bld_base->base.gallivm, bld_base->base.type, 1), "");
 324    switch (bitsize) {
 325    case 32:
 326       return result;
 327    case 64:
 328       return LLVMBuildZExt(builder, result, bld_base->int64_bld.vec_type, "");
 329    default:
 330       unreachable("unsupported bit size.");
 331    }
 332 }
 333
 334 static LLVMValueRef emit_b32csel(struct lp_build_nir_context *bld_base,
 335                                unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS],
 336                                LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 337 {
 338    LLVMValueRef sel = cast_type(bld_base, src[0], nir_type_int, 32);
 339    LLVMValueRef v = lp_build_compare(bld_base->base.gallivm, bld_base->int_bld.type, PIPE_FUNC_NOTEQUAL, sel, bld_base->int_bld.zero);
 340    struct lp_build_context *bld = get_int_bld(bld_base, false, src_bit_size[1]);
 341    return lp_build_select(bld, v, src[1], src[2]);
 342 }
 343
 344 static LLVMValueRef split_64bit(struct lp_build_nir_context *bld_base,
 345                                 LLVMValueRef src,
 346                                 bool hi)
 347 {
 348    struct gallivm_state *gallivm = bld_base->base.gallivm;
 349    LLVMValueRef shuffles[LP_MAX_VECTOR_WIDTH/32];
 350    LLVMValueRef shuffles2[LP_MAX_VECTOR_WIDTH/32];
 351    int len = bld_base->base.type.length * 2;
 352    for (unsigned i = 0; i < bld_base->base.type.length; i++) {
 353       shuffles[i] = lp_build_const_int32(gallivm, i * 2);
 354       shuffles2[i] = lp_build_const_int32(gallivm, (i * 2) + 1);
 355    }
 356
 357    src = LLVMBuildBitCast(gallivm->builder, src, LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), len), "");
 358    return LLVMBuildShuffleVector(gallivm->builder, src,
 359                                  LLVMGetUndef(LLVMTypeOf(src)),
 360                                  LLVMConstVector(hi ? shuffles2 : shuffles,
 361                                                  bld_base->base.type.length),
 362                                  "");
 363 }
 364
 365 static LLVMValueRef
 366 merge_64bit(struct lp_build_nir_context *bld_base,
 367             LLVMValueRef input,
 368             LLVMValueRef input2)
 369 {
 370    struct gallivm_state *gallivm = bld_base->base.gallivm;
 371    LLVMBuilderRef builder = gallivm->builder;
 372    int i;
 373    LLVMValueRef shuffles[2 * (LP_MAX_VECTOR_WIDTH/32)];
 374    int len = bld_base->base.type.length * 2;
 375    assert(len <= (2 * (LP_MAX_VECTOR_WIDTH/32)));
 376
 377    for (i = 0; i < bld_base->base.type.length * 2; i+=2) {
 378       shuffles[i] = lp_build_const_int32(gallivm, i / 2);
 379       shuffles[i + 1] = lp_build_const_int32(gallivm, i / 2 + bld_base->base.type.length);
 380    }
 381    return LLVMBuildShuffleVector(builder, input, input2, LLVMConstVector(shuffles, len), "");
 382 }
 383
 384 static LLVMValueRef
 385 do_int_divide(struct lp_build_nir_context *bld_base,
 386               bool is_unsigned, unsigned src_bit_size,
 387               LLVMValueRef src, LLVMValueRef src2)
 388 {
 389    struct gallivm_state *gallivm = bld_base->base.gallivm;
 390    LLVMBuilderRef builder = gallivm->builder;
 391    struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 392    LLVMValueRef div_mask = lp_build_cmp(int_bld, PIPE_FUNC_EQUAL, src2,
 393                                         int_bld->zero);
 394    LLVMValueRef divisor = LLVMBuildOr(builder,
 395                                       div_mask,
 396                                       src2, "");
 397    LLVMValueRef result = lp_build_div(int_bld, src, divisor);
 398    /* udiv by zero is guaranteed to return 0xffffffff at least with d3d10
 399     * may as well do same for idiv */
 400    return LLVMBuildOr(builder, div_mask, result, "");
 401 }
 402
 403 static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
 404                                   nir_op op, unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS], LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 405 {
 406    struct gallivm_state *gallivm = bld_base->base.gallivm;
 407    LLVMBuilderRef builder = gallivm->builder;
 408    LLVMValueRef result;
 409    switch (op) {
 410    case nir_op_b2f32:
 411       result = emit_b2f(bld_base, src[0], 32);
 412       break;
 413    case nir_op_b2f64:
 414       result = emit_b2f(bld_base, src[0], 64);
 415       break;
 416    case nir_op_b2i32:
 417       result = emit_b2i(bld_base, src[0], 32);
 418       break;
 419    case nir_op_b2i64:
 420       result = emit_b2i(bld_base, src[0], 64);
 421       break;
 422    case nir_op_b32csel:
 423       result = emit_b32csel(bld_base, src_bit_size, src);
 424       break;
 425    case nir_op_bit_count:
 426       result = lp_build_popcount(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 427       break;
 428    case nir_op_bitfield_select:
 429       result = lp_build_xor(&bld_base->uint_bld, src[2], lp_build_and(&bld_base->uint_bld, src[0], lp_build_xor(&bld_base->uint_bld, src[1], src[2])));
 430       break;
 431    case nir_op_bitfield_reverse:
 432       result = lp_build_bitfield_reverse(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 433       break;
 434    case nir_op_f2b32:
 435       result = flt_to_bool32(bld_base, src_bit_size[0], src[0]);
 436       break;
 437    case nir_op_f2f32:
 438       result = LLVMBuildFPTrunc(builder, src[0],
 439                                 bld_base->base.vec_type, "");
 440       break;
 441    case nir_op_f2f64:
 442       result = LLVMBuildFPExt(builder, src[0],
 443                               bld_base->dbl_bld.vec_type, "");
 444       break;
 445    case nir_op_f2i32:
 446       result = LLVMBuildFPToSI(builder, src[0], bld_base->base.int_vec_type, "");
 447       break;
 448    case nir_op_f2u32:
 449       result = LLVMBuildFPToUI(builder,
 450                                src[0],
 451                                bld_base->base.int_vec_type, "");
 452       break;
 453    case nir_op_f2i64:
 454       result = LLVMBuildFPToSI(builder,
 455                                src[0],
 456                                bld_base->int64_bld.vec_type, "");
 457       break;
 458    case nir_op_f2u64:
 459       result = LLVMBuildFPToUI(builder,
 460                                src[0],
 461                                bld_base->uint64_bld.vec_type, "");
 462       break;
 463    case nir_op_fabs:
 464       result = lp_build_abs(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 465       break;
 466    case nir_op_fadd:
 467       result = lp_build_add(get_flt_bld(bld_base, src_bit_size[0]),
 468                             src[0], src[1]);
 469       break;
 470    case nir_op_fceil:
 471       result = lp_build_ceil(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 472       break;
 473    case nir_op_fcos:
 474       result = lp_build_cos(&bld_base->base, src[0]);
 475       break;
 476    case nir_op_fddx:
 477    case nir_op_fddx_coarse:
 478    case nir_op_fddx_fine:
 479       result = lp_build_ddx(&bld_base->base, src[0]);
 480       break;
 481    case nir_op_fddy:
 482    case nir_op_fddy_coarse:
 483    case nir_op_fddy_fine:
 484       result = lp_build_ddy(&bld_base->base, src[0]);
 485       break;
 486    case nir_op_fdiv:
 487       result = lp_build_div(get_flt_bld(bld_base, src_bit_size[0]),
 488                             src[0], src[1]);
 489       break;
 490    case nir_op_feq32:
 491       result = fcmp32(bld_base, PIPE_FUNC_EQUAL, src_bit_size[0], src);
 492       break;
 493    case nir_op_fexp2:
 494       result = lp_build_exp2(&bld_base->base, src[0]);
 495       break;
 496    case nir_op_ffloor:
 497       result = lp_build_floor(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 498       break;
 499    case nir_op_ffma:
 500       result = lp_build_fmuladd(builder, src[0], src[1], src[2]);
 501       break;
 502    case nir_op_ffract: {
 503       struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size[0]);
 504       LLVMValueRef tmp = lp_build_floor(flt_bld, src[0]);
 505       result = lp_build_sub(flt_bld, src[0], tmp);
 506       break;
 507    }
 508    case nir_op_fge32:
 509       result = fcmp32(bld_base, PIPE_FUNC_GEQUAL, src_bit_size[0], src);
 510       break;
 511    case nir_op_find_lsb:
 512       result = lp_build_cttz(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 513       break;
 514    case nir_op_flog2:
 515       result = lp_build_log2_safe(&bld_base->base, src[0]);
 516       break;
 517    case nir_op_flt32:
 518       result = fcmp32(bld_base, PIPE_FUNC_LESS, src_bit_size[0], src);
 519       break;
 520    case nir_op_fmin:
 521       result = lp_build_min(get_flt_bld(bld_base, src_bit_size[0]), src[0], src[1]);
 522       break;
 523    case nir_op_fmod: {
 524       struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size[0]);
 525       result = lp_build_div(flt_bld, src[0], src[1]);
 526       result = lp_build_floor(flt_bld, result);
 527       result = lp_build_mul(flt_bld, src[1], result);
 528       result = lp_build_sub(flt_bld, src[0], result);
 529       break;
 530    }
 531    case nir_op_fmul:
 532       result = lp_build_mul(get_flt_bld(bld_base, src_bit_size[0]),
 533                             src[0], src[1]);
 534       break;
 535    case nir_op_fmax:
 536       result = lp_build_max(get_flt_bld(bld_base, src_bit_size[0]), src[0], src[1]);
 537       break;
 538    case nir_op_fne32:
 539       result = fcmp32(bld_base, PIPE_FUNC_NOTEQUAL, src_bit_size[0], src);
 540       break;
 541    case nir_op_fneg:
 542       result = lp_build_negate(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 543       break;
 544    case nir_op_fpow:
 545       result = lp_build_pow(&bld_base->base, src[0], src[1]);
 546       break;
 547    case nir_op_frcp:
 548       result = lp_build_rcp(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 549       break;
 550    case nir_op_fround_even:
 551       result = lp_build_round(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 552       break;
 553    case nir_op_frsq:
 554       result = lp_build_rsqrt(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 555       break;
 556    case nir_op_fsat:
 557       result = lp_build_clamp_zero_one_nanzero(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 558       break;
 559    case nir_op_fsign:
 560       result = lp_build_sgn(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 561       break;
 562    case nir_op_fsin:
 563       result = lp_build_sin(&bld_base->base, src[0]);
 564       break;
 565    case nir_op_fsqrt:
 566       result = lp_build_sqrt(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 567       break;
 568    case nir_op_ftrunc:
 569       result = lp_build_trunc(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 570       break;
 571    case nir_op_i2b32:
 572       result = int_to_bool32(bld_base, src_bit_size[0], false, src[0]);
 573       break;
 574    case nir_op_i2f32:
 575       result = lp_build_int_to_float(&bld_base->base, src[0]);
 576       break;
 577    case nir_op_i2f64:
 578       result = lp_build_int_to_float(&bld_base->dbl_bld, src[0]);
 579       break;
 580    case nir_op_i2i8:
 581       result = LLVMBuildTrunc(builder, src[0], bld_base->int8_bld.vec_type, "");
 582       break;
 583    case nir_op_i2i16:
 584       if (src_bit_size[0] < 16)
 585          result = LLVMBuildSExt(builder, src[0], bld_base->int16_bld.vec_type, "");
 586       else
 587          result = LLVMBuildTrunc(builder, src[0], bld_base->int16_bld.vec_type, "");
 588       break;
 589    case nir_op_i2i32:
 590       if (src_bit_size[0] < 32)
 591          result = LLVMBuildSExt(builder, src[0], bld_base->int_bld.vec_type, "");
 592       else
 593          result = LLVMBuildTrunc(builder, src[0], bld_base->int_bld.vec_type, "");
 594       break;
 595    case nir_op_i2i64:
 596       result = LLVMBuildSExt(builder, src[0], bld_base->int64_bld.vec_type, "");
 597       break;
 598    case nir_op_iabs:
 599       result = lp_build_abs(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 600       break;
 601    case nir_op_iadd:
 602       result = lp_build_add(get_int_bld(bld_base, false, src_bit_size[0]),
 603                             src[0], src[1]);
 604       break;
 605    case nir_op_iand:
 606       result = lp_build_and(get_int_bld(bld_base, false, src_bit_size[0]),
 607                             src[0], src[1]);
 608       break;
 609    case nir_op_idiv:
 610       result = do_int_divide(bld_base, false, src_bit_size[0], src[0], src[1]);
 611       break;
 612    case nir_op_ieq32:
 613       result = icmp32(bld_base, PIPE_FUNC_EQUAL, false, src_bit_size[0], src);
 614       break;
 615    case nir_op_ige32:
 616       result = icmp32(bld_base, PIPE_FUNC_GEQUAL, false, src_bit_size[0], src);
 617       break;
 618    case nir_op_ilt32:
 619       result = icmp32(bld_base, PIPE_FUNC_LESS, false, src_bit_size[0], src);
 620       break;
 621    case nir_op_imax:
 622       result = lp_build_max(get_int_bld(bld_base, false, src_bit_size[0]), src[0], src[1]);
 623       break;
 624    case nir_op_imin:
 625       result = lp_build_min(get_int_bld(bld_base, false, src_bit_size[0]), src[0], src[1]);
 626       break;
 627    case nir_op_imul:
 628    case nir_op_imul24:
 629       result = lp_build_mul(get_int_bld(bld_base, false, src_bit_size[0]),
 630                             src[0], src[1]);
 631       break;
 632    case nir_op_imul_high: {
 633       LLVMValueRef hi_bits;
 634       lp_build_mul_32_lohi(&bld_base->int_bld, src[0], src[1], &hi_bits);
 635       result = hi_bits;
 636       break;
 637    }
 638    case nir_op_ine32:
 639       result = icmp32(bld_base, PIPE_FUNC_NOTEQUAL, false, src_bit_size[0], src);
 640       break;
 641    case nir_op_ineg:
 642       result = lp_build_negate(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 643       break;
 644    case nir_op_inot:
 645       result = lp_build_not(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 646       break;
 647    case nir_op_ior:
 648       result = lp_build_or(get_int_bld(bld_base, false, src_bit_size[0]),
 649                            src[0], src[1]);
 650       break;
 651    case nir_op_irem:
 652       result = lp_build_mod(get_int_bld(bld_base, false, src_bit_size[0]),
 653                             src[0], src[1]);
 654       break;
 655    case nir_op_ishl: {
 656       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 657       struct lp_build_context *int_bld = get_int_bld(bld_base, false, src_bit_size[0]);
 658       if (src_bit_size[0] == 64)
 659          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 660       if (src_bit_size[0] < 32)
 661          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 662       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 663       result = lp_build_shl(int_bld, src[0], src[1]);
 664       break;
 665    }
 666    case nir_op_ishr: {
 667       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 668       struct lp_build_context *int_bld = get_int_bld(bld_base, false, src_bit_size[0]);
 669       if (src_bit_size[0] == 64)
 670          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 671       if (src_bit_size[0] < 32)
 672          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 673       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 674       result = lp_build_shr(int_bld, src[0], src[1]);
 675       break;
 676    }
 677    case nir_op_isign:
 678       result = lp_build_sgn(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 679       break;
 680    case nir_op_isub:
 681       result = lp_build_sub(get_int_bld(bld_base, false, src_bit_size[0]),
 682                             src[0], src[1]);
 683       break;
 684    case nir_op_ixor:
 685       result = lp_build_xor(get_int_bld(bld_base, false, src_bit_size[0]),
 686                             src[0], src[1]);
 687       break;
 688    case nir_op_mov:
 689       result = src[0];
 690       break;
 691    case nir_op_unpack_64_2x32_split_x:
 692       result = split_64bit(bld_base, src[0], false);
 693       break;
 694    case nir_op_unpack_64_2x32_split_y:
 695       result = split_64bit(bld_base, src[0], true);
 696       break;
 697
 698    case nir_op_pack_64_2x32_split: {
 699       LLVMValueRef tmp = merge_64bit(bld_base, src[0], src[1]);
 700       result = LLVMBuildBitCast(builder, tmp, bld_base->dbl_bld.vec_type, "");
 701       break;
 702    }
 703    case nir_op_u2f32:
 704       result = LLVMBuildUIToFP(builder, src[0], bld_base->base.vec_type, "");
 705       break;
 706    case nir_op_u2f64:
 707       result = LLVMBuildUIToFP(builder, src[0], bld_base->dbl_bld.vec_type, "");
 708       break;
 709    case nir_op_u2u8:
 710       result = LLVMBuildTrunc(builder, src[0], bld_base->uint8_bld.vec_type, "");
 711       break;
 712    case nir_op_u2u16:
 713       if (src_bit_size[0] < 16)
 714          result = LLVMBuildZExt(builder, src[0], bld_base->uint16_bld.vec_type, "");
 715       else
 716          result = LLVMBuildTrunc(builder, src[0], bld_base->uint16_bld.vec_type, "");
 717       break;
 718    case nir_op_u2u32:
 719       if (src_bit_size[0] < 32)
 720          result = LLVMBuildZExt(builder, src[0], bld_base->uint_bld.vec_type, "");
 721       else
 722          result = LLVMBuildTrunc(builder, src[0], bld_base->uint_bld.vec_type, "");
 723       break;
 724    case nir_op_u2u64:
 725       result = LLVMBuildZExt(builder, src[0], bld_base->uint64_bld.vec_type, "");
 726       break;
 727    case nir_op_udiv:
 728       result = do_int_divide(bld_base, true, src_bit_size[0], src[0], src[1]);
 729       break;
 730    case nir_op_ufind_msb: {
 731       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 732       result = lp_build_ctlz(uint_bld, src[0]);
 733       result = lp_build_sub(uint_bld, lp_build_const_int_vec(gallivm, uint_bld->type, src_bit_size[0] - 1), result);
 734       break;
 735    }
 736    case nir_op_uge32:
 737       result = icmp32(bld_base, PIPE_FUNC_GEQUAL, true, src_bit_size[0], src);
 738       break;
 739    case nir_op_ult32:
 740       result = icmp32(bld_base, PIPE_FUNC_LESS, true, src_bit_size[0], src);
 741       break;
 742    case nir_op_umax:
 743       result = lp_build_max(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
 744       break;
 745    case nir_op_umin:
 746       result = lp_build_min(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
 747       break;
 748    case nir_op_umod:
 749       result = lp_build_mod(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
 750       break;
 751    case nir_op_umul_high: {
 752       LLVMValueRef hi_bits;
 753       lp_build_mul_32_lohi(&bld_base->uint_bld, src[0], src[1], &hi_bits);
 754       result = hi_bits;
 755       break;
 756    }
 757    case nir_op_ushr: {
 758       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 759       if (src_bit_size[0] == 64)
 760          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 761       if (src_bit_size[0] < 32)
 762          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 763       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 764       result = lp_build_shr(uint_bld, src[0], src[1]);
 765       break;
 766    }
 767    default:
 768       assert(0);
 769       break;
 770    }
 771    return result;
 772 }
 773
 774 static void visit_alu(struct lp_build_nir_context *bld_base, const nir_alu_instr *instr)
 775 {
 776    struct gallivm_state *gallivm = bld_base->base.gallivm;
 777    LLVMValueRef src[NIR_MAX_VEC_COMPONENTS];
 778    unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS];
 779    unsigned num_components = nir_dest_num_components(instr->dest.dest);
 780    unsigned src_components;
 781    switch (instr->op) {
 782    case nir_op_vec2:
 783    case nir_op_vec3:
 784    case nir_op_vec4:
 785    case nir_op_vec8:
 786    case nir_op_vec16:
 787       src_components = 1;
 788       break;
 789    case nir_op_pack_half_2x16:
 790       src_components = 2;
 791       break;
 792    case nir_op_unpack_half_2x16:
 793       src_components = 1;
 794       break;
 795    case nir_op_cube_face_coord:
 796    case nir_op_cube_face_index:
 797       src_components = 3;
 798       break;
 799    default:
 800       src_components = num_components;
 801       break;
 802    }
 803    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 804       src[i] = get_alu_src(bld_base, instr->src[i], src_components);
 805       src_bit_size[i] = nir_src_bit_size(instr->src[i].src);
 806    }
 807
 808    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS];
 809    if (instr->op == nir_op_vec4 || instr->op == nir_op_vec3 || instr->op == nir_op_vec2 || instr->op == nir_op_vec8 || instr->op == nir_op_vec16) {
 810       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 811          result[i] = cast_type(bld_base, src[i], nir_op_infos[instr->op].input_types[i], src_bit_size[i]);
 812       }
 813    } else {
 814       for (unsigned c = 0; c < num_components; c++) {
 815          LLVMValueRef src_chan[NIR_MAX_VEC_COMPONENTS];
 816
 817          for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 818             if (num_components > 1) {
 819                src_chan[i] = LLVMBuildExtractValue(gallivm->builder,
 820                                                      src[i], c, "");
 821             } else
 822                src_chan[i] = src[i];
 823             src_chan[i] = cast_type(bld_base, src_chan[i], nir_op_infos[instr->op].input_types[i], src_bit_size[i]);
 824          }
 825          result[c] = do_alu_action(bld_base, instr->op, src_bit_size, src_chan);
 826          result[c] = cast_type(bld_base, result[c], nir_op_infos[instr->op].output_type, nir_dest_bit_size(instr->dest.dest));
 827       }
 828    }
 829    assign_alu_dest(bld_base, &instr->dest, result);
 830  }
 831
 832 static void visit_load_const(struct lp_build_nir_context *bld_base,
 833                              const nir_load_const_instr *instr)
 834 {
 835    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS];
 836    struct lp_build_context *int_bld = get_int_bld(bld_base, true, instr->def.bit_size);
 837    for (unsigned i = 0; i < instr->def.num_components; i++)
 838       result[i] = lp_build_const_int_vec(bld_base->base.gallivm, int_bld->type, instr->value[i].u64);
 839    assign_ssa_dest(bld_base, &instr->def, result);
 840 }
 841
 842 static void
 843 get_deref_offset(struct lp_build_nir_context *bld_base, nir_deref_instr *instr,
 844                  bool vs_in, unsigned *vertex_index_out,
 845                  LLVMValueRef *vertex_index_ref,
 846                  unsigned *const_out, LLVMValueRef *indir_out)
 847 {
 848    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 849    nir_variable *var = nir_deref_instr_get_variable(instr);
 850    nir_deref_path path;
 851    unsigned idx_lvl = 1;
 852
 853    nir_deref_path_init(&path, instr, NULL);
 854
 855    if (vertex_index_out != NULL || vertex_index_ref != NULL) {
 856       if (vertex_index_ref) {
 857          *vertex_index_ref = get_src(bld_base, path.path[idx_lvl]->arr.index);
 858          if (vertex_index_out)
 859             *vertex_index_out = 0;
 860       } else {
 861          *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
 862       }
 863       ++idx_lvl;
 864    }
 865
 866    uint32_t const_offset = 0;
 867    LLVMValueRef offset = NULL;
 868
 869    if (var->data.compact) {
 870       assert(instr->deref_type == nir_deref_type_array);
 871       const_offset = nir_src_as_uint(instr->arr.index);
 872       goto out;
 873    }
 874
 875    for (; path.path[idx_lvl]; ++idx_lvl) {
 876       const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
 877       if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
 878          unsigned index = path.path[idx_lvl]->strct.index;
 879
 880          for (unsigned i = 0; i < index; i++) {
 881             const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
 882             const_offset += glsl_count_attribute_slots(ft, vs_in);
 883          }
 884       } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
 885          unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
 886          if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
 887            const_offset += nir_src_comp_as_int(path.path[idx_lvl]->arr.index, 0) * size;
 888          } else {
 889            LLVMValueRef idx_src = get_src(bld_base, path.path[idx_lvl]->arr.index);
 890            idx_src = cast_type(bld_base, idx_src, nir_type_uint, 32);
 891            LLVMValueRef array_off = lp_build_mul(&bld_base->uint_bld, lp_build_const_int_vec(bld_base->base.gallivm, bld_base->base.type, size),
 892                                                idx_src);
 893            if (offset)
 894              offset = lp_build_add(&bld_base->uint_bld, offset, array_off);
 895            else
 896              offset = array_off;
 897          }
 898       } else
 899          unreachable("Uhandled deref type in get_deref_instr_offset");
 900    }
 901
 902 out:
 903    nir_deref_path_finish(&path);
 904
 905    if (const_offset && offset)
 906       offset = LLVMBuildAdd(builder, offset,
 907                             lp_build_const_int_vec(bld_base->base.gallivm, bld_base->uint_bld.type, const_offset),
 908                             "");
 909    *const_out = const_offset;
 910    *indir_out = offset;
 911 }
 912
 913 static void visit_load_var(struct lp_build_nir_context *bld_base,
 914                            nir_intrinsic_instr *instr,
 915                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 916 {
 917    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
 918    nir_variable *var = nir_deref_instr_get_variable(deref);
 919    nir_variable_mode mode = deref->mode;
 920    unsigned const_index;
 921    LLVMValueRef indir_index;
 922    unsigned vertex_index = 0;
 923    unsigned nc = nir_dest_num_components(instr->dest);
 924    unsigned bit_size = nir_dest_bit_size(instr->dest);
 925    if (var) {
 926       bool vs_in = bld_base->shader->info.stage == MESA_SHADER_VERTEX &&
 927          var->data.mode == nir_var_shader_in;
 928       bool gs_in = bld_base->shader->info.stage == MESA_SHADER_GEOMETRY &&
 929          var->data.mode == nir_var_shader_in;
 930       mode = var->data.mode;
 931
 932       get_deref_offset(bld_base, deref, vs_in, gs_in ? &vertex_index : NULL, NULL,
 933                        &const_index, &indir_index);
 934    }
 935    bld_base->load_var(bld_base, mode, nc, bit_size, var, vertex_index, const_index, indir_index, result);
 936 }
 937
 938 static void
 939 visit_store_var(struct lp_build_nir_context *bld_base,
 940                 nir_intrinsic_instr *instr)
 941 {
 942    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
 943    nir_variable *var = nir_deref_instr_get_variable(deref);
 944    nir_variable_mode mode = deref->mode;
 945    int writemask = instr->const_index[0];
 946    unsigned bit_size = nir_src_bit_size(instr->src[1]);
 947    LLVMValueRef src = get_src(bld_base, instr->src[1]);
 948    unsigned const_index = 0;
 949    LLVMValueRef indir_index;
 950    if (var)
 951       get_deref_offset(bld_base, deref, false, NULL, NULL,
 952                        &const_index, &indir_index);
 953    bld_base->store_var(bld_base, mode, bit_size, instr->num_components, writemask, const_index, var, src);
 954 }
 955
 956 static void visit_load_ubo(struct lp_build_nir_context *bld_base,
 957                            nir_intrinsic_instr *instr,
 958                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 959 {
 960    struct gallivm_state *gallivm = bld_base->base.gallivm;
 961    LLVMBuilderRef builder = gallivm->builder;
 962    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
 963    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
 964
 965    bool offset_is_uniform = nir_src_is_dynamically_uniform(instr->src[1]);
 966    idx = LLVMBuildExtractElement(builder, idx, lp_build_const_int32(gallivm, 0), "");
 967    bld_base->load_ubo(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
 968                       offset_is_uniform, idx, offset, result);
 969 }
 970
 971
 972 static void visit_load_ssbo(struct lp_build_nir_context *bld_base,
 973                            nir_intrinsic_instr *instr,
 974                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 975 {
 976    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
 977    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
 978    bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
 979                        idx, offset, result);
 980 }
 981
 982 static void visit_store_ssbo(struct lp_build_nir_context *bld_base,
 983                              nir_intrinsic_instr *instr)
 984 {
 985    LLVMValueRef val = get_src(bld_base, instr->src[0]);
 986    LLVMValueRef idx = get_src(bld_base, instr->src[1]);
 987    LLVMValueRef offset = get_src(bld_base, instr->src[2]);
 988    int writemask = instr->const_index[0];
 989    int nc = nir_src_num_components(instr->src[0]);
 990    int bitsize = nir_src_bit_size(instr->src[0]);
 991    bld_base->store_mem(bld_base, writemask, nc, bitsize, idx, offset, val);
 992 }
 993
 994 static void visit_get_buffer_size(struct lp_build_nir_context *bld_base,
 995                                   nir_intrinsic_instr *instr,
 996                                   LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 997 {
 998    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
 999    result[0] = bld_base->get_buffer_size(bld_base, idx);
1000 }
1001
1002 static void visit_ssbo_atomic(struct lp_build_nir_context *bld_base,
1003                               nir_intrinsic_instr *instr,
1004                               LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1005 {
1006    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
1007    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
1008    LLVMValueRef val = get_src(bld_base, instr->src[2]);
1009    LLVMValueRef val2 = NULL;
1010    if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap)
1011       val2 = get_src(bld_base, instr->src[3]);
1012
1013    bld_base->atomic_mem(bld_base, instr->intrinsic, idx, offset, val, val2, &result[0]);
1014
1015 }
1016
1017 static void visit_load_image(struct lp_build_nir_context *bld_base,
1018                              nir_intrinsic_instr *instr,
1019                              LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1020 {
1021    struct gallivm_state *gallivm = bld_base->base.gallivm;
1022    LLVMBuilderRef builder = gallivm->builder;
1023    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1024    nir_variable *var = nir_deref_instr_get_variable(deref);
1025    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1026    LLVMValueRef coords[5];
1027    struct lp_img_params params;
1028    const struct glsl_type *type = glsl_without_array(var->type);
1029
1030    memset(&params, 0, sizeof(params));
1031    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1032    for (unsigned i = 0; i < 4; i++)
1033       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1034    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1035       coords[2] = coords[1];
1036
1037    params.coords = coords;
1038    params.outdata = result;
1039    params.img_op = LP_IMG_LOAD;
1040    params.image_index = var->data.binding;
1041    bld_base->image_op(bld_base, &params);
1042 }
1043
1044 static void visit_store_image(struct lp_build_nir_context *bld_base,
1045                               nir_intrinsic_instr *instr)
1046 {
1047    struct gallivm_state *gallivm = bld_base->base.gallivm;
1048    LLVMBuilderRef builder = gallivm->builder;
1049    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1050    nir_variable *var = nir_deref_instr_get_variable(deref);
1051    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1052    LLVMValueRef in_val = get_src(bld_base, instr->src[3]);
1053    LLVMValueRef coords[5];
1054    struct lp_img_params params;
1055    const struct glsl_type *type = glsl_without_array(var->type);
1056
1057    memset(&params, 0, sizeof(params));
1058    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1059    for (unsigned i = 0; i < 4; i++)
1060       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1061    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1062       coords[2] = coords[1];
1063    params.coords = coords;
1064
1065    for (unsigned i = 0; i < 4; i++) {
1066       params.indata[i] = LLVMBuildExtractValue(builder, in_val, i, "");
1067       params.indata[i] = LLVMBuildBitCast(builder, params.indata[i], bld_base->base.vec_type, "");
1068    }
1069    params.img_op = LP_IMG_STORE;
1070    params.image_index = var->data.binding;
1071
1072    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1073       coords[2] = coords[1];
1074    bld_base->image_op(bld_base, &params);
1075 }
1076
1077 static void visit_atomic_image(struct lp_build_nir_context *bld_base,
1078                                nir_intrinsic_instr *instr,
1079                                LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1080 {
1081    struct gallivm_state *gallivm = bld_base->base.gallivm;
1082    LLVMBuilderRef builder = gallivm->builder;
1083    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1084    nir_variable *var = nir_deref_instr_get_variable(deref);
1085    struct lp_img_params params;
1086    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1087    LLVMValueRef in_val = get_src(bld_base, instr->src[3]);
1088    LLVMValueRef coords[5];
1089    const struct glsl_type *type = glsl_without_array(var->type);
1090
1091    memset(&params, 0, sizeof(params));
1092
1093    switch (instr->intrinsic) {
1094    case nir_intrinsic_image_deref_atomic_add:
1095       params.op = LLVMAtomicRMWBinOpAdd;
1096       break;
1097    case nir_intrinsic_image_deref_atomic_exchange:
1098       params.op = LLVMAtomicRMWBinOpXchg;
1099       break;
1100    case nir_intrinsic_image_deref_atomic_and:
1101       params.op = LLVMAtomicRMWBinOpAnd;
1102       break;
1103    case nir_intrinsic_image_deref_atomic_or:
1104       params.op = LLVMAtomicRMWBinOpOr;
1105       break;
1106    case nir_intrinsic_image_deref_atomic_xor:
1107       params.op = LLVMAtomicRMWBinOpXor;
1108       break;
1109    case nir_intrinsic_image_deref_atomic_umin:
1110       params.op = LLVMAtomicRMWBinOpUMin;
1111       break;
1112    case nir_intrinsic_image_deref_atomic_umax:
1113       params.op = LLVMAtomicRMWBinOpUMax;
1114       break;
1115    case nir_intrinsic_image_deref_atomic_imin:
1116       params.op = LLVMAtomicRMWBinOpMin;
1117       break;
1118    case nir_intrinsic_image_deref_atomic_imax:
1119       params.op = LLVMAtomicRMWBinOpMax;
1120       break;
1121    default:
1122       break;
1123    }
1124
1125    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1126    for (unsigned i = 0; i < 4; i++)
1127       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1128    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1129       coords[2] = coords[1];
1130    params.coords = coords;
1131    if (instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) {
1132       LLVMValueRef cas_val = get_src(bld_base, instr->src[4]);
1133       params.indata[0] = in_val;
1134       params.indata2[0] = cas_val;
1135    } else
1136       params.indata[0] = in_val;
1137
1138    params.outdata = result;
1139    params.img_op = (instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) ? LP_IMG_ATOMIC_CAS : LP_IMG_ATOMIC;
1140    params.image_index = var->data.binding;
1141
1142    bld_base->image_op(bld_base, &params);
1143 }
1144
1145
1146 static void visit_image_size(struct lp_build_nir_context *bld_base,
1147                              nir_intrinsic_instr *instr,
1148                              LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1149 {
1150    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1151    nir_variable *var = nir_deref_instr_get_variable(deref);
1152    struct lp_sampler_size_query_params params = { 0 };
1153    params.texture_unit = var->data.binding;
1154    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(var->type), glsl_sampler_type_is_array(var->type));
1155    params.sizes_out = result;
1156
1157    bld_base->image_size(bld_base, &params);
1158 }
1159
1160 static void visit_shared_load(struct lp_build_nir_context *bld_base,
1161                                 nir_intrinsic_instr *instr,
1162                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1163 {
1164    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1165    bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1166                       NULL, offset, result);
1167 }
1168
1169 static void visit_shared_store(struct lp_build_nir_context *bld_base,
1170                                nir_intrinsic_instr *instr)
1171 {
1172    LLVMValueRef val = get_src(bld_base, instr->src[0]);
1173    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
1174    int writemask = instr->const_index[1];
1175    int nc = nir_src_num_components(instr->src[0]);
1176    int bitsize = nir_src_bit_size(instr->src[0]);
1177    bld_base->store_mem(bld_base, writemask, nc, bitsize, NULL, offset, val);
1178 }
1179
1180 static void visit_shared_atomic(struct lp_build_nir_context *bld_base,
1181                                 nir_intrinsic_instr *instr,
1182                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1183 {
1184    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1185    LLVMValueRef val = get_src(bld_base, instr->src[1]);
1186    LLVMValueRef val2 = NULL;
1187    if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap)
1188       val2 = get_src(bld_base, instr->src[2]);
1189
1190    bld_base->atomic_mem(bld_base, instr->intrinsic, NULL, offset, val, val2, &result[0]);
1191
1192 }
1193
1194 static void visit_barrier(struct lp_build_nir_context *bld_base)
1195 {
1196    bld_base->barrier(bld_base);
1197 }
1198
1199 static void visit_discard(struct lp_build_nir_context *bld_base,
1200                           nir_intrinsic_instr *instr)
1201 {
1202    LLVMValueRef cond = NULL;
1203    if (instr->intrinsic == nir_intrinsic_discard_if) {
1204       cond = get_src(bld_base, instr->src[0]);
1205       cond = cast_type(bld_base, cond, nir_type_int, 32);
1206    }
1207    bld_base->discard(bld_base, cond);
1208 }
1209
1210 static void visit_load_kernel_input(struct lp_build_nir_context *bld_base,
1211                                     nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1212 {
1213    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1214
1215    bool offset_is_uniform = nir_src_is_dynamically_uniform(instr->src[0]);
1216    bld_base->load_kernel_arg(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1217                              nir_src_bit_size(instr->src[0]),
1218                              offset_is_uniform, offset, result);
1219 }
1220
1221 static void visit_load_global(struct lp_build_nir_context *bld_base,
1222                               nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1223 {
1224    LLVMValueRef addr = get_src(bld_base, instr->src[0]);
1225    bld_base->load_global(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1226                          nir_src_bit_size(instr->src[0]),
1227                          addr, result);
1228 }
1229
1230 static void visit_store_global(struct lp_build_nir_context *bld_base,
1231                                nir_intrinsic_instr *instr)
1232 {
1233    LLVMValueRef val = get_src(bld_base, instr->src[0]);
1234    int nc = nir_src_num_components(instr->src[0]);
1235    int bitsize = nir_src_bit_size(instr->src[0]);
1236    LLVMValueRef addr = get_src(bld_base, instr->src[1]);
1237    int addr_bitsize = nir_src_bit_size(instr->src[1]);
1238    int writemask = instr->const_index[0];
1239    bld_base->store_global(bld_base, writemask, nc, bitsize, addr_bitsize, addr, val);
1240 }
1241
1242 static void visit_global_atomic(struct lp_build_nir_context *bld_base,
1243                                 nir_intrinsic_instr *instr,
1244                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1245 {
1246    LLVMValueRef addr = get_src(bld_base, instr->src[0]);
1247    LLVMValueRef val = get_src(bld_base, instr->src[1]);
1248    LLVMValueRef val2 = NULL;
1249    int addr_bitsize = nir_src_bit_size(instr->src[0]);
1250    if (instr->intrinsic == nir_intrinsic_global_atomic_comp_swap)
1251       val2 = get_src(bld_base, instr->src[2]);
1252
1253    bld_base->atomic_global(bld_base, instr->intrinsic, addr_bitsize, addr, val, val2, &result[0]);
1254 }
1255
1256 static void visit_intrinsic(struct lp_build_nir_context *bld_base,
1257                             nir_intrinsic_instr *instr)
1258 {
1259    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS] = {0};
1260    switch (instr->intrinsic) {
1261    case nir_intrinsic_load_deref:
1262       visit_load_var(bld_base, instr, result);
1263       break;
1264    case nir_intrinsic_store_deref:
1265       visit_store_var(bld_base, instr);
1266       break;
1267    case nir_intrinsic_load_ubo:
1268       visit_load_ubo(bld_base, instr, result);
1269       break;
1270    case nir_intrinsic_load_ssbo:
1271       visit_load_ssbo(bld_base, instr, result);
1272       break;
1273    case nir_intrinsic_store_ssbo:
1274       visit_store_ssbo(bld_base, instr);
1275       break;
1276    case nir_intrinsic_get_buffer_size:
1277       visit_get_buffer_size(bld_base, instr, result);
1278       break;
1279    case nir_intrinsic_load_vertex_id:
1280    case nir_intrinsic_load_primitive_id:
1281    case nir_intrinsic_load_instance_id:
1282    case nir_intrinsic_load_base_instance:
1283    case nir_intrinsic_load_base_vertex:
1284    case nir_intrinsic_load_work_group_id:
1285    case nir_intrinsic_load_local_invocation_id:
1286    case nir_intrinsic_load_num_work_groups:
1287    case nir_intrinsic_load_invocation_id:
1288    case nir_intrinsic_load_front_face:
1289    case nir_intrinsic_load_draw_id:
1290    case nir_intrinsic_load_local_group_size:
1291    case nir_intrinsic_load_work_dim:
1292       bld_base->sysval_intrin(bld_base, instr, result);
1293       break;
1294    case nir_intrinsic_discard_if:
1295    case nir_intrinsic_discard:
1296       visit_discard(bld_base, instr);
1297       break;
1298    case nir_intrinsic_emit_vertex:
1299       bld_base->emit_vertex(bld_base, nir_intrinsic_stream_id(instr));
1300       break;
1301    case nir_intrinsic_end_primitive:
1302       bld_base->end_primitive(bld_base, nir_intrinsic_stream_id(instr));
1303       break;
1304    case nir_intrinsic_ssbo_atomic_add:
1305    case nir_intrinsic_ssbo_atomic_imin:
1306    case nir_intrinsic_ssbo_atomic_imax:
1307    case nir_intrinsic_ssbo_atomic_umin:
1308    case nir_intrinsic_ssbo_atomic_umax:
1309    case nir_intrinsic_ssbo_atomic_and:
1310    case nir_intrinsic_ssbo_atomic_or:
1311    case nir_intrinsic_ssbo_atomic_xor:
1312    case nir_intrinsic_ssbo_atomic_exchange:
1313    case nir_intrinsic_ssbo_atomic_comp_swap:
1314       visit_ssbo_atomic(bld_base, instr, result);
1315       break;
1316    case nir_intrinsic_image_deref_load:
1317       visit_load_image(bld_base, instr, result);
1318       break;
1319    case nir_intrinsic_image_deref_store:
1320       visit_store_image(bld_base, instr);
1321       break;
1322    case nir_intrinsic_image_deref_atomic_add:
1323    case nir_intrinsic_image_deref_atomic_imin:
1324    case nir_intrinsic_image_deref_atomic_imax:
1325    case nir_intrinsic_image_deref_atomic_umin:
1326    case nir_intrinsic_image_deref_atomic_umax:
1327    case nir_intrinsic_image_deref_atomic_and:
1328    case nir_intrinsic_image_deref_atomic_or:
1329    case nir_intrinsic_image_deref_atomic_xor:
1330    case nir_intrinsic_image_deref_atomic_exchange:
1331    case nir_intrinsic_image_deref_atomic_comp_swap:
1332       visit_atomic_image(bld_base, instr, result);
1333       break;
1334    case nir_intrinsic_image_deref_size:
1335       visit_image_size(bld_base, instr, result);
1336       break;
1337    case nir_intrinsic_load_shared:
1338       visit_shared_load(bld_base, instr, result);
1339       break;
1340    case nir_intrinsic_store_shared:
1341       visit_shared_store(bld_base, instr);
1342       break;
1343    case nir_intrinsic_shared_atomic_add:
1344    case nir_intrinsic_shared_atomic_imin:
1345    case nir_intrinsic_shared_atomic_umin:
1346    case nir_intrinsic_shared_atomic_imax:
1347    case nir_intrinsic_shared_atomic_umax:
1348    case nir_intrinsic_shared_atomic_and:
1349    case nir_intrinsic_shared_atomic_or:
1350    case nir_intrinsic_shared_atomic_xor:
1351    case nir_intrinsic_shared_atomic_exchange:
1352    case nir_intrinsic_shared_atomic_comp_swap:
1353       visit_shared_atomic(bld_base, instr, result);
1354       break;
1355    case nir_intrinsic_control_barrier:
1356       visit_barrier(bld_base);
1357       break;
1358    case nir_intrinsic_memory_barrier:
1359    case nir_intrinsic_memory_barrier_shared:
1360    case nir_intrinsic_memory_barrier_buffer:
1361    case nir_intrinsic_memory_barrier_image:
1362    case nir_intrinsic_memory_barrier_tcs_patch:
1363       break;
1364    case nir_intrinsic_load_kernel_input:
1365       visit_load_kernel_input(bld_base, instr, result);
1366      break;
1367    case nir_intrinsic_load_global:
1368       visit_load_global(bld_base, instr, result);
1369       break;
1370    case nir_intrinsic_store_global:
1371       visit_store_global(bld_base, instr);
1372       break;
1373    case nir_intrinsic_global_atomic_add:
1374    case nir_intrinsic_global_atomic_imin:
1375    case nir_intrinsic_global_atomic_umin:
1376    case nir_intrinsic_global_atomic_imax:
1377    case nir_intrinsic_global_atomic_umax:
1378    case nir_intrinsic_global_atomic_and:
1379    case nir_intrinsic_global_atomic_or:
1380    case nir_intrinsic_global_atomic_xor:
1381    case nir_intrinsic_global_atomic_exchange:
1382    case nir_intrinsic_global_atomic_comp_swap:
1383       visit_global_atomic(bld_base, instr, result);
1384    case nir_intrinsic_vote_all:
1385    case nir_intrinsic_vote_any:
1386    case nir_intrinsic_vote_ieq:
1387       bld_base->vote(bld_base, cast_type(bld_base, get_src(bld_base, instr->src[0]), nir_type_int, 32), instr, result);
1388       break;
1389    default:
1390       assert(0);
1391       break;
1392    }
1393    if (result[0]) {
1394       assign_dest(bld_base, &instr->dest, result);
1395    }
1396 }
1397
1398 static void visit_txs(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
1399 {
1400    struct lp_sampler_size_query_params params;
1401    LLVMValueRef sizes_out[NIR_MAX_VEC_COMPONENTS];
1402    LLVMValueRef explicit_lod = NULL;
1403
1404    for (unsigned i = 0; i < instr->num_srcs; i++) {
1405       switch (instr->src[i].src_type) {
1406       case nir_tex_src_lod:
1407          explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_int, 32);
1408          break;
1409       default:
1410          break;
1411       }
1412    }
1413
1414    params.target = glsl_sampler_to_pipe(instr->sampler_dim, instr->is_array);
1415    params.texture_unit = instr->texture_index;
1416    params.explicit_lod = explicit_lod;
1417    params.is_sviewinfo = TRUE;
1418    params.sizes_out = sizes_out;
1419
1420    if (instr->op == nir_texop_query_levels)
1421       params.explicit_lod = bld_base->uint_bld.zero;
1422    bld_base->tex_size(bld_base, &params);
1423    assign_dest(bld_base, &instr->dest, &sizes_out[instr->op == nir_texop_query_levels ? 3 : 0]);
1424 }
1425
1426 static enum lp_sampler_lod_property lp_build_nir_lod_property(struct lp_build_nir_context *bld_base,
1427                                                               nir_src lod_src)
1428 {
1429    enum lp_sampler_lod_property lod_property;
1430
1431    if (nir_src_is_dynamically_uniform(lod_src))
1432       lod_property = LP_SAMPLER_LOD_SCALAR;
1433    else if (bld_base->shader->info.stage == MESA_SHADER_FRAGMENT) {
1434       if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD)
1435          lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1436       else
1437          lod_property = LP_SAMPLER_LOD_PER_QUAD;
1438    }
1439    else
1440       lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1441    return lod_property;
1442 }
1443
1444 static void visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
1445 {
1446    struct gallivm_state *gallivm = bld_base->base.gallivm;
1447    LLVMBuilderRef builder = gallivm->builder;
1448    LLVMValueRef coords[5];
1449    LLVMValueRef offsets[3] = { NULL };
1450    LLVMValueRef explicit_lod = NULL, projector = NULL;
1451    struct lp_sampler_params params;
1452    struct lp_derivatives derivs;
1453    unsigned sample_key = 0;
1454    nir_deref_instr *texture_deref_instr = NULL;
1455    nir_deref_instr *sampler_deref_instr = NULL;
1456    LLVMValueRef texel[NIR_MAX_VEC_COMPONENTS];
1457    unsigned lod_src = 0;
1458    LLVMValueRef coord_undef = LLVMGetUndef(bld_base->base.int_vec_type);
1459
1460    memset(&params, 0, sizeof(params));
1461    enum lp_sampler_lod_property lod_property = LP_SAMPLER_LOD_SCALAR;
1462
1463    if (instr->op == nir_texop_txs || instr->op == nir_texop_query_levels) {
1464       visit_txs(bld_base, instr);
1465       return;
1466    }
1467    if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
1468       sample_key |= LP_SAMPLER_OP_FETCH << LP_SAMPLER_OP_TYPE_SHIFT;
1469    else if (instr->op == nir_texop_tg4) {
1470       sample_key |= LP_SAMPLER_OP_GATHER << LP_SAMPLER_OP_TYPE_SHIFT;
1471       sample_key |= (instr->component << LP_SAMPLER_GATHER_COMP_SHIFT);
1472    } else if (instr->op == nir_texop_lod)
1473       sample_key |= LP_SAMPLER_OP_LODQ << LP_SAMPLER_OP_TYPE_SHIFT;
1474    for (unsigned i = 0; i < instr->num_srcs; i++) {
1475       switch (instr->src[i].src_type) {
1476       case nir_tex_src_coord: {
1477          LLVMValueRef coord = get_src(bld_base, instr->src[i].src);
1478          if (instr->coord_components == 1)
1479             coords[0] = coord;
1480          else {
1481             for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1482                coords[chan] = LLVMBuildExtractValue(builder, coord,
1483                                                     chan, "");
1484          }
1485          for (unsigned chan = instr->coord_components; chan < 5; chan++)
1486             coords[chan] = coord_undef;
1487
1488          break;
1489       }
1490       case nir_tex_src_texture_deref:
1491          texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1492          break;
1493       case nir_tex_src_sampler_deref:
1494          sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
1495          break;
1496       case nir_tex_src_projector:
1497          projector = lp_build_rcp(&bld_base->base, cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32));
1498          break;
1499       case nir_tex_src_comparator:
1500          sample_key |= LP_SAMPLER_SHADOW;
1501          coords[4] = get_src(bld_base, instr->src[i].src);
1502          coords[4] = cast_type(bld_base, coords[4], nir_type_float, 32);
1503          break;
1504       case nir_tex_src_bias:
1505          sample_key |= LP_SAMPLER_LOD_BIAS << LP_SAMPLER_LOD_CONTROL_SHIFT;
1506          lod_src = i;
1507          explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32);
1508          break;
1509       case nir_tex_src_lod:
1510          sample_key |= LP_SAMPLER_LOD_EXPLICIT << LP_SAMPLER_LOD_CONTROL_SHIFT;
1511          lod_src = i;
1512          if (instr->op == nir_texop_txf)
1513             explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_int, 32);
1514          else
1515             explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32);
1516          break;
1517       case nir_tex_src_ddx: {
1518          int deriv_cnt = instr->coord_components;
1519          if (instr->is_array)
1520             deriv_cnt--;
1521          LLVMValueRef deriv_val = get_src(bld_base, instr->src[i].src);
1522          if (deriv_cnt == 1)
1523             derivs.ddx[0] = deriv_val;
1524          else
1525             for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1526                derivs.ddx[chan] = LLVMBuildExtractValue(builder, deriv_val,
1527                                                         chan, "");
1528          for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1529             derivs.ddx[chan] = cast_type(bld_base, derivs.ddx[chan], nir_type_float, 32);
1530          break;
1531       }
1532       case nir_tex_src_ddy: {
1533          int deriv_cnt = instr->coord_components;
1534          if (instr->is_array)
1535             deriv_cnt--;
1536          LLVMValueRef deriv_val = get_src(bld_base, instr->src[i].src);
1537          if (deriv_cnt == 1)
1538             derivs.ddy[0] = deriv_val;
1539          else
1540             for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1541                derivs.ddy[chan] = LLVMBuildExtractValue(builder, deriv_val,
1542                                                         chan, "");
1543          for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1544             derivs.ddy[chan] = cast_type(bld_base, derivs.ddy[chan], nir_type_float, 32);
1545          break;
1546       }
1547       case nir_tex_src_offset: {
1548          int offset_cnt = instr->coord_components;
1549          if (instr->is_array)
1550             offset_cnt--;
1551          LLVMValueRef offset_val = get_src(bld_base, instr->src[i].src);
1552          sample_key |= LP_SAMPLER_OFFSETS;
1553          if (offset_cnt == 1)
1554             offsets[0] = cast_type(bld_base, offset_val, nir_type_int, 32);
1555          else {
1556             for (unsigned chan = 0; chan < offset_cnt; ++chan) {
1557                offsets[chan] = LLVMBuildExtractValue(builder, offset_val,
1558                                                      chan, "");
1559                offsets[chan] = cast_type(bld_base, offsets[chan], nir_type_int, 32);
1560             }
1561          }
1562          break;
1563       }
1564       case nir_tex_src_ms_index:
1565          break;
1566       default:
1567          assert(0);
1568          break;
1569       }
1570    }
1571    if (!sampler_deref_instr)
1572       sampler_deref_instr = texture_deref_instr;
1573
1574    if (explicit_lod)
1575       lod_property = lp_build_nir_lod_property(bld_base, instr->src[lod_src].src);
1576
1577    if (instr->op == nir_texop_tex || instr->op == nir_texop_tg4 || instr->op == nir_texop_txb ||
1578        instr->op == nir_texop_txl || instr->op == nir_texop_txd || instr->op == nir_texop_lod)
1579       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1580          coords[chan] = cast_type(bld_base, coords[chan], nir_type_float, 32);
1581    else if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
1582       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1583          coords[chan] = cast_type(bld_base, coords[chan], nir_type_int, 32);
1584
1585    if (instr->is_array && instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
1586       /* move layer coord for 1d arrays. */
1587       coords[2] = coords[1];
1588       coords[1] = coord_undef;
1589    }
1590
1591    if (projector) {
1592       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1593          coords[chan] = lp_build_mul(&bld_base->base, coords[chan], projector);
1594       if (sample_key & LP_SAMPLER_SHADOW)
1595          coords[4] = lp_build_mul(&bld_base->base, coords[4], projector);
1596    }
1597
1598    uint32_t base_index = 0;
1599    if (!texture_deref_instr) {
1600       int samp_src_index = nir_tex_instr_src_index(instr, nir_tex_src_sampler_handle);
1601       if (samp_src_index == -1) {
1602          base_index = instr->sampler_index;
1603       }
1604    }
1605
1606    if (instr->op == nir_texop_txd) {
1607       sample_key |= LP_SAMPLER_LOD_DERIVATIVES << LP_SAMPLER_LOD_CONTROL_SHIFT;
1608       params.derivs = &derivs;
1609       if (bld_base->shader->info.stage == MESA_SHADER_FRAGMENT) {
1610          if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD)
1611             lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1612          else
1613             lod_property = LP_SAMPLER_LOD_PER_QUAD;
1614       } else
1615          lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1616    }
1617
1618    sample_key |= lod_property << LP_SAMPLER_LOD_PROPERTY_SHIFT;
1619    params.sample_key = sample_key;
1620    params.offsets = offsets;
1621    params.texture_index = base_index;
1622    params.sampler_index = base_index;
1623    params.coords = coords;
1624    params.texel = texel;
1625    params.lod = explicit_lod;
1626    bld_base->tex(bld_base, &params);
1627    assign_dest(bld_base, &instr->dest, texel);
1628 }
1629
1630 static void visit_ssa_undef(struct lp_build_nir_context *bld_base,
1631                             const nir_ssa_undef_instr *instr)
1632 {
1633    unsigned num_components = instr->def.num_components;
1634    LLVMValueRef undef[NIR_MAX_VEC_COMPONENTS];
1635    struct lp_build_context *undef_bld = get_int_bld(bld_base, true, instr->def.bit_size);
1636    for (unsigned i = 0; i < num_components; i++)
1637       undef[i] = LLVMGetUndef(undef_bld->vec_type);
1638    assign_ssa_dest(bld_base, &instr->def, undef);
1639 }
1640
1641 static void visit_jump(struct lp_build_nir_context *bld_base,
1642                        const nir_jump_instr *instr)
1643 {
1644    switch (instr->type) {
1645    case nir_jump_break:
1646       bld_base->break_stmt(bld_base);
1647       break;
1648    case nir_jump_continue:
1649       bld_base->continue_stmt(bld_base);
1650       break;
1651    default:
1652       unreachable("Unknown jump instr\n");
1653    }
1654 }
1655
1656 static void visit_deref(struct lp_build_nir_context *bld_base,
1657                         nir_deref_instr *instr)
1658 {
1659    if (instr->mode != nir_var_mem_shared &&
1660        instr->mode != nir_var_mem_global)
1661       return;
1662    LLVMValueRef result = NULL;
1663    switch(instr->deref_type) {
1664    case nir_deref_type_var: {
1665       struct hash_entry *entry = _mesa_hash_table_search(bld_base->vars, instr->var);
1666       result = entry->data;
1667       break;
1668    }
1669    default:
1670       unreachable("Unhandled deref_instr deref type");
1671    }
1672
1673    assign_ssa(bld_base, instr->dest.ssa.index, result);
1674 }
1675
1676 static void visit_block(struct lp_build_nir_context *bld_base, nir_block *block)
1677 {
1678    nir_foreach_instr(instr, block)
1679    {
1680       switch (instr->type) {
1681       case nir_instr_type_alu:
1682          visit_alu(bld_base, nir_instr_as_alu(instr));
1683          break;
1684       case nir_instr_type_load_const:
1685          visit_load_const(bld_base, nir_instr_as_load_const(instr));
1686          break;
1687       case nir_instr_type_intrinsic:
1688          visit_intrinsic(bld_base, nir_instr_as_intrinsic(instr));
1689          break;
1690       case nir_instr_type_tex:
1691          visit_tex(bld_base, nir_instr_as_tex(instr));
1692          break;
1693       case nir_instr_type_phi:
1694          assert(0);
1695          break;
1696       case nir_instr_type_ssa_undef:
1697          visit_ssa_undef(bld_base, nir_instr_as_ssa_undef(instr));
1698          break;
1699       case nir_instr_type_jump:
1700          visit_jump(bld_base, nir_instr_as_jump(instr));
1701          break;
1702       case nir_instr_type_deref:
1703          visit_deref(bld_base, nir_instr_as_deref(instr));
1704          break;
1705       default:
1706          fprintf(stderr, "Unknown NIR instr type: ");
1707          nir_print_instr(instr, stderr);
1708          fprintf(stderr, "\n");
1709          abort();
1710       }
1711    }
1712 }
1713
1714 static void visit_if(struct lp_build_nir_context *bld_base, nir_if *if_stmt)
1715 {
1716    LLVMValueRef cond = get_src(bld_base, if_stmt->condition);
1717
1718    bld_base->if_cond(bld_base, cond);
1719    visit_cf_list(bld_base, &if_stmt->then_list);
1720
1721    if (!exec_list_is_empty(&if_stmt->else_list)) {
1722       bld_base->else_stmt(bld_base);
1723       visit_cf_list(bld_base, &if_stmt->else_list);
1724    }
1725    bld_base->endif_stmt(bld_base);
1726 }
1727
1728 static void visit_loop(struct lp_build_nir_context *bld_base, nir_loop *loop)
1729 {
1730    bld_base->bgnloop(bld_base);
1731    visit_cf_list(bld_base, &loop->body);
1732    bld_base->endloop(bld_base);
1733 }
1734
1735 static void visit_cf_list(struct lp_build_nir_context *bld_base,
1736                           struct exec_list *list)
1737 {
1738    foreach_list_typed(nir_cf_node, node, node, list)
1739    {
1740       switch (node->type) {
1741       case nir_cf_node_block:
1742          visit_block(bld_base, nir_cf_node_as_block(node));
1743          break;
1744
1745       case nir_cf_node_if:
1746          visit_if(bld_base, nir_cf_node_as_if(node));
1747          break;
1748
1749       case nir_cf_node_loop:
1750          visit_loop(bld_base, nir_cf_node_as_loop(node));
1751          break;
1752
1753       default:
1754          assert(0);
1755       }
1756    }
1757 }
1758
1759 static void
1760 handle_shader_output_decl(struct lp_build_nir_context *bld_base,
1761                           struct nir_shader *nir,
1762                           struct nir_variable *variable)
1763 {
1764    bld_base->emit_var_decl(bld_base, variable);
1765 }
1766
1767 /* vector registers are stored as arrays in LLVM side,
1768    so we can use GEP on them, as to do exec mask stores
1769    we need to operate on a single components.
1770    arrays are:
1771    0.x, 1.x, 2.x, 3.x
1772    0.y, 1.y, 2.y, 3.y
1773    ....
1774 */
1775 static LLVMTypeRef get_register_type(struct lp_build_nir_context *bld_base,
1776                                      nir_register *reg)
1777 {
1778    struct lp_build_context *int_bld = get_int_bld(bld_base, true, reg->bit_size);
1779
1780    LLVMTypeRef type = int_bld->vec_type;
1781    if (reg->num_array_elems)
1782       type = LLVMArrayType(type, reg->num_array_elems);
1783    if (reg->num_components > 1)
1784       type = LLVMArrayType(type, reg->num_components);
1785
1786    return type;
1787 }
1788
1789
1790 bool lp_build_nir_llvm(
1791    struct lp_build_nir_context *bld_base,
1792    struct nir_shader *nir)
1793 {
1794    struct nir_function *func;
1795
1796    nir_convert_from_ssa(nir, true);
1797    nir_lower_locals_to_regs(nir);
1798    nir_remove_dead_derefs(nir);
1799    nir_remove_dead_variables(nir, nir_var_function_temp);
1800
1801    nir_foreach_variable(variable, &nir->outputs)
1802       handle_shader_output_decl(bld_base, nir, variable);
1803
1804    bld_base->regs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1805                                             _mesa_key_pointer_equal);
1806    bld_base->vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1807                                             _mesa_key_pointer_equal);
1808
1809    func = (struct nir_function *)exec_list_get_head(&nir->functions);
1810
1811    nir_foreach_register(reg, &func->impl->registers) {
1812       LLVMTypeRef type = get_register_type(bld_base, reg);
1813       LLVMValueRef reg_alloc = lp_build_alloca_undef(bld_base->base.gallivm,
1814                                                      type, "reg");
1815       _mesa_hash_table_insert(bld_base->regs, reg, reg_alloc);
1816    }
1817    nir_index_ssa_defs(func->impl);
1818    bld_base->ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
1819    visit_cf_list(bld_base, &func->impl->body);
1820
1821    free(bld_base->ssa_defs);
1822    ralloc_free(bld_base->vars);
1823    ralloc_free(bld_base->regs);
1824    return true;
1825 }
1826
1827 /* do some basic opts to remove some things we don't want to see. */
1828 void lp_build_opt_nir(struct nir_shader *nir)
1829 {
1830    bool progress;
1831    do {
1832       progress = false;
1833       NIR_PASS_V(nir, nir_opt_constant_folding);
1834       NIR_PASS_V(nir, nir_opt_algebraic);
1835       NIR_PASS_V(nir, nir_lower_pack);
1836    } while (progress);
1837    nir_lower_bool_to_int32(nir);
1838 }