gallium/ureg: Set the next shader stage from the shader info.
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_info.c
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "util/u_debug.h"
29 #include "util/u_memory.h"
30 #include "tgsi_info.h"
31
32 #define NONE TGSI_OUTPUT_NONE
33 #define COMP TGSI_OUTPUT_COMPONENTWISE
34 #define REPL TGSI_OUTPUT_REPLICATE
35 #define CHAN TGSI_OUTPUT_CHAN_DEPENDENT
36 #define OTHR TGSI_OUTPUT_OTHER
37
38 #define OPCODE(_num_dst, _num_src, _output_mode, name, ...) \
39 { .opcode = TGSI_OPCODE_ ## name, \
40 .output_mode = _output_mode, .num_dst = _num_dst, .num_src = _num_src, \
41 ##__VA_ARGS__ },
42
43 #define OPCODE_GAP(opc) { .opcode = opc },
44
45 static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
46 {
47 #include "tgsi_info_opcodes.h"
48 };
49
50 #undef OPCODE
51 #undef OPCODE_GAP
52
53 const struct tgsi_opcode_info *
54 tgsi_get_opcode_info(enum tgsi_opcode opcode)
55 {
56 static boolean firsttime = 1;
57
58 ASSERT_BITFIELD_SIZE(struct tgsi_opcode_info, opcode, TGSI_OPCODE_LAST - 1);
59 ASSERT_BITFIELD_SIZE(struct tgsi_opcode_info, output_mode,
60 TGSI_OUTPUT_OTHER);
61
62 if (firsttime) {
63 unsigned i;
64 firsttime = 0;
65 for (i = 0; i < ARRAY_SIZE(opcode_info); i++)
66 assert(opcode_info[i].opcode == i);
67 }
68
69 if (opcode < TGSI_OPCODE_LAST)
70 return &opcode_info[opcode];
71
72 assert( 0 );
73 return NULL;
74 }
75
76 #define OPCODE(_num_dst, _num_src, _output_mode, name, ...) #name,
77 #define OPCODE_GAP(opc) "UNK" #opc,
78
79 static const char * const opcode_names[TGSI_OPCODE_LAST] =
80 {
81 #include "tgsi_info_opcodes.h"
82 };
83
84 #undef OPCODE
85 #undef OPCODE_GAP
86
87 const char *
88 tgsi_get_opcode_name(enum tgsi_opcode opcode)
89 {
90 if (opcode >= ARRAY_SIZE(opcode_names))
91 return "UNK_OOB";
92 return opcode_names[opcode];
93 }
94
95
96 const char *
97 tgsi_get_processor_name(enum pipe_shader_type processor)
98 {
99 switch (processor) {
100 case PIPE_SHADER_VERTEX:
101 return "vertex shader";
102 case PIPE_SHADER_FRAGMENT:
103 return "fragment shader";
104 case PIPE_SHADER_GEOMETRY:
105 return "geometry shader";
106 case PIPE_SHADER_TESS_CTRL:
107 return "tessellation control shader";
108 case PIPE_SHADER_TESS_EVAL:
109 return "tessellation evaluation shader";
110 case PIPE_SHADER_COMPUTE:
111 return "compute shader";
112 default:
113 return "unknown shader type!";
114 }
115 }
116
117 /**
118 * Infer the type (of the dst) of the opcode.
119 *
120 * MOV and UCMP is special so return VOID
121 */
122 static inline enum tgsi_opcode_type
123 tgsi_opcode_infer_type(enum tgsi_opcode opcode)
124 {
125 switch (opcode) {
126 case TGSI_OPCODE_MOV:
127 case TGSI_OPCODE_UCMP:
128 return TGSI_TYPE_UNTYPED;
129 case TGSI_OPCODE_NOT:
130 case TGSI_OPCODE_SHL:
131 case TGSI_OPCODE_AND:
132 case TGSI_OPCODE_OR:
133 case TGSI_OPCODE_XOR:
134 case TGSI_OPCODE_TXQ:
135 case TGSI_OPCODE_TXQS:
136 case TGSI_OPCODE_F2U:
137 case TGSI_OPCODE_UDIV:
138 case TGSI_OPCODE_UMAD:
139 case TGSI_OPCODE_UMAX:
140 case TGSI_OPCODE_UMIN:
141 case TGSI_OPCODE_UMOD:
142 case TGSI_OPCODE_UMUL:
143 case TGSI_OPCODE_USEQ:
144 case TGSI_OPCODE_USGE:
145 case TGSI_OPCODE_USHR:
146 case TGSI_OPCODE_USLT:
147 case TGSI_OPCODE_USNE:
148 case TGSI_OPCODE_SVIEWINFO:
149 case TGSI_OPCODE_UMUL_HI:
150 case TGSI_OPCODE_UBFE:
151 case TGSI_OPCODE_BFI:
152 case TGSI_OPCODE_BREV:
153 case TGSI_OPCODE_IMG2HND:
154 case TGSI_OPCODE_SAMP2HND:
155 return TGSI_TYPE_UNSIGNED;
156 case TGSI_OPCODE_ARL:
157 case TGSI_OPCODE_ARR:
158 case TGSI_OPCODE_MOD:
159 case TGSI_OPCODE_F2I:
160 case TGSI_OPCODE_FSEQ:
161 case TGSI_OPCODE_FSGE:
162 case TGSI_OPCODE_FSLT:
163 case TGSI_OPCODE_FSNE:
164 case TGSI_OPCODE_IDIV:
165 case TGSI_OPCODE_IMAX:
166 case TGSI_OPCODE_IMIN:
167 case TGSI_OPCODE_INEG:
168 case TGSI_OPCODE_ISGE:
169 case TGSI_OPCODE_ISHR:
170 case TGSI_OPCODE_ISLT:
171 case TGSI_OPCODE_UADD:
172 case TGSI_OPCODE_UARL:
173 case TGSI_OPCODE_IABS:
174 case TGSI_OPCODE_ISSG:
175 case TGSI_OPCODE_IMUL_HI:
176 case TGSI_OPCODE_IBFE:
177 case TGSI_OPCODE_IMSB:
178 case TGSI_OPCODE_DSEQ:
179 case TGSI_OPCODE_DSGE:
180 case TGSI_OPCODE_DSLT:
181 case TGSI_OPCODE_DSNE:
182 case TGSI_OPCODE_U64SEQ:
183 case TGSI_OPCODE_U64SNE:
184 case TGSI_OPCODE_U64SLT:
185 case TGSI_OPCODE_U64SGE:
186 case TGSI_OPCODE_I64SLT:
187 case TGSI_OPCODE_I64SGE:
188 case TGSI_OPCODE_LSB:
189 case TGSI_OPCODE_POPC:
190 case TGSI_OPCODE_UMSB:
191 return TGSI_TYPE_SIGNED;
192 case TGSI_OPCODE_DADD:
193 case TGSI_OPCODE_DABS:
194 case TGSI_OPCODE_DFMA:
195 case TGSI_OPCODE_DNEG:
196 case TGSI_OPCODE_DMUL:
197 case TGSI_OPCODE_DMAX:
198 case TGSI_OPCODE_DDIV:
199 case TGSI_OPCODE_DMIN:
200 case TGSI_OPCODE_DRCP:
201 case TGSI_OPCODE_DSQRT:
202 case TGSI_OPCODE_DMAD:
203 case TGSI_OPCODE_DLDEXP:
204 case TGSI_OPCODE_DFRACEXP:
205 case TGSI_OPCODE_DFRAC:
206 case TGSI_OPCODE_DRSQ:
207 case TGSI_OPCODE_DTRUNC:
208 case TGSI_OPCODE_DCEIL:
209 case TGSI_OPCODE_DFLR:
210 case TGSI_OPCODE_DROUND:
211 case TGSI_OPCODE_DSSG:
212 case TGSI_OPCODE_F2D:
213 case TGSI_OPCODE_I2D:
214 case TGSI_OPCODE_U2D:
215 case TGSI_OPCODE_U642D:
216 case TGSI_OPCODE_I642D:
217 return TGSI_TYPE_DOUBLE;
218 case TGSI_OPCODE_U64MAX:
219 case TGSI_OPCODE_U64MIN:
220 case TGSI_OPCODE_U64ADD:
221 case TGSI_OPCODE_U64MUL:
222 case TGSI_OPCODE_U64DIV:
223 case TGSI_OPCODE_U64MOD:
224 case TGSI_OPCODE_U64SHL:
225 case TGSI_OPCODE_U64SHR:
226 case TGSI_OPCODE_F2U64:
227 case TGSI_OPCODE_D2U64:
228 return TGSI_TYPE_UNSIGNED64;
229 case TGSI_OPCODE_I64MAX:
230 case TGSI_OPCODE_I64MIN:
231 case TGSI_OPCODE_I64ABS:
232 case TGSI_OPCODE_I64SSG:
233 case TGSI_OPCODE_I64NEG:
234 case TGSI_OPCODE_I64SHR:
235 case TGSI_OPCODE_I64DIV:
236 case TGSI_OPCODE_I64MOD:
237 case TGSI_OPCODE_F2I64:
238 case TGSI_OPCODE_U2I64:
239 case TGSI_OPCODE_I2I64:
240 case TGSI_OPCODE_D2I64:
241 return TGSI_TYPE_SIGNED64;
242 default:
243 return TGSI_TYPE_FLOAT;
244 }
245 }
246
247 /*
248 * infer the source type of a TGSI opcode.
249 */
250 enum tgsi_opcode_type
251 tgsi_opcode_infer_src_type(enum tgsi_opcode opcode, uint src_idx)
252 {
253 if (src_idx == 1 &&
254 (opcode == TGSI_OPCODE_DLDEXP || opcode == TGSI_OPCODE_LDEXP))
255 return TGSI_TYPE_SIGNED;
256
257 if (src_idx == 1 &&
258 (opcode == TGSI_OPCODE_LOAD))
259 return TGSI_TYPE_UNSIGNED;
260
261 if (src_idx == 0 &&
262 (opcode == TGSI_OPCODE_STORE))
263 return TGSI_TYPE_UNSIGNED;
264
265 if (src_idx == 1 &&
266 ((opcode >= TGSI_OPCODE_ATOMUADD && opcode <= TGSI_OPCODE_ATOMIMAX) ||
267 opcode == TGSI_OPCODE_ATOMINC_WRAP || opcode == TGSI_OPCODE_ATOMDEC_WRAP))
268 return TGSI_TYPE_UNSIGNED;
269
270 switch (opcode) {
271 case TGSI_OPCODE_UIF:
272 case TGSI_OPCODE_TXF:
273 case TGSI_OPCODE_TXF_LZ:
274 case TGSI_OPCODE_U2F:
275 case TGSI_OPCODE_U2D:
276 case TGSI_OPCODE_UADD:
277 case TGSI_OPCODE_SWITCH:
278 case TGSI_OPCODE_CASE:
279 case TGSI_OPCODE_SAMPLE_I:
280 case TGSI_OPCODE_SAMPLE_I_MS:
281 case TGSI_OPCODE_UMUL_HI:
282 case TGSI_OPCODE_UP2H:
283 case TGSI_OPCODE_U2I64:
284 case TGSI_OPCODE_MEMBAR:
285 case TGSI_OPCODE_UMSB:
286 return TGSI_TYPE_UNSIGNED;
287 case TGSI_OPCODE_IMUL_HI:
288 case TGSI_OPCODE_I2F:
289 case TGSI_OPCODE_I2D:
290 case TGSI_OPCODE_I2I64:
291 return TGSI_TYPE_SIGNED;
292 case TGSI_OPCODE_ARL:
293 case TGSI_OPCODE_ARR:
294 case TGSI_OPCODE_F2D:
295 case TGSI_OPCODE_F2I:
296 case TGSI_OPCODE_F2U:
297 case TGSI_OPCODE_FSEQ:
298 case TGSI_OPCODE_FSGE:
299 case TGSI_OPCODE_FSLT:
300 case TGSI_OPCODE_FSNE:
301 case TGSI_OPCODE_UCMP:
302 case TGSI_OPCODE_F2U64:
303 case TGSI_OPCODE_F2I64:
304 return TGSI_TYPE_FLOAT;
305 case TGSI_OPCODE_D2F:
306 case TGSI_OPCODE_D2U:
307 case TGSI_OPCODE_D2I:
308 case TGSI_OPCODE_DSEQ:
309 case TGSI_OPCODE_DSGE:
310 case TGSI_OPCODE_DSLT:
311 case TGSI_OPCODE_DSNE:
312 case TGSI_OPCODE_D2U64:
313 case TGSI_OPCODE_D2I64:
314 return TGSI_TYPE_DOUBLE;
315 case TGSI_OPCODE_U64SEQ:
316 case TGSI_OPCODE_U64SNE:
317 case TGSI_OPCODE_U64SLT:
318 case TGSI_OPCODE_U64SGE:
319 case TGSI_OPCODE_U642F:
320 case TGSI_OPCODE_U642D:
321 return TGSI_TYPE_UNSIGNED64;
322 case TGSI_OPCODE_I64SLT:
323 case TGSI_OPCODE_I64SGE:
324 case TGSI_OPCODE_I642F:
325 case TGSI_OPCODE_I642D:
326 return TGSI_TYPE_SIGNED64;
327 default:
328 return tgsi_opcode_infer_type(opcode);
329 }
330 }
331
332 /*
333 * infer the destination type of a TGSI opcode.
334 */
335 enum tgsi_opcode_type
336 tgsi_opcode_infer_dst_type(enum tgsi_opcode opcode, uint dst_idx)
337 {
338 if (dst_idx == 1 && opcode == TGSI_OPCODE_DFRACEXP)
339 return TGSI_TYPE_SIGNED;
340
341 return tgsi_opcode_infer_type(opcode);
342 }