src/gallium/auxiliary/util/u_cpu_detect.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Dennis Smit
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * on the rights to use, copy, modify, merge, publish, distribute, sub
  10  * license, and/or sell copies of the Software, and to permit persons to whom
  11  * the Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  20  * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  21  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  22  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  23  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  **************************************************************************/
  26
  27 /**
  28  * @file
  29  * CPU feature detection.
  30  *
  31  * @author Dennis Smit
  32  * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
  33  */
  34
  35 #include "pipe/p_config.h"
  36
  37 #include "u_debug.h"
  38 #include "u_cpu_detect.h"
  39
  40 #if defined(PIPE_ARCH_PPC)
  41 #if defined(PIPE_OS_DARWIN)
  42 #include <sys/sysctl.h>
  43 #else
  44 #include <signal.h>
  45 #include <setjmp.h>
  46 #endif
  47 #endif
  48
  49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
  50 #include <sys/param.h>
  51 #include <sys/sysctl.h>
  52 #include <machine/cpu.h>
  53 #endif
  54
  55 #if defined(PIPE_OS_FREEBSD)
  56 #include <sys/types.h>
  57 #include <sys/sysctl.h>
  58 #endif
  59
  60 #if defined(PIPE_OS_LINUX)
  61 #include <signal.h>
  62 #endif
  63
  64 #ifdef PIPE_OS_UNIX
  65 #include <unistd.h>
  66 #endif
  67
  68 #if defined(PIPE_OS_WINDOWS)
  69 #include <windows.h>
  70 #endif
  71
  72
  73 struct util_cpu_caps util_cpu_caps;
  74
  75 static int has_cpuid(void);
  76 static int cpuid(uint32_t ax, uint32_t *p);
  77
  78 #if defined(PIPE_ARCH_X86)
  79
  80 /* The sigill handlers */
  81 #if defined(PIPE_OS_LINUX) //&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
  82 static void
  83 sigill_handler_sse(int signal, struct sigcontext sc)
  84 {
  85    /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
  86     * instructions are 3 bytes long.  We must increment the instruction
  87     * pointer manually to avoid repeated execution of the offending
  88     * instruction.
  89     *
  90     * If the SIGILL is caused by a divide-by-zero when unmasked
  91     * exceptions aren't supported, the SIMD FPU status and control
  92     * word will be restored at the end of the test, so we don't need
  93     * to worry about doing it here.  Besides, we may not be able to...
  94     */
  95    sc.eip += 3;
  96
  97    util_cpu_caps.has_sse=0;
  98 }
  99
 100 static void
 101 sigfpe_handler_sse(int signal, struct sigcontext sc)
 102 {
 103    if (sc.fpstate->magic != 0xffff) {
 104       /* Our signal context has the extended FPU state, so reset the
 105        * divide-by-zero exception mask and clear the divide-by-zero
 106        * exception bit.
 107        */
 108       sc.fpstate->mxcsr |= 0x00000200;
 109       sc.fpstate->mxcsr &= 0xfffffffb;
 110    } else {
 111       /* If we ever get here, we're completely hosed.
 112       */
 113    }
 114 }
 115 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
 116
 117 #if defined(PIPE_OS_WINDOWS)
 118 static LONG CALLBACK
 119 win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
 120 {
 121    if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
 122       ep->ContextRecord->Eip +=3;
 123       util_cpu_caps.has_sse=0;
 124       return EXCEPTION_CONTINUE_EXECUTION;
 125    }
 126    return EXCEPTION_CONTINUE_SEARCH;
 127 }
 128 #endif /* PIPE_OS_WINDOWS */
 129
 130 #endif /* PIPE_ARCH_X86 */
 131
 132
 133 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_DARWIN)
 134 static sigjmp_buf __lv_powerpc_jmpbuf;
 135 static volatile sig_atomic_t __lv_powerpc_canjump = 0;
 136
 137 static void
 138 sigill_handler(int sig)
 139 {
 140    if (!__lv_powerpc_canjump) {
 141       signal (sig, SIG_DFL);
 142       raise (sig);
 143    }
 144
 145    __lv_powerpc_canjump = 0;
 146    siglongjmp(__lv_powerpc_jmpbuf, 1);
 147 }
 148
 149 static void
 150 check_os_altivec_support(void)
 151 {
 152 #if defined(PIPE_OS_DARWIN)
 153    int sels[2] = {CTL_HW, HW_VECTORUNIT};
 154    int has_vu = 0;
 155    int len = sizeof (has_vu);
 156    int err;
 157
 158    err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
 159
 160    if (err == 0) {
 161       if (has_vu != 0) {
 162          util_cpu_caps.has_altivec = 1;
 163       }
 164    }
 165 #else /* !PIPE_OS_DARWIN */
 166    /* no Darwin, do it the brute-force way */
 167    /* this is borrowed from the libmpeg2 library */
 168    signal(SIGILL, sigill_handler);
 169    if (sigsetjmp(__lv_powerpc_jmpbuf, 1)) {
 170       signal(SIGILL, SIG_DFL);
 171    } else {
 172       __lv_powerpc_canjump = 1;
 173
 174       __asm __volatile
 175          ("mtspr 256, %0\n\t"
 176           "vand %%v0, %%v0, %%v0"
 177           :
 178           : "r" (-1));
 179
 180       signal(SIGILL, SIG_DFL);
 181       util_cpu_caps.has_altivec = 1;
 182    }
 183 #endif
 184 }
 185 #endif
 186
 187 /* If we're running on a processor that can do SSE, let's see if we
 188  * are allowed to or not.  This will catch 2.4.0 or later kernels that
 189  * haven't been configured for a Pentium III but are running on one,
 190  * and RedHat patched 2.2 kernels that have broken exception handling
 191  * support for user space apps that do SSE.
 192  */
 193 static void
 194 check_os_katmai_support(void)
 195 {
 196 #if defined(PIPE_ARCH_X86)
 197 #if defined(PIPE_OS_FREEBSD)
 198    int has_sse=0, ret;
 199    int len = sizeof (has_sse);
 200
 201    ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0);
 202    if (ret || !has_sse)
 203       util_cpu_caps.has_sse=0;
 204
 205 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
 206    int has_sse, has_sse2, ret, mib[2];
 207    int varlen;
 208
 209    mib[0] = CTL_MACHDEP;
 210    mib[1] = CPU_SSE;
 211    varlen = sizeof (has_sse);
 212
 213    ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
 214    if (ret < 0 || !has_sse) {
 215       util_cpu_caps.has_sse = 0;
 216    } else {
 217       util_cpu_caps.has_sse = 1;
 218    }
 219
 220    mib[1] = CPU_SSE2;
 221    varlen = sizeof (has_sse2);
 222    ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
 223    if (ret < 0 || !has_sse2) {
 224       util_cpu_caps.has_sse2 = 0;
 225    } else {
 226       util_cpu_caps.has_sse2 = 1;
 227    }
 228    util_cpu_caps.has_sse = 0; /* FIXME ?!?!? */
 229
 230 #elif defined(PIPE_OS_WINDOWS)
 231    LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
 232    if (util_cpu_caps.has_sse) {
 233       exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
 234 #if defined(PIPE_CC_GCC)
 235       __asm __volatile ("xorps %xmm0, %xmm0");
 236 #elif defined(PIPE_CC_MSVC)
 237       __asm {
 238           xorps xmm0, xmm0        // executing SSE instruction
 239       }
 240 #else
 241 #error Unsupported compiler
 242 #endif
 243       SetUnhandledExceptionFilter(exc_fil);
 244    }
 245 #elif defined(PIPE_OS_LINUX)
 246    struct sigaction saved_sigill;
 247    struct sigaction saved_sigfpe;
 248
 249    /* Save the original signal handlers.
 250    */
 251    sigaction(SIGILL, NULL, &saved_sigill);
 252    sigaction(SIGFPE, NULL, &saved_sigfpe);
 253
 254    signal(SIGILL, (void (*)(int))sigill_handler_sse);
 255    signal(SIGFPE, (void (*)(int))sigfpe_handler_sse);
 256
 257    /* Emulate test for OSFXSR in CR4.  The OS will set this bit if it
 258     * supports the extended FPU save and restore required for SSE.  If
 259     * we execute an SSE instruction on a PIII and get a SIGILL, the OS
 260     * doesn't support Streaming SIMD Exceptions, even if the processor
 261     * does.
 262     */
 263    if (util_cpu_caps.has_sse) {
 264       __asm __volatile ("xorps %xmm1, %xmm0");
 265    }
 266
 267    /* Emulate test for OSXMMEXCPT in CR4.  The OS will set this bit if
 268     * it supports unmasked SIMD FPU exceptions.  If we unmask the
 269     * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
 270     * doesn't support unmasked SIMD FPU exceptions.  If we get a SIGFPE
 271     * as expected, we're okay but we need to clean up after it.
 272     *
 273     * Are we being too stringent in our requirement that the OS support
 274     * unmasked exceptions?  Certain RedHat 2.2 kernels enable SSE by
 275     * setting CR4.OSFXSR but don't support unmasked exceptions.  Win98
 276     * doesn't even support them.  We at least know the user-space SSE
 277     * support is good in kernels that do support unmasked exceptions,
 278     * and therefore to be safe I'm going to leave this test in here.
 279     */
 280    if (util_cpu_caps.has_sse) {
 281       //      test_os_katmai_exception_support();
 282    }
 283
 284    /* Restore the original signal handlers.
 285    */
 286    sigaction(SIGILL, &saved_sigill, NULL);
 287    sigaction(SIGFPE, &saved_sigfpe, NULL);
 288
 289 #else
 290    /* We can't use POSIX signal handling to test the availability of
 291     * SSE, so we disable it by default.
 292     */
 293    util_cpu_caps.has_sse = 0;
 294 #endif /* __linux__ */
 295 #endif
 296
 297 #if defined(PIPE_ARCH_X86_64)
 298    util_cpu_caps.has_sse = 1;
 299 #endif
 300 }
 301
 302
 303 static int has_cpuid(void)
 304 {
 305 #if defined(PIPE_ARCH_X86)
 306 #if defined(PIPE_OS_GCC)
 307    int a, c;
 308
 309    __asm __volatile
 310       ("pushf\n"
 311        "popl %0\n"
 312        "movl %0, %1\n"
 313        "xorl $0x200000, %0\n"
 314        "push %0\n"
 315        "popf\n"
 316        "pushf\n"
 317        "popl %0\n"
 318        : "=a" (a), "=c" (c)
 319        :
 320        : "cc");
 321
 322    return a != c;
 323 #else
 324    /* FIXME */
 325    return 1;
 326 #endif
 327 #elif defined(PIPE_ARCH_X86_64)
 328    return 1;
 329 #else
 330    return 0;
 331 #endif
 332 }
 333
 334
 335 /**
 336  * @sa cpuid.h included in gcc-4.3 onwards.
 337  */
 338 static INLINE int
 339 cpuid(uint32_t ax, uint32_t *p)
 340 {
 341    int ret = -1;
 342
 343 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
 344    __asm __volatile (
 345      "xchgl %%ebx, %1\n\t"
 346      "cpuid\n\t"
 347      "xchgl %%ebx, %1"
 348      : "=a" (p[0]),
 349        "=S" (p[1]),
 350        "=c" (p[2]),
 351        "=d" (p[3])
 352      : "0" (ax)
 353    );
 354    ret = 0;
 355 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
 356    __asm __volatile (
 357      "cpuid\n\t"
 358      : "=a" (p[0]),
 359        "=b" (p[1]),
 360        "=c" (p[2]),
 361        "=d" (p[3])
 362      : "0" (ax)
 363    );
 364    ret = 0;
 365 #elif defined(PIPE_CC_MSVC)
 366    __cpuid(ax, p);
 367
 368    ret = 0;
 369 #endif
 370
 371    return ret;
 372 }
 373
 374 void
 375 util_cpu_detect(void)
 376 {
 377    static boolean util_cpu_detect_initialized = FALSE;
 378
 379    if(util_cpu_detect_initialized)
 380       return;
 381
 382    memset(&util_cpu_caps, 0, sizeof util_cpu_caps);
 383
 384    /* Check for arch type */
 385 #if defined(PIPE_ARCH_MIPS)
 386    util_cpu_caps.arch = UTIL_CPU_ARCH_MIPS;
 387 #elif defined(PIPE_ARCH_ALPHA)
 388    util_cpu_caps.arch = UTIL_CPU_ARCH_ALPHA;
 389 #elif defined(PIPE_ARCH_SPARC)
 390    util_cpu_caps.arch = UTIL_CPU_ARCH_SPARC;
 391 #elif defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
 392    util_cpu_caps.arch = UTIL_CPU_ARCH_X86;
 393 #elif defined(PIPE_ARCH_PPC)
 394    util_cpu_caps.arch = UTIL_CPU_ARCH_POWERPC;
 395 #else
 396    util_cpu_caps.arch = UTIL_CPU_ARCH_UNKNOWN;
 397 #endif
 398
 399    /* Count the number of CPUs in system */
 400 #if !defined(PIPE_OS_WINDOWS) && !defined(PIPE_OS_UNKNOWN) && defined(_SC_NPROCESSORS_ONLN)
 401    util_cpu_caps.nr_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 402    if (util_cpu_caps.nr_cpus == -1)
 403       util_cpu_caps.nr_cpus = 1;
 404
 405 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_FREEBSD) || defined(PIPE_OS_OPENBSD)
 406    {
 407       int mib[2], ncpu;
 408       int len;
 409
 410       mib[0] = CTL_HW;
 411       mib[1] = HW_NCPU;
 412
 413       len = sizeof (ncpu);
 414       sysctl(mib, 2, &ncpu, &len, NULL, 0);
 415       util_cpu_caps.nr_cpus = ncpu;
 416    }
 417 #else
 418    util_cpu_caps.nr_cpus = 1;
 419 #endif
 420
 421 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
 422    if (has_cpuid()) {
 423       uint32_t regs[4];
 424       uint32_t regs2[4];
 425
 426       util_cpu_caps.cacheline = 32;
 427
 428       /* Get max cpuid level */
 429       cpuid(0x00000000, regs);
 430
 431       if (regs[0] >= 0x00000001) {
 432          unsigned int cacheline;
 433
 434          cpuid (0x00000001, regs2);
 435
 436          util_cpu_caps.x86_cpu_type = (regs2[0] >> 8) & 0xf;
 437          if (util_cpu_caps.x86_cpu_type == 0xf)
 438              util_cpu_caps.x86_cpu_type = 8 + ((regs2[0] >> 20) & 255); /* use extended family (P4, IA64) */
 439
 440          /* general feature flags */
 441          util_cpu_caps.has_tsc    = (regs2[3] & (1 << 8  )) >>  8; /* 0x0000010 */
 442          util_cpu_caps.has_mmx    = (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
 443          util_cpu_caps.has_sse    = (regs2[3] & (1 << 25 )) >> 25; /* 0x2000000 */
 444          util_cpu_caps.has_sse2   = (regs2[3] & (1 << 26 )) >> 26; /* 0x4000000 */
 445          util_cpu_caps.has_sse3   = (regs2[2] & (1));          /* 0x0000001 */
 446          util_cpu_caps.has_ssse3  = (regs2[2] & (1 << 9 )) >> 9;   /* 0x0000020 */
 447          util_cpu_caps.has_sse4_1 = (regs2[2] & (1 << 19)) >> 19;
 448          util_cpu_caps.has_mmx2   = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */
 449
 450          cacheline = ((regs2[1] >> 8) & 0xFF) * 8;
 451          if (cacheline > 0)
 452             util_cpu_caps.cacheline = cacheline;
 453       }
 454
 455       cpuid(0x80000000, regs);
 456
 457       if (regs[0] >= 0x80000001) {
 458
 459          cpuid(0x80000001, regs2);
 460
 461          util_cpu_caps.has_mmx  |= (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
 462          util_cpu_caps.has_mmx2 |= (regs2[3] & (1 << 22 )) >> 22; /* 0x400000 */
 463          util_cpu_caps.has_3dnow    = (regs2[3] & (1 << 31 )) >> 31; /* 0x80000000 */
 464          util_cpu_caps.has_3dnow_ext = (regs2[3] & (1 << 30 )) >> 30;
 465       }
 466
 467       if (regs[0] >= 0x80000006) {
 468          cpuid(0x80000006, regs2);
 469          util_cpu_caps.cacheline = regs2[2] & 0xFF;
 470       }
 471
 472 #if defined(PIPE_OS_LINUX) || defined(PIPE_OS_FREEBSD) || defined(PIPE_OS_NETBSD) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_OPENBSD)
 473       if (util_cpu_caps.has_sse)
 474          check_os_katmai_support();
 475
 476       if (!util_cpu_caps.has_sse) {
 477          util_cpu_caps.has_sse2 = 0;
 478          util_cpu_caps.has_sse3 = 0;
 479          util_cpu_caps.has_ssse3 = 0;
 480       }
 481 #else
 482       util_cpu_caps.has_sse = 0;
 483       util_cpu_caps.has_sse2 = 0;
 484       util_cpu_caps.has_sse3 = 0;
 485       util_cpu_caps.has_ssse3 = 0;
 486 #endif
 487    }
 488 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
 489
 490 #if defined(PIPE_ARCH_PPC)
 491    check_os_altivec_support();
 492 #endif /* PIPE_ARCH_PPC */
 493
 494 #ifdef DEBUG
 495    debug_printf("util_cpu_caps.arch = %i\n", util_cpu_caps.arch);
 496    debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps.nr_cpus);
 497
 498    debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps.x86_cpu_type);
 499    debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps.cacheline);
 500
 501    debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps.has_tsc);
 502    debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps.has_mmx);
 503    debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps.has_mmx2);
 504    debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps.has_sse);
 505    debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps.has_sse2);
 506    debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps.has_sse3);
 507    debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps.has_ssse3);
 508    debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps.has_sse4_1);
 509    debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps.has_3dnow);
 510    debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps.has_3dnow_ext);
 511    debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps.has_altivec);
 512 #endif
 513
 514    util_cpu_detect_initialized = TRUE;
 515 }