src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c

   1 /*
   2  * Copyright (c) 2012-2019 Etnaviv Project
   3  * Copyright (c) 2019 Zodiac Inflight Innovations
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Jonathan Marek <jonathan@marek.ca>
  26  *    Wladimir J. van der Laan <laanwj@gmail.com>
  27  */
  28
  29 #include "etnaviv_compiler.h"
  30 #include "etnaviv_asm.h"
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_disasm.h"
  34 #include "etnaviv_nir.h"
  35 #include "etnaviv_uniforms.h"
  36 #include "etnaviv_util.h"
  37
  38 #include <math.h>
  39 #include "util/u_memory.h"
  40 #include "util/register_allocate.h"
  41 #include "compiler/nir/nir_builder.h"
  42 #include "compiler/nir/nir_worklist.h"
  43
  44 #include "tgsi/tgsi_strings.h"
  45 #include "util/u_half.h"
  46
  47 struct etna_compile {
  48    nir_shader *nir;
  49 #define is_fs(c) ((c)->nir->info.stage == MESA_SHADER_FRAGMENT)
  50    const struct etna_specs *specs;
  51    struct etna_shader_variant *variant;
  52
  53    /* block # to instr index */
  54    unsigned *block_ptr;
  55
  56    /* Code generation */
  57    int inst_ptr; /* current instruction pointer */
  58    struct etna_inst code[ETNA_MAX_INSTRUCTIONS * ETNA_INST_SIZE];
  59
  60    /* constants */
  61    uint64_t consts[ETNA_MAX_IMM];
  62
  63    /* There was an error during compilation */
  64    bool error;
  65 };
  66
  67
  68
  69 static bool
  70 etna_alu_to_scalar_filter_cb(const nir_instr *instr, const void *data)
  71 {
  72    const struct etna_specs *specs = data;
  73
  74    if (instr->type != nir_instr_type_alu)
  75       return false;
  76
  77    nir_alu_instr *alu = nir_instr_as_alu(instr);
  78    switch (alu->op) {
  79    case nir_op_frsq:
  80    case nir_op_frcp:
  81    case nir_op_flog2:
  82    case nir_op_fexp2:
  83    case nir_op_fsqrt:
  84    case nir_op_fcos:
  85    case nir_op_fsin:
  86    case nir_op_fdiv:
  87    case nir_op_imul:
  88       return true;
  89    /* TODO: can do better than alu_to_scalar for vector compares */
  90    case nir_op_b32all_fequal2:
  91    case nir_op_b32all_fequal3:
  92    case nir_op_b32all_fequal4:
  93    case nir_op_b32any_fnequal2:
  94    case nir_op_b32any_fnequal3:
  95    case nir_op_b32any_fnequal4:
  96    case nir_op_b32all_iequal2:
  97    case nir_op_b32all_iequal3:
  98    case nir_op_b32all_iequal4:
  99    case nir_op_b32any_inequal2:
 100    case nir_op_b32any_inequal3:
 101    case nir_op_b32any_inequal4:
 102       return true;
 103    case nir_op_fdot2:
 104       if (!specs->has_halti2_instructions)
 105          return true;
 106       break;
 107    default:
 108       break;
 109    }
 110
 111    return false;
 112 }
 113
 114 static void
 115 emit_inst(struct etna_compile *c, struct etna_inst *inst)
 116 {
 117    c->code[c->inst_ptr++] = *inst;
 118 }
 119
 120 /* to map nir srcs should to etna_inst srcs */
 121 enum {
 122    SRC_0_1_2 = (0 << 0) | (1 << 2) | (2 << 4),
 123    SRC_0_1_X = (0 << 0) | (1 << 2) | (3 << 4),
 124    SRC_0_X_X = (0 << 0) | (3 << 2) | (3 << 4),
 125    SRC_0_X_1 = (0 << 0) | (3 << 2) | (1 << 4),
 126    SRC_0_1_0 = (0 << 0) | (1 << 2) | (0 << 4),
 127    SRC_X_X_0 = (3 << 0) | (3 << 2) | (0 << 4),
 128    SRC_0_X_0 = (0 << 0) | (3 << 2) | (0 << 4),
 129 };
 130
 131 /* info to translate a nir op to etna_inst */
 132 struct etna_op_info {
 133    uint8_t opcode; /* INST_OPCODE_ */
 134    uint8_t src; /* SRC_ enum  */
 135    uint8_t cond; /* INST_CONDITION_ */
 136    uint8_t type; /* INST_TYPE_ */
 137 };
 138
 139 static const struct etna_op_info etna_ops[] = {
 140    [0 ... nir_num_opcodes - 1] = {0xff},
 141 #undef TRUE
 142 #undef FALSE
 143 #define OPCT(nir, op, src, cond, type) [nir_op_##nir] = { \
 144    INST_OPCODE_##op, \
 145    SRC_##src, \
 146    INST_CONDITION_##cond, \
 147    INST_TYPE_##type \
 148 }
 149 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32)
 150 #define IOPC(nir, op, src, cond) OPCT(nir, op, src, cond, S32)
 151 #define UOPC(nir, op, src, cond) OPCT(nir, op, src, cond, U32)
 152 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
 153 #define IOP(nir, op, src) IOPC(nir, op, src, TRUE)
 154 #define UOP(nir, op, src) UOPC(nir, op, src, TRUE)
 155    OP(mov, MOV, X_X_0), OP(fneg, MOV, X_X_0), OP(fabs, MOV, X_X_0), OP(fsat, MOV, X_X_0),
 156    OP(fmul, MUL, 0_1_X), OP(fadd, ADD, 0_X_1), OP(ffma, MAD, 0_1_2),
 157    OP(fdot2, DP2, 0_1_X), OP(fdot3, DP3, 0_1_X), OP(fdot4, DP4, 0_1_X),
 158    OPC(fmin, SELECT, 0_1_0, GT), OPC(fmax, SELECT, 0_1_0, LT),
 159    OP(ffract, FRC, X_X_0), OP(frcp, RCP, X_X_0), OP(frsq, RSQ, X_X_0),
 160    OP(fsqrt, SQRT, X_X_0), OP(fsin, SIN, X_X_0), OP(fcos, COS, X_X_0),
 161    OP(fsign, SIGN, X_X_0), OP(ffloor, FLOOR, X_X_0), OP(fceil, CEIL, X_X_0),
 162    OP(flog2, LOG, X_X_0), OP(fexp2, EXP, X_X_0),
 163    OPC(seq, SET, 0_1_X, EQ), OPC(sne, SET, 0_1_X, NE), OPC(sge, SET, 0_1_X, GE), OPC(slt, SET, 0_1_X, LT),
 164    OPC(fcsel, SELECT, 0_1_2, NZ),
 165    OP(fdiv, DIV, 0_1_X),
 166    OP(fddx, DSX, 0_X_0), OP(fddy, DSY, 0_X_0),
 167
 168    /* type convert */
 169    IOP(i2f32, I2F, 0_X_X),
 170    UOP(u2f32, I2F, 0_X_X),
 171    IOP(f2i32, F2I, 0_X_X),
 172    UOP(f2u32, F2I, 0_X_X),
 173    UOP(b2f32, AND, 0_X_X), /* AND with fui(1.0f) */
 174    UOP(b2i32, AND, 0_X_X), /* AND with 1 */
 175    OPC(f2b32, CMP, 0_X_X, NE), /* != 0.0 */
 176    UOPC(i2b32, CMP, 0_X_X, NE), /* != 0 */
 177
 178    /* arithmetic */
 179    IOP(iadd, ADD, 0_X_1),
 180    IOP(imul, IMULLO0, 0_1_X),
 181    /* IOP(imad, IMADLO0, 0_1_2), */
 182    IOP(ineg, ADD, X_X_0), /* ADD 0, -x */
 183    IOP(iabs, IABS, X_X_0),
 184    IOP(isign, SIGN, X_X_0),
 185    IOPC(imin, SELECT, 0_1_0, GT),
 186    IOPC(imax, SELECT, 0_1_0, LT),
 187    UOPC(umin, SELECT, 0_1_0, GT),
 188    UOPC(umax, SELECT, 0_1_0, LT),
 189
 190    /* select */
 191    UOPC(b32csel, SELECT, 0_1_2, NZ),
 192
 193    /* compare with int result */
 194     OPC(feq32, CMP, 0_1_X, EQ),
 195     OPC(fne32, CMP, 0_1_X, NE),
 196     OPC(fge32, CMP, 0_1_X, GE),
 197     OPC(flt32, CMP, 0_1_X, LT),
 198    IOPC(ieq32, CMP, 0_1_X, EQ),
 199    IOPC(ine32, CMP, 0_1_X, NE),
 200    IOPC(ige32, CMP, 0_1_X, GE),
 201    IOPC(ilt32, CMP, 0_1_X, LT),
 202    UOPC(uge32, CMP, 0_1_X, GE),
 203    UOPC(ult32, CMP, 0_1_X, LT),
 204
 205    /* bit ops */
 206    IOP(ior,  OR,  0_X_1),
 207    IOP(iand, AND, 0_X_1),
 208    IOP(ixor, XOR, 0_X_1),
 209    IOP(inot, NOT, X_X_0),
 210    IOP(ishl, LSHIFT, 0_X_1),
 211    IOP(ishr, RSHIFT, 0_X_1),
 212    UOP(ushr, RSHIFT, 0_X_1),
 213 };
 214
 215 static void
 216 etna_emit_block_start(struct etna_compile *c, unsigned block)
 217 {
 218    c->block_ptr[block] = c->inst_ptr;
 219 }
 220
 221 static void
 222 etna_emit_alu(struct etna_compile *c, nir_op op, struct etna_inst_dst dst,
 223               struct etna_inst_src src[3], bool saturate)
 224 {
 225    struct etna_op_info ei = etna_ops[op];
 226    unsigned swiz_scalar = INST_SWIZ_BROADCAST(ffs(dst.write_mask) - 1);
 227
 228    assert(ei.opcode != 0xff);
 229
 230    struct etna_inst inst = {
 231       .opcode = ei.opcode,
 232       .type = ei.type,
 233       .cond = ei.cond,
 234       .dst = dst,
 235       .sat = saturate,
 236    };
 237
 238    switch (op) {
 239    case nir_op_fdiv:
 240    case nir_op_flog2:
 241    case nir_op_fsin:
 242    case nir_op_fcos:
 243       if (c->specs->has_new_transcendentals)
 244          inst.tex.amode = 1;
 245       /* fall through */
 246    case nir_op_frsq:
 247    case nir_op_frcp:
 248    case nir_op_fexp2:
 249    case nir_op_fsqrt:
 250    case nir_op_imul:
 251       /* scalar instructions we want src to be in x component */
 252       src[0].swiz = inst_swiz_compose(src[0].swiz, swiz_scalar);
 253       src[1].swiz = inst_swiz_compose(src[1].swiz, swiz_scalar);
 254       break;
 255    /* deal with instructions which don't have 1:1 mapping */
 256    case nir_op_b2f32:
 257       inst.src[2] = etna_immediate_float(1.0f);
 258       break;
 259    case nir_op_b2i32:
 260       inst.src[2] = etna_immediate_int(1);
 261       break;
 262    case nir_op_f2b32:
 263       inst.src[1] = etna_immediate_float(0.0f);
 264       break;
 265    case nir_op_i2b32:
 266       inst.src[1] = etna_immediate_int(0);
 267       break;
 268    case nir_op_ineg:
 269       inst.src[0] = etna_immediate_int(0);
 270       src[0].neg = 1;
 271       break;
 272    default:
 273       break;
 274    }
 275
 276    /* set the "true" value for CMP instructions */
 277    if (inst.opcode == INST_OPCODE_CMP)
 278       inst.src[2] = etna_immediate_int(-1);
 279
 280    for (unsigned j = 0; j < 3; j++) {
 281       unsigned i = ((ei.src >> j*2) & 3);
 282       if (i < 3)
 283          inst.src[j] = src[i];
 284    }
 285
 286    emit_inst(c, &inst);
 287 }
 288
 289 static void
 290 etna_emit_tex(struct etna_compile *c, nir_texop op, unsigned texid, unsigned dst_swiz,
 291               struct etna_inst_dst dst, struct etna_inst_src coord,
 292               struct etna_inst_src lod_bias, struct etna_inst_src compare)
 293 {
 294    struct etna_inst inst = {
 295       .dst = dst,
 296       .tex.id = texid + (is_fs(c) ? 0 : c->specs->vertex_sampler_offset),
 297       .tex.swiz = dst_swiz,
 298       .src[0] = coord,
 299    };
 300
 301    if (lod_bias.use)
 302       inst.src[1] = lod_bias;
 303
 304    if (compare.use)
 305       inst.src[2] = compare;
 306
 307    switch (op) {
 308    case nir_texop_tex: inst.opcode = INST_OPCODE_TEXLD; break;
 309    case nir_texop_txb: inst.opcode = INST_OPCODE_TEXLDB; break;
 310    case nir_texop_txl: inst.opcode = INST_OPCODE_TEXLDL; break;
 311    default:
 312       assert(0);
 313    }
 314
 315    emit_inst(c, &inst);
 316 }
 317
 318 static void
 319 etna_emit_jump(struct etna_compile *c, unsigned block, struct etna_inst_src condition)
 320 {
 321    if (!condition.use) {
 322       emit_inst(c, &(struct etna_inst) {.opcode = INST_OPCODE_BRANCH, .imm = block });
 323       return;
 324    }
 325
 326    struct etna_inst inst = {
 327       .opcode = INST_OPCODE_BRANCH,
 328       .cond = INST_CONDITION_NOT,
 329       .type = INST_TYPE_U32,
 330       .src[0] = condition,
 331       .imm = block,
 332    };
 333    inst.src[0].swiz = INST_SWIZ_BROADCAST(inst.src[0].swiz & 3);
 334    emit_inst(c, &inst);
 335 }
 336
 337 static void
 338 etna_emit_discard(struct etna_compile *c, struct etna_inst_src condition)
 339 {
 340    if (!condition.use) {
 341       emit_inst(c, &(struct etna_inst) { .opcode = INST_OPCODE_TEXKILL });
 342       return;
 343    }
 344
 345    struct etna_inst inst = {
 346       .opcode = INST_OPCODE_TEXKILL,
 347       .cond = INST_CONDITION_NZ,
 348       .type = (c->specs->halti < 2) ? INST_TYPE_F32 : INST_TYPE_U32,
 349       .src[0] = condition,
 350    };
 351    inst.src[0].swiz = INST_SWIZ_BROADCAST(inst.src[0].swiz & 3);
 352    emit_inst(c, &inst);
 353 }
 354
 355 static void
 356 etna_emit_output(struct etna_compile *c, nir_variable *var, struct etna_inst_src src)
 357 {
 358    struct etna_shader_io_file *sf = &c->variant->outfile;
 359
 360    if (is_fs(c)) {
 361       switch (var->data.location) {
 362       case FRAG_RESULT_COLOR:
 363       case FRAG_RESULT_DATA0: /* DATA0 is used by gallium shaders for color */
 364          c->variant->ps_color_out_reg = src.reg;
 365          break;
 366       case FRAG_RESULT_DEPTH:
 367          c->variant->ps_depth_out_reg = src.reg;
 368          break;
 369       default:
 370          unreachable("Unsupported fs output");
 371       }
 372       return;
 373    }
 374
 375    switch (var->data.location) {
 376    case VARYING_SLOT_POS:
 377       c->variant->vs_pos_out_reg = src.reg;
 378       break;
 379    case VARYING_SLOT_PSIZ:
 380       c->variant->vs_pointsize_out_reg = src.reg;
 381       break;
 382    default:
 383       sf->reg[sf->num_reg].reg = src.reg;
 384       sf->reg[sf->num_reg].slot = var->data.location;
 385       sf->reg[sf->num_reg].num_components = glsl_get_components(var->type);
 386       sf->num_reg++;
 387       break;
 388    }
 389 }
 390
 391 #define OPT(nir, pass, ...) ({                             \
 392    bool this_progress = false;                             \
 393    NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__);      \
 394    this_progress;                                          \
 395 })
 396
 397 static void
 398 etna_optimize_loop(nir_shader *s)
 399 {
 400    bool progress;
 401    do {
 402       progress = false;
 403
 404       NIR_PASS_V(s, nir_lower_vars_to_ssa);
 405       progress |= OPT(s, nir_opt_copy_prop_vars);
 406       progress |= OPT(s, nir_copy_prop);
 407       progress |= OPT(s, nir_opt_dce);
 408       progress |= OPT(s, nir_opt_cse);
 409       progress |= OPT(s, nir_opt_peephole_select, 16, true, true);
 410       progress |= OPT(s, nir_opt_intrinsics);
 411       progress |= OPT(s, nir_opt_algebraic);
 412       progress |= OPT(s, nir_opt_constant_folding);
 413       progress |= OPT(s, nir_opt_dead_cf);
 414       if (OPT(s, nir_opt_trivial_continues)) {
 415          progress = true;
 416          /* If nir_opt_trivial_continues makes progress, then we need to clean
 417           * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
 418           * to make progress.
 419           */
 420          OPT(s, nir_copy_prop);
 421          OPT(s, nir_opt_dce);
 422       }
 423       progress |= OPT(s, nir_opt_loop_unroll, nir_var_all);
 424       progress |= OPT(s, nir_opt_if, false);
 425       progress |= OPT(s, nir_opt_remove_phis);
 426       progress |= OPT(s, nir_opt_undef);
 427    }
 428    while (progress);
 429 }
 430
 431 static int
 432 etna_glsl_type_size(const struct glsl_type *type, bool bindless)
 433 {
 434    return glsl_count_attribute_slots(type, false);
 435 }
 436
 437 static void
 438 copy_uniform_state_to_shader(struct etna_shader_variant *sobj, uint64_t *consts, unsigned count)
 439 {
 440    struct etna_shader_uniform_info *uinfo = &sobj->uniforms;
 441
 442    uinfo->imm_count = count * 4;
 443    uinfo->imm_data = MALLOC(uinfo->imm_count * sizeof(*uinfo->imm_data));
 444    uinfo->imm_contents = MALLOC(uinfo->imm_count * sizeof(*uinfo->imm_contents));
 445
 446    for (unsigned i = 0; i < uinfo->imm_count; i++) {
 447       uinfo->imm_data[i] = consts[i];
 448       uinfo->imm_contents[i] = consts[i] >> 32;
 449    }
 450
 451    etna_set_shader_uniforms_dirty_flags(sobj);
 452 }
 453
 454 #include "etnaviv_compiler_nir_emit.h"
 455
 456 static bool
 457 etna_compile_check_limits(struct etna_shader_variant *v)
 458 {
 459    const struct etna_specs *specs = v->shader->specs;
 460    int max_uniforms = (v->stage == MESA_SHADER_VERTEX)
 461                          ? specs->max_vs_uniforms
 462                          : specs->max_ps_uniforms;
 463
 464    if (!specs->has_icache && v->needs_icache) {
 465       DBG("Number of instructions (%d) exceeds maximum %d", v->code_size / 4,
 466           specs->max_instructions);
 467       return false;
 468    }
 469
 470    if (v->num_temps > specs->max_registers) {
 471       DBG("Number of registers (%d) exceeds maximum %d", v->num_temps,
 472           specs->max_registers);
 473       return false;
 474    }
 475
 476    if (v->uniforms.imm_count / 4 > max_uniforms) {
 477       DBG("Number of uniforms (%d) exceeds maximum %d",
 478           v->uniforms.imm_count / 4, max_uniforms);
 479       return false;
 480    }
 481
 482    return true;
 483 }
 484
 485 static void
 486 fill_vs_mystery(struct etna_shader_variant *v)
 487 {
 488    const struct etna_specs *specs = v->shader->specs;
 489
 490    v->input_count_unk8 = DIV_ROUND_UP(v->infile.num_reg + 4, 16); /* XXX what is this */
 491
 492    /* fill in "mystery meat" load balancing value. This value determines how
 493     * work is scheduled between VS and PS
 494     * in the unified shader architecture. More precisely, it is determined from
 495     * the number of VS outputs, as well as chip-specific
 496     * vertex output buffer size, vertex cache size, and the number of shader
 497     * cores.
 498     *
 499     * XXX this is a conservative estimate, the "optimal" value is only known for
 500     * sure at link time because some
 501     * outputs may be unused and thus unmapped. Then again, in the general use
 502     * case with GLSL the vertex and fragment
 503     * shaders are linked already before submitting to Gallium, thus all outputs
 504     * are used.
 505     *
 506     * note: TGSI compiler counts all outputs (including position and pointsize), here
 507     * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
 508     * TODO: might have a problem that we don't count pointsize when it is used
 509     */
 510
 511    int half_out = v->outfile.num_reg / 2 + 1;
 512    assert(half_out);
 513
 514    uint32_t b = ((20480 / (specs->vertex_output_buffer_size -
 515                            2 * half_out * specs->vertex_cache_size)) +
 516                  9) /
 517                 10;
 518    uint32_t a = (b + 256 / (specs->shader_core_count * half_out)) / 2;
 519    v->vs_load_balancing = VIVS_VS_LOAD_BALANCING_A(MIN2(a, 255)) |
 520                              VIVS_VS_LOAD_BALANCING_B(MIN2(b, 255)) |
 521                              VIVS_VS_LOAD_BALANCING_C(0x3f) |
 522                              VIVS_VS_LOAD_BALANCING_D(0x0f);
 523 }
 524
 525 bool
 526 etna_compile_shader_nir(struct etna_shader_variant *v)
 527 {
 528    if (unlikely(!v))
 529       return false;
 530
 531    struct etna_compile *c = CALLOC_STRUCT(etna_compile);
 532    if (!c)
 533       return false;
 534
 535    c->variant = v;
 536    c->specs = v->shader->specs;
 537    c->nir = nir_shader_clone(NULL, v->shader->nir);
 538
 539    nir_shader *s = c->nir;
 540    const struct etna_specs *specs = c->specs;
 541
 542    v->stage = s->info.stage;
 543    v->num_loops = 0; /* TODO */
 544    v->vs_id_in_reg = -1;
 545    v->vs_pos_out_reg = -1;
 546    v->vs_pointsize_out_reg = -1;
 547    v->ps_color_out_reg = 0; /* 0 for shader that doesn't write fragcolor.. */
 548    v->ps_depth_out_reg = -1;
 549
 550    /* setup input linking */
 551    struct etna_shader_io_file *sf = &v->infile;
 552    if (s->info.stage == MESA_SHADER_VERTEX) {
 553       nir_foreach_variable(var, &s->inputs) {
 554          unsigned idx = var->data.driver_location;
 555          sf->reg[idx].reg = idx;
 556          sf->reg[idx].slot = var->data.location;
 557          sf->reg[idx].num_components = glsl_get_components(var->type);
 558          sf->num_reg = MAX2(sf->num_reg, idx+1);
 559       }
 560    } else {
 561       unsigned count = 0;
 562       nir_foreach_variable(var, &s->inputs) {
 563          unsigned idx = var->data.driver_location;
 564          sf->reg[idx].reg = idx + 1;
 565          sf->reg[idx].slot = var->data.location;
 566          sf->reg[idx].num_components = glsl_get_components(var->type);
 567          sf->num_reg = MAX2(sf->num_reg, idx+1);
 568          count++;
 569       }
 570       assert(sf->num_reg == count);
 571    }
 572
 573    NIR_PASS_V(s, nir_lower_io, ~nir_var_shader_out, etna_glsl_type_size,
 574             (nir_lower_io_options)0);
 575
 576    NIR_PASS_V(s, nir_lower_regs_to_ssa);
 577    NIR_PASS_V(s, nir_lower_vars_to_ssa);
 578    NIR_PASS_V(s, nir_lower_indirect_derefs, nir_var_all);
 579    NIR_PASS_V(s, nir_lower_tex, &(struct nir_lower_tex_options) { .lower_txp = ~0u });
 580    NIR_PASS_V(s, nir_lower_alu_to_scalar, etna_alu_to_scalar_filter_cb, specs);
 581
 582    etna_optimize_loop(s);
 583
 584    NIR_PASS_V(s, etna_lower_io, v);
 585
 586    if (v->shader->specs->vs_need_z_div)
 587       NIR_PASS_V(s, nir_lower_clip_halfz);
 588
 589    /* lower pre-halti2 to float (halti0 has integers, but only scalar..) */
 590    if (c->specs->halti < 2) {
 591       /* use opt_algebraic between int_to_float and boot_to_float because
 592        * int_to_float emits ftrunc, and ftrunc lowering generates bool ops
 593        */
 594       NIR_PASS_V(s, nir_lower_int_to_float);
 595       NIR_PASS_V(s, nir_opt_algebraic);
 596       NIR_PASS_V(s, nir_lower_bool_to_float);
 597    } else {
 598       NIR_PASS_V(s, nir_lower_idiv, nir_lower_idiv_fast);
 599       NIR_PASS_V(s, nir_lower_bool_to_int32);
 600    }
 601
 602    etna_optimize_loop(s);
 603
 604    if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS))
 605       nir_print_shader(s, stdout);
 606
 607    while( OPT(s, nir_opt_vectorize) );
 608    NIR_PASS_V(s, nir_lower_alu_to_scalar, etna_alu_to_scalar_filter_cb, specs);
 609
 610    NIR_PASS_V(s, nir_remove_dead_variables, nir_var_function_temp, NULL);
 611    NIR_PASS_V(s, nir_opt_algebraic_late);
 612
 613    NIR_PASS_V(s, nir_move_vec_src_uses_to_dest);
 614    NIR_PASS_V(s, nir_copy_prop);
 615    /* only HW supported integer source mod is ineg for iadd instruction (?) */
 616    NIR_PASS_V(s, nir_lower_to_source_mods, ~nir_lower_int_source_mods);
 617    /* need copy prop after uses_to_dest, and before src mods: see
 618     * dEQP-GLES2.functional.shaders.random.all_features.fragment.95
 619     */
 620
 621    NIR_PASS_V(s, nir_opt_dce);
 622
 623    NIR_PASS_V(s, etna_lower_alu, c->specs->has_new_transcendentals);
 624
 625    if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS))
 626       nir_print_shader(s, stdout);
 627
 628    unsigned block_ptr[nir_shader_get_entrypoint(s)->num_blocks];
 629    c->block_ptr = block_ptr;
 630
 631    unsigned num_consts;
 632    ASSERTED bool ok = emit_shader(c, &v->num_temps, &num_consts);
 633    assert(ok);
 634
 635    /* empty shader, emit NOP */
 636    if (!c->inst_ptr)
 637       emit_inst(c, &(struct etna_inst) { .opcode = INST_OPCODE_NOP });
 638
 639    /* assemble instructions, fixing up labels */
 640    uint32_t *code = MALLOC(c->inst_ptr * 16);
 641    for (unsigned i = 0; i < c->inst_ptr; i++) {
 642       struct etna_inst *inst = &c->code[i];
 643       if (inst->opcode == INST_OPCODE_BRANCH)
 644          inst->imm = block_ptr[inst->imm];
 645
 646       inst->halti5 = specs->halti >= 5;
 647       etna_assemble(&code[i * 4], inst);
 648    }
 649
 650    v->code_size = c->inst_ptr * 4;
 651    v->code = code;
 652    v->needs_icache = c->inst_ptr > specs->max_instructions;
 653
 654    copy_uniform_state_to_shader(v, c->consts, num_consts);
 655
 656    if (s->info.stage == MESA_SHADER_FRAGMENT) {
 657       v->input_count_unk8 = 31; /* XXX what is this */
 658       assert(v->ps_depth_out_reg <= 0);
 659    } else {
 660       fill_vs_mystery(v);
 661    }
 662
 663    bool result = etna_compile_check_limits(v);
 664    ralloc_free(c->nir);
 665    FREE(c);
 666    return result;
 667 }
 668
 669 void
 670 etna_destroy_shader_nir(struct etna_shader_variant *shader)
 671 {
 672    assert(shader);
 673
 674    FREE(shader->code);
 675    FREE(shader->uniforms.imm_data);
 676    FREE(shader->uniforms.imm_contents);
 677    FREE(shader);
 678 }
 679
 680 extern const char *tgsi_swizzle_names[];
 681 void
 682 etna_dump_shader_nir(const struct etna_shader_variant *shader)
 683 {
 684    if (shader->stage == MESA_SHADER_VERTEX)
 685       printf("VERT\n");
 686    else
 687       printf("FRAG\n");
 688
 689    etna_disasm(shader->code, shader->code_size, PRINT_RAW);
 690
 691    printf("num loops: %i\n", shader->num_loops);
 692    printf("num temps: %i\n", shader->num_temps);
 693    printf("immediates:\n");
 694    for (int idx = 0; idx < shader->uniforms.imm_count; ++idx) {
 695       printf(" [%i].%s = %f (0x%08x) (%d)\n",
 696              idx / 4,
 697              tgsi_swizzle_names[idx % 4],
 698              *((float *)&shader->uniforms.imm_data[idx]),
 699              shader->uniforms.imm_data[idx],
 700              shader->uniforms.imm_contents[idx]);
 701    }
 702    printf("inputs:\n");
 703    for (int idx = 0; idx < shader->infile.num_reg; ++idx) {
 704       printf(" [%i] name=%s comps=%i\n", shader->infile.reg[idx].reg,
 705                (shader->stage == MESA_SHADER_VERTEX) ?
 706                gl_vert_attrib_name(shader->infile.reg[idx].slot) :
 707                gl_varying_slot_name(shader->infile.reg[idx].slot),
 708                shader->infile.reg[idx].num_components);
 709    }
 710    printf("outputs:\n");
 711    for (int idx = 0; idx < shader->outfile.num_reg; ++idx) {
 712       printf(" [%i] name=%s comps=%i\n", shader->outfile.reg[idx].reg,
 713                (shader->stage == MESA_SHADER_VERTEX) ?
 714                gl_varying_slot_name(shader->outfile.reg[idx].slot) :
 715                gl_frag_result_name(shader->outfile.reg[idx].slot),
 716                shader->outfile.reg[idx].num_components);
 717    }
 718    printf("special:\n");
 719    if (shader->stage == MESA_SHADER_VERTEX) {
 720       printf("  vs_pos_out_reg=%i\n", shader->vs_pos_out_reg);
 721       printf("  vs_pointsize_out_reg=%i\n", shader->vs_pointsize_out_reg);
 722       printf("  vs_load_balancing=0x%08x\n", shader->vs_load_balancing);
 723    } else {
 724       printf("  ps_color_out_reg=%i\n", shader->ps_color_out_reg);
 725       printf("  ps_depth_out_reg=%i\n", shader->ps_depth_out_reg);
 726    }
 727    printf("  input_count_unk8=0x%08x\n", shader->input_count_unk8);
 728 }
 729
 730 static const struct etna_shader_inout *
 731 etna_shader_vs_lookup(const struct etna_shader_variant *sobj,
 732                       const struct etna_shader_inout *in)
 733 {
 734    for (int i = 0; i < sobj->outfile.num_reg; i++)
 735       if (sobj->outfile.reg[i].slot == in->slot)
 736          return &sobj->outfile.reg[i];
 737
 738    return NULL;
 739 }
 740
 741 bool
 742 etna_link_shader_nir(struct etna_shader_link_info *info,
 743                      const struct etna_shader_variant *vs,
 744                      const struct etna_shader_variant *fs)
 745 {
 746    int comp_ofs = 0;
 747    /* For each fragment input we need to find the associated vertex shader
 748     * output, which can be found by matching on semantic name and index. A
 749     * binary search could be used because the vs outputs are sorted by their
 750     * semantic index and grouped by semantic type by fill_in_vs_outputs.
 751     */
 752    assert(fs->infile.num_reg < ETNA_NUM_INPUTS);
 753    info->pcoord_varying_comp_ofs = -1;
 754
 755    for (int idx = 0; idx < fs->infile.num_reg; ++idx) {
 756       const struct etna_shader_inout *fsio = &fs->infile.reg[idx];
 757       const struct etna_shader_inout *vsio = etna_shader_vs_lookup(vs, fsio);
 758       struct etna_varying *varying;
 759       bool interpolate_always = true;
 760
 761       assert(fsio->reg > 0 && fsio->reg <= ARRAY_SIZE(info->varyings));
 762
 763       if (fsio->reg > info->num_varyings)
 764          info->num_varyings = fsio->reg;
 765
 766       varying = &info->varyings[fsio->reg - 1];
 767       varying->num_components = fsio->num_components;
 768
 769       if (!interpolate_always) /* colors affected by flat shading */
 770          varying->pa_attributes = 0x200;
 771       else /* texture coord or other bypasses flat shading */
 772          varying->pa_attributes = 0x2f1;
 773
 774       varying->use[0] = VARYING_COMPONENT_USE_UNUSED;
 775       varying->use[1] = VARYING_COMPONENT_USE_UNUSED;
 776       varying->use[2] = VARYING_COMPONENT_USE_UNUSED;
 777       varying->use[3] = VARYING_COMPONENT_USE_UNUSED;
 778
 779       /* point coord is an input to the PS without matching VS output,
 780        * so it gets a varying slot without being assigned a VS register.
 781        */
 782       if (fsio->slot == VARYING_SLOT_PNTC) {
 783          varying->use[0] = VARYING_COMPONENT_USE_POINTCOORD_X;
 784          varying->use[1] = VARYING_COMPONENT_USE_POINTCOORD_Y;
 785
 786          info->pcoord_varying_comp_ofs = comp_ofs;
 787       } else {
 788          if (vsio == NULL) { /* not found -- link error */
 789             BUG("Semantic value not found in vertex shader outputs\n");
 790             return true;
 791          }
 792          varying->reg = vsio->reg;
 793       }
 794
 795       comp_ofs += varying->num_components;
 796    }
 797
 798    assert(info->num_varyings == fs->infile.num_reg);
 799
 800    return false;
 801 }