2 * Copyright (c) 2012-2019 Etnaviv Project
3 * Copyright (c) 2019 Zodiac Inflight Innovations
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Jonathan Marek <jonathan@marek.ca>
26 * Wladimir J. van der Laan <laanwj@gmail.com>
29 #include "etnaviv_compiler.h"
30 #include "etnaviv_asm.h"
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_disasm.h"
34 #include "etnaviv_uniforms.h"
35 #include "etnaviv_util.h"
38 #include "util/u_memory.h"
39 #include "util/register_allocate.h"
40 #include "compiler/nir/nir_builder.h"
41 #include "compiler/nir/nir_worklist.h"
43 #include "tgsi/tgsi_strings.h"
44 #include "util/u_half.h"
48 #define is_fs(c) ((c)->nir->info.stage == MESA_SHADER_FRAGMENT)
49 const struct etna_specs
*specs
;
50 struct etna_shader_variant
*variant
;
52 /* register assigned to each output, indexed by driver_location */
53 unsigned output_reg
[ETNA_NUM_INPUTS
];
55 /* block # to instr index */
59 int inst_ptr
; /* current instruction pointer */
60 struct etna_inst code
[ETNA_MAX_INSTRUCTIONS
* ETNA_INST_SIZE
];
62 /* There was an error during compilation */
66 #define compile_error(ctx, args...) ({ \
72 /* io related lowering
73 * run after lower_int_to_float because it adds i2f/f2i ops
76 etna_lower_io(nir_shader
*shader
, struct etna_shader_variant
*v
)
78 bool rb_swap
= shader
->info
.stage
== MESA_SHADER_FRAGMENT
&& v
->key
.frag_rb_swap
;
80 unsigned color_location
= 0;
81 nir_foreach_variable(var
, &shader
->outputs
) {
82 switch (var
->data
.location
) {
83 case FRAG_RESULT_COLOR
:
84 case FRAG_RESULT_DATA0
:
85 color_location
= var
->data
.driver_location
;
90 nir_foreach_function(function
, shader
) {
92 nir_builder_init(&b
, function
->impl
);
94 nir_foreach_block(block
, function
->impl
) {
95 nir_foreach_instr_safe(instr
, block
) {
96 if (instr
->type
== nir_instr_type_intrinsic
) {
97 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
99 switch (intr
->intrinsic
) {
100 case nir_intrinsic_load_front_face
: {
101 /* front face inverted (run after int_to_float, so invert as float) */
102 b
.cursor
= nir_after_instr(instr
);
104 nir_ssa_def
*ssa
= nir_seq(&b
, &intr
->dest
.ssa
, nir_imm_float(&b
, 0.0));
105 nir_ssa_def_rewrite_uses_after(&intr
->dest
.ssa
,
106 nir_src_for_ssa(ssa
),
109 case nir_intrinsic_store_output
: {
110 if (!rb_swap
|| nir_intrinsic_base(intr
) != color_location
)
112 b
.cursor
= nir_before_instr(instr
);
114 nir_ssa_def
*ssa
= nir_mov(&b
, intr
->src
[0].ssa
);
115 nir_alu_instr
*alu
= nir_instr_as_alu(ssa
->parent_instr
);
116 alu
->src
[0].swizzle
[0] = 2;
117 alu
->src
[0].swizzle
[2] = 0;
118 nir_instr_rewrite_src(instr
, &intr
->src
[0], nir_src_for_ssa(ssa
));
120 case nir_intrinsic_load_instance_id
: {
121 b
.cursor
= nir_after_instr(instr
);
122 nir_ssa_def
*ssa
= nir_i2f32(&b
, &intr
->dest
.ssa
);
123 nir_ssa_def_rewrite_uses_after(&intr
->dest
.ssa
,
124 nir_src_for_ssa(ssa
),
127 case nir_intrinsic_load_uniform
: {
128 /* multiply by 16 and convert to int */
129 b
.cursor
= nir_before_instr(instr
);
130 nir_ssa_def
*ssa
= nir_f2u32(&b
, nir_fmul(&b
, intr
->src
[0].ssa
,
131 nir_imm_float(&b
, 16.0f
)));
132 nir_instr_rewrite_src(instr
, &intr
->src
[0], nir_src_for_ssa(ssa
));
139 if (instr
->type
!= nir_instr_type_tex
)
142 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
143 nir_src
*coord
= NULL
;
144 nir_src
*lod_bias
= NULL
;
145 unsigned lod_bias_idx
;
147 assert(tex
->sampler_index
== tex
->texture_index
);
149 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
150 switch (tex
->src
[i
].src_type
) {
151 case nir_tex_src_coord
:
152 coord
= &tex
->src
[i
].src
;
154 case nir_tex_src_bias
:
155 case nir_tex_src_lod
:
157 lod_bias
= &tex
->src
[i
].src
;
166 if (tex
->sampler_dim
== GLSL_SAMPLER_DIM_RECT
) {
167 /* use a dummy load_uniform here to represent texcoord scale */
168 b
.cursor
= nir_before_instr(instr
);
169 nir_intrinsic_instr
*load
=
170 nir_intrinsic_instr_create(b
.shader
, nir_intrinsic_load_uniform
);
171 nir_intrinsic_set_base(load
, ~tex
->sampler_index
);
172 load
->num_components
= 2;
173 load
->src
[0] = nir_src_for_ssa(nir_imm_float(&b
, 0.0f
));
174 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 2, 32, NULL
);
175 nir_intrinsic_set_type(load
, nir_type_float
);
177 nir_builder_instr_insert(&b
, &load
->instr
);
179 nir_ssa_def
*new_coord
= nir_fmul(&b
, coord
->ssa
, &load
->dest
.ssa
);
180 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(new_coord
));
183 /* pre HALTI5 needs texture sources in a single source */
185 if (!lod_bias
|| v
->shader
->specs
->halti
>= 5)
188 assert(coord
&& lod_bias
&& tex
->coord_components
< 4);
190 nir_alu_instr
*vec
= nir_alu_instr_create(shader
, nir_op_vec4
);
191 for (unsigned i
= 0; i
< tex
->coord_components
; i
++) {
192 vec
->src
[i
].src
= nir_src_for_ssa(coord
->ssa
);
193 vec
->src
[i
].swizzle
[0] = i
;
195 for (unsigned i
= tex
->coord_components
; i
< 4; i
++)
196 vec
->src
[i
].src
= nir_src_for_ssa(lod_bias
->ssa
);
198 vec
->dest
.write_mask
= 0xf;
199 nir_ssa_dest_init(&vec
->instr
, &vec
->dest
.dest
, 4, 32, NULL
);
201 nir_tex_instr_remove_src(tex
, lod_bias_idx
);
202 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(&vec
->dest
.dest
.ssa
));
203 tex
->coord_components
= 4;
205 nir_instr_insert_before(&tex
->instr
, &vec
->instr
);
212 etna_alu_to_scalar_filter_cb(const nir_instr
*instr
, const void *data
)
214 const struct etna_specs
*specs
= data
;
216 if (instr
->type
!= nir_instr_type_alu
)
219 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
231 if (!specs
->has_halti2_instructions
)
242 etna_lower_alu_impl(nir_function_impl
*impl
, struct etna_compile
*c
)
244 nir_shader
*shader
= impl
->function
->shader
;
247 nir_builder_init(&b
, impl
);
249 /* in a seperate loop so we can apply the multiple-uniform logic to the new fmul */
250 nir_foreach_block(block
, impl
) {
251 nir_foreach_instr_safe(instr
, block
) {
252 if (instr
->type
!= nir_instr_type_alu
)
255 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
256 /* multiply sin/cos src by constant
257 * TODO: do this earlier (but it breaks const_prop opt)
259 if (alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
) {
260 b
.cursor
= nir_before_instr(instr
);
262 nir_ssa_def
*imm
= c
->specs
->has_new_transcendentals
?
263 nir_imm_float(&b
, 1.0 / M_PI
) :
264 nir_imm_float(&b
, 2.0 / M_PI
);
266 nir_instr_rewrite_src(instr
, &alu
->src
[0].src
,
267 nir_src_for_ssa(nir_fmul(&b
, alu
->src
[0].src
.ssa
, imm
)));
270 /* change transcendental ops to vec2 and insert vec1 mul for the result
271 * TODO: do this earlier (but it breaks with optimizations)
273 if (c
->specs
->has_new_transcendentals
&& (
274 alu
->op
== nir_op_fdiv
|| alu
->op
== nir_op_flog2
||
275 alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
)) {
276 nir_ssa_def
*ssa
= &alu
->dest
.dest
.ssa
;
278 assert(ssa
->num_components
== 1);
280 nir_alu_instr
*mul
= nir_alu_instr_create(shader
, nir_op_fmul
);
281 mul
->src
[0].src
= mul
->src
[1].src
= nir_src_for_ssa(ssa
);
282 mul
->src
[1].swizzle
[0] = 1;
284 mul
->dest
.write_mask
= 1;
285 nir_ssa_dest_init(&mul
->instr
, &mul
->dest
.dest
, 1, 32, NULL
);
287 ssa
->num_components
= 2;
289 mul
->dest
.saturate
= alu
->dest
.saturate
;
290 alu
->dest
.saturate
= 0;
292 nir_instr_insert_after(instr
, &mul
->instr
);
294 nir_ssa_def_rewrite_uses_after(ssa
, nir_src_for_ssa(&mul
->dest
.dest
.ssa
), &mul
->instr
);
300 static void etna_lower_alu(nir_shader
*shader
, struct etna_compile
*c
)
302 nir_foreach_function(function
, shader
) {
304 etna_lower_alu_impl(function
->impl
, c
);
309 emit_inst(struct etna_compile
*c
, struct etna_inst
*inst
)
311 c
->code
[c
->inst_ptr
++] = *inst
;
314 /* to map nir srcs should to etna_inst srcs */
316 SRC_0_1_2
= (0 << 0) | (1 << 2) | (2 << 4),
317 SRC_0_1_X
= (0 << 0) | (1 << 2) | (3 << 4),
318 SRC_0_X_X
= (0 << 0) | (3 << 2) | (3 << 4),
319 SRC_0_X_1
= (0 << 0) | (3 << 2) | (1 << 4),
320 SRC_0_1_0
= (0 << 0) | (1 << 2) | (0 << 4),
321 SRC_X_X_0
= (3 << 0) | (3 << 2) | (0 << 4),
322 SRC_0_X_0
= (0 << 0) | (3 << 2) | (0 << 4),
325 /* info to translate a nir op to etna_inst */
326 struct etna_op_info
{
327 uint8_t opcode
; /* INST_OPCODE_ */
328 uint8_t src
; /* SRC_ enum */
329 uint8_t cond
; /* INST_CONDITION_ */
330 uint8_t type
; /* INST_TYPE_ */
333 static const struct etna_op_info etna_ops
[] = {
334 [0 ... nir_num_opcodes
- 1] = {0xff},
337 #define OPCT(nir, op, src, cond, type) [nir_op_##nir] = { \
340 INST_CONDITION_##cond, \
343 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32)
344 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
345 OP(mov
, MOV
, X_X_0
), OP(fneg
, MOV
, X_X_0
), OP(fabs
, MOV
, X_X_0
), OP(fsat
, MOV
, X_X_0
),
346 OP(fmul
, MUL
, 0_1_X
), OP(fadd
, ADD
, 0_X_1
), OP(ffma
, MAD
, 0_1_2
),
347 OP(fdot2
, DP2
, 0_1_X
), OP(fdot3
, DP3
, 0_1_X
), OP(fdot4
, DP4
, 0_1_X
),
348 OPC(fmin
, SELECT
, 0_1_0
, GT
), OPC(fmax
, SELECT
, 0_1_0
, LT
),
349 OP(ffract
, FRC
, X_X_0
), OP(frcp
, RCP
, X_X_0
), OP(frsq
, RSQ
, X_X_0
),
350 OP(fsqrt
, SQRT
, X_X_0
), OP(fsin
, SIN
, X_X_0
), OP(fcos
, COS
, X_X_0
),
351 OP(fsign
, SIGN
, X_X_0
), OP(ffloor
, FLOOR
, X_X_0
), OP(fceil
, CEIL
, X_X_0
),
352 OP(flog2
, LOG
, X_X_0
), OP(fexp2
, EXP
, X_X_0
),
353 OPC(seq
, SET
, 0_1_X
, EQ
), OPC(sne
, SET
, 0_1_X
, NE
), OPC(sge
, SET
, 0_1_X
, GE
), OPC(slt
, SET
, 0_1_X
, LT
),
354 OPC(fcsel
, SELECT
, 0_1_2
, NZ
),
355 OP(fdiv
, DIV
, 0_1_X
),
356 OP(fddx
, DSX
, 0_X_0
), OP(fddy
, DSY
, 0_X_0
),
358 /* integer opcodes */
359 OPCT(i2f32
, I2F
, 0_X_X
, TRUE
, S32
),
360 OPCT(f2u32
, F2I
, 0_X_X
, TRUE
, U32
),
364 etna_emit_block_start(struct etna_compile
*c
, unsigned block
)
366 c
->block_ptr
[block
] = c
->inst_ptr
;
370 etna_emit_alu(struct etna_compile
*c
, nir_op op
, struct etna_inst_dst dst
,
371 struct etna_inst_src src
[3], bool saturate
)
373 struct etna_op_info ei
= etna_ops
[op
];
375 assert(ei
.opcode
!= 0xff);
377 struct etna_inst inst
= {
390 if (c
->specs
->has_new_transcendentals
)
399 /* for these instructions we want src to be in x component
400 * note: on HALTI2+ i2f/f2u are not scalar but we only use them this way currently
402 src
[0].swiz
= inst_swiz_compose(src
[0].swiz
,
403 INST_SWIZ_BROADCAST(ffs(inst
.dst
.write_mask
)-1));
408 for (unsigned j
= 0; j
< 3; j
++) {
409 unsigned i
= ((ei
.src
>> j
*2) & 3);
411 inst
.src
[j
] = src
[i
];
418 etna_emit_tex(struct etna_compile
*c
, nir_texop op
, unsigned texid
, unsigned dst_swiz
,
419 struct etna_inst_dst dst
, struct etna_inst_src coord
,
420 struct etna_inst_src lod_bias
)
422 struct etna_inst inst
= {
424 .tex
.id
= texid
+ (is_fs(c
) ? 0 : c
->specs
->vertex_sampler_offset
),
425 .tex
.swiz
= dst_swiz
,
430 inst
.src
[1] = lod_bias
;
433 case nir_texop_tex
: inst
.opcode
= INST_OPCODE_TEXLD
; break;
434 case nir_texop_txb
: inst
.opcode
= INST_OPCODE_TEXLDB
; break;
435 case nir_texop_txl
: inst
.opcode
= INST_OPCODE_TEXLDL
; break;
444 etna_emit_jump(struct etna_compile
*c
, unsigned block
, struct etna_inst_src condition
)
446 if (!condition
.use
) {
447 emit_inst(c
, &(struct etna_inst
) {.opcode
= INST_OPCODE_BRANCH
, .imm
= block
});
451 struct etna_inst inst
= {
452 .opcode
= INST_OPCODE_BRANCH
,
453 .cond
= INST_CONDITION_NOT
,
454 .type
= INST_TYPE_U32
,
458 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
463 etna_emit_discard(struct etna_compile
*c
, struct etna_inst_src condition
)
465 if (!condition
.use
) {
466 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_TEXKILL
});
470 struct etna_inst inst
= {
471 .opcode
= INST_OPCODE_TEXKILL
,
472 .cond
= INST_CONDITION_GZ
,
475 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
480 etna_emit_output(struct etna_compile
*c
, unsigned index
, struct etna_inst_src src
)
482 c
->output_reg
[index
] = src
.reg
;
486 etna_emit_load_ubo(struct etna_compile
*c
, struct etna_inst_dst dst
,
487 struct etna_inst_src src
, struct etna_inst_src base
)
489 emit_inst(c
, &(struct etna_inst
) {
490 .opcode
= INST_OPCODE_LOAD
,
491 .type
= INST_TYPE_U32
,
498 #define OPT(nir, pass, ...) ({ \
499 bool this_progress = false; \
500 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
503 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
506 etna_optimize_loop(nir_shader
*s
)
512 OPT_V(s
, nir_lower_vars_to_ssa
);
513 progress
|= OPT(s
, nir_opt_copy_prop_vars
);
514 progress
|= OPT(s
, nir_copy_prop
);
515 progress
|= OPT(s
, nir_opt_dce
);
516 progress
|= OPT(s
, nir_opt_cse
);
517 progress
|= OPT(s
, nir_opt_peephole_select
, 16, true, true);
518 progress
|= OPT(s
, nir_opt_intrinsics
);
519 progress
|= OPT(s
, nir_opt_algebraic
);
520 progress
|= OPT(s
, nir_opt_constant_folding
);
521 progress
|= OPT(s
, nir_opt_dead_cf
);
522 if (OPT(s
, nir_opt_trivial_continues
)) {
524 /* If nir_opt_trivial_continues makes progress, then we need to clean
525 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
528 OPT(s
, nir_copy_prop
);
531 progress
|= OPT(s
, nir_opt_loop_unroll
, nir_var_all
);
532 progress
|= OPT(s
, nir_opt_if
, false);
533 progress
|= OPT(s
, nir_opt_remove_phis
);
534 progress
|= OPT(s
, nir_opt_undef
);
540 etna_glsl_type_size(const struct glsl_type
*type
, bool bindless
)
542 return glsl_count_attribute_slots(type
, false);
546 copy_uniform_state_to_shader(struct etna_shader_variant
*sobj
, uint64_t *consts
, unsigned count
)
548 struct etna_shader_uniform_info
*uinfo
= &sobj
->uniforms
;
550 uinfo
->imm_count
= count
* 4;
551 uinfo
->imm_data
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_data
));
552 uinfo
->imm_contents
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_contents
));
554 for (unsigned i
= 0; i
< uinfo
->imm_count
; i
++) {
555 uinfo
->imm_data
[i
] = consts
[i
];
556 uinfo
->imm_contents
[i
] = consts
[i
] >> 32;
559 etna_set_shader_uniforms_dirty_flags(sobj
);
562 #include "etnaviv_compiler_nir_emit.h"
565 etna_compile_shader_nir(struct etna_shader_variant
*v
)
570 struct etna_compile
*c
= CALLOC_STRUCT(etna_compile
);
575 c
->specs
= v
->shader
->specs
;
576 c
->nir
= nir_shader_clone(NULL
, v
->shader
->nir
);
578 nir_shader
*s
= c
->nir
;
579 const struct etna_specs
*specs
= c
->specs
;
581 v
->stage
= s
->info
.stage
;
582 v
->num_loops
= 0; /* TODO */
583 v
->vs_id_in_reg
= -1;
584 v
->vs_pos_out_reg
= -1;
585 v
->vs_pointsize_out_reg
= -1;
586 v
->ps_color_out_reg
= 0; /* 0 for shader that doesn't write fragcolor.. */
587 v
->ps_depth_out_reg
= -1;
589 /* setup input linking */
590 struct etna_shader_io_file
*sf
= &v
->infile
;
591 if (s
->info
.stage
== MESA_SHADER_VERTEX
) {
592 nir_foreach_variable(var
, &s
->inputs
) {
593 unsigned idx
= var
->data
.driver_location
;
594 sf
->reg
[idx
].reg
= idx
;
595 sf
->reg
[idx
].slot
= var
->data
.location
;
596 sf
->reg
[idx
].num_components
= 4; /* TODO */
597 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
601 nir_foreach_variable(var
, &s
->inputs
) {
602 unsigned idx
= var
->data
.driver_location
;
603 sf
->reg
[idx
].reg
= idx
+ 1;
604 sf
->reg
[idx
].slot
= var
->data
.location
;
605 sf
->reg
[idx
].num_components
= 4; /* TODO */
606 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
609 assert(sf
->num_reg
== count
);
612 NIR_PASS_V(s
, nir_lower_io
, nir_var_all
, etna_glsl_type_size
,
613 (nir_lower_io_options
)0);
615 OPT_V(s
, nir_lower_regs_to_ssa
);
616 OPT_V(s
, nir_lower_vars_to_ssa
);
617 OPT_V(s
, nir_lower_indirect_derefs
, nir_var_all
);
618 OPT_V(s
, nir_lower_tex
, &(struct nir_lower_tex_options
) { .lower_txp
= ~0u });
619 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
621 etna_optimize_loop(s
);
623 /* use opt_algebraic between int_to_float and boot_to_float because
624 * int_to_float emits ftrunc, and ftrunc lowering generates bool ops
626 OPT_V(s
, nir_lower_int_to_float
);
627 OPT_V(s
, nir_opt_algebraic
);
628 OPT_V(s
, nir_lower_bool_to_float
);
630 /* after int to float because insert i2f for instance_id */
631 OPT_V(s
, etna_lower_io
, v
);
633 etna_optimize_loop(s
);
635 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
636 nir_print_shader(s
, stdout
);
638 while( OPT(s
, nir_opt_vectorize
) );
639 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
641 NIR_PASS_V(s
, nir_remove_dead_variables
, nir_var_function_temp
);
642 NIR_PASS_V(s
, nir_opt_algebraic_late
);
644 NIR_PASS_V(s
, nir_move_vec_src_uses_to_dest
);
645 NIR_PASS_V(s
, nir_copy_prop
);
646 NIR_PASS_V(s
, nir_lower_to_source_mods
, ~nir_lower_int_source_mods
);
647 /* need copy prop after uses_to_dest, and before src mods: see
648 * dEQP-GLES2.functional.shaders.random.all_features.fragment.95
651 NIR_PASS_V(s
, nir_opt_dce
);
653 NIR_PASS_V(s
, etna_lower_alu
, c
);
655 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
656 nir_print_shader(s
, stdout
);
658 uint64_t consts
[ETNA_MAX_IMM
] = {};
660 unsigned block_ptr
[nir_shader_get_entrypoint(s
)->num_blocks
];
661 c
->block_ptr
= block_ptr
;
662 struct emit_options options
= {
663 .max_temps
= ETNA_MAX_TEMPS
,
664 .max_consts
= ETNA_MAX_IMM
/ 4,
665 .id_reg
= sf
->num_reg
,
666 .single_const_src
= c
->specs
->halti
< 5,
667 .etna_new_transcendentals
= c
->specs
->has_new_transcendentals
,
673 ASSERTED
bool ok
= emit_shader(c
->nir
, &options
, &v
->num_temps
, &num_consts
);
676 /* empty shader, emit NOP */
678 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_NOP
});
680 /* assemble instructions, fixing up labels */
681 uint32_t *code
= MALLOC(c
->inst_ptr
* 16 + 1024);
682 for (unsigned i
= 0; i
< c
->inst_ptr
; i
++) {
683 struct etna_inst
*inst
= &c
->code
[i
];
684 if (inst
->opcode
== INST_OPCODE_BRANCH
)
685 inst
->imm
= block_ptr
[inst
->imm
];
687 inst
->halti5
= specs
->halti
>= 5;
688 etna_assemble(&code
[i
* 4], inst
);
691 v
->code_size
= c
->inst_ptr
* 4;
693 v
->needs_icache
= c
->inst_ptr
> specs
->max_instructions
;
695 copy_uniform_state_to_shader(v
, consts
, num_consts
);
697 if (s
->info
.stage
== MESA_SHADER_FRAGMENT
) {
698 v
->input_count_unk8
= 31; /* XXX what is this */
700 nir_foreach_variable(var
, &s
->outputs
) {
701 unsigned reg
= c
->output_reg
[var
->data
.driver_location
];
702 switch (var
->data
.location
) {
703 case FRAG_RESULT_COLOR
:
704 case FRAG_RESULT_DATA0
: /* DATA0 is used by gallium shaders for color */
705 v
->ps_color_out_reg
= reg
;
707 case FRAG_RESULT_DEPTH
:
708 v
->ps_depth_out_reg
= reg
;
711 compile_error(c
, "Unsupported fs output %s\n", gl_frag_result_name(var
->data
.location
));
714 assert(v
->ps_depth_out_reg
<= 0);
715 v
->outfile
.num_reg
= 0;
721 v
->input_count_unk8
= DIV_ROUND_UP(v
->infile
.num_reg
+ 4, 16); /* XXX what is this */
725 nir_foreach_variable(var
, &s
->outputs
) {
726 unsigned native
= c
->output_reg
[var
->data
.driver_location
];
728 if (var
->data
.location
== VARYING_SLOT_POS
) {
729 v
->vs_pos_out_reg
= native
;
733 if (var
->data
.location
== VARYING_SLOT_PSIZ
) {
734 v
->vs_pointsize_out_reg
= native
;
738 sf
->reg
[sf
->num_reg
].reg
= native
;
739 sf
->reg
[sf
->num_reg
].slot
= var
->data
.location
;
740 sf
->reg
[sf
->num_reg
].num_components
= 4; /* TODO */
744 /* fill in "mystery meat" load balancing value. This value determines how
745 * work is scheduled between VS and PS
746 * in the unified shader architecture. More precisely, it is determined from
747 * the number of VS outputs, as well as chip-specific
748 * vertex output buffer size, vertex cache size, and the number of shader
751 * XXX this is a conservative estimate, the "optimal" value is only known for
752 * sure at link time because some
753 * outputs may be unused and thus unmapped. Then again, in the general use
754 * case with GLSL the vertex and fragment
755 * shaders are linked already before submitting to Gallium, thus all outputs
758 * note: TGSI compiler counts all outputs (including position and pointsize), here
759 * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
760 * TODO: might have a problem that we don't count pointsize when it is used
763 int half_out
= v
->outfile
.num_reg
/ 2 + 1;
766 uint32_t b
= ((20480 / (specs
->vertex_output_buffer_size
-
767 2 * half_out
* specs
->vertex_cache_size
)) +
770 uint32_t a
= (b
+ 256 / (specs
->shader_core_count
* half_out
)) / 2;
771 v
->vs_load_balancing
= VIVS_VS_LOAD_BALANCING_A(MIN2(a
, 255)) |
772 VIVS_VS_LOAD_BALANCING_B(MIN2(b
, 255)) |
773 VIVS_VS_LOAD_BALANCING_C(0x3f) |
774 VIVS_VS_LOAD_BALANCING_D(0x0f);
782 etna_destroy_shader_nir(struct etna_shader_variant
*shader
)
787 FREE(shader
->uniforms
.imm_data
);
788 FREE(shader
->uniforms
.imm_contents
);
792 extern const char *tgsi_swizzle_names
[];
794 etna_dump_shader_nir(const struct etna_shader_variant
*shader
)
796 if (shader
->stage
== MESA_SHADER_VERTEX
)
801 etna_disasm(shader
->code
, shader
->code_size
, PRINT_RAW
);
803 printf("num loops: %i\n", shader
->num_loops
);
804 printf("num temps: %i\n", shader
->num_temps
);
805 printf("immediates:\n");
806 for (int idx
= 0; idx
< shader
->uniforms
.imm_count
; ++idx
) {
807 printf(" [%i].%s = %f (0x%08x) (%d)\n",
809 tgsi_swizzle_names
[idx
% 4],
810 *((float *)&shader
->uniforms
.imm_data
[idx
]),
811 shader
->uniforms
.imm_data
[idx
],
812 shader
->uniforms
.imm_contents
[idx
]);
815 for (int idx
= 0; idx
< shader
->infile
.num_reg
; ++idx
) {
816 printf(" [%i] name=%s comps=%i\n", shader
->infile
.reg
[idx
].reg
,
817 (shader
->stage
== MESA_SHADER_VERTEX
) ?
818 gl_vert_attrib_name(shader
->infile
.reg
[idx
].slot
) :
819 gl_varying_slot_name(shader
->infile
.reg
[idx
].slot
),
820 shader
->infile
.reg
[idx
].num_components
);
822 printf("outputs:\n");
823 for (int idx
= 0; idx
< shader
->outfile
.num_reg
; ++idx
) {
824 printf(" [%i] name=%s comps=%i\n", shader
->outfile
.reg
[idx
].reg
,
825 (shader
->stage
== MESA_SHADER_VERTEX
) ?
826 gl_varying_slot_name(shader
->outfile
.reg
[idx
].slot
) :
827 gl_frag_result_name(shader
->outfile
.reg
[idx
].slot
),
828 shader
->outfile
.reg
[idx
].num_components
);
830 printf("special:\n");
831 if (shader
->stage
== MESA_SHADER_VERTEX
) {
832 printf(" vs_pos_out_reg=%i\n", shader
->vs_pos_out_reg
);
833 printf(" vs_pointsize_out_reg=%i\n", shader
->vs_pointsize_out_reg
);
834 printf(" vs_load_balancing=0x%08x\n", shader
->vs_load_balancing
);
836 printf(" ps_color_out_reg=%i\n", shader
->ps_color_out_reg
);
837 printf(" ps_depth_out_reg=%i\n", shader
->ps_depth_out_reg
);
839 printf(" input_count_unk8=0x%08x\n", shader
->input_count_unk8
);
842 static const struct etna_shader_inout
*
843 etna_shader_vs_lookup(const struct etna_shader_variant
*sobj
,
844 const struct etna_shader_inout
*in
)
846 for (int i
= 0; i
< sobj
->outfile
.num_reg
; i
++)
847 if (sobj
->outfile
.reg
[i
].slot
== in
->slot
)
848 return &sobj
->outfile
.reg
[i
];
854 etna_link_shader_nir(struct etna_shader_link_info
*info
,
855 const struct etna_shader_variant
*vs
,
856 const struct etna_shader_variant
*fs
)
859 /* For each fragment input we need to find the associated vertex shader
860 * output, which can be found by matching on semantic name and index. A
861 * binary search could be used because the vs outputs are sorted by their
862 * semantic index and grouped by semantic type by fill_in_vs_outputs.
864 assert(fs
->infile
.num_reg
< ETNA_NUM_INPUTS
);
865 info
->pcoord_varying_comp_ofs
= -1;
867 for (int idx
= 0; idx
< fs
->infile
.num_reg
; ++idx
) {
868 const struct etna_shader_inout
*fsio
= &fs
->infile
.reg
[idx
];
869 const struct etna_shader_inout
*vsio
= etna_shader_vs_lookup(vs
, fsio
);
870 struct etna_varying
*varying
;
871 bool interpolate_always
= true;
873 assert(fsio
->reg
> 0 && fsio
->reg
<= ARRAY_SIZE(info
->varyings
));
875 if (fsio
->reg
> info
->num_varyings
)
876 info
->num_varyings
= fsio
->reg
;
878 varying
= &info
->varyings
[fsio
->reg
- 1];
879 varying
->num_components
= fsio
->num_components
;
881 if (!interpolate_always
) /* colors affected by flat shading */
882 varying
->pa_attributes
= 0x200;
883 else /* texture coord or other bypasses flat shading */
884 varying
->pa_attributes
= 0x2f1;
886 varying
->use
[0] = VARYING_COMPONENT_USE_UNUSED
;
887 varying
->use
[1] = VARYING_COMPONENT_USE_UNUSED
;
888 varying
->use
[2] = VARYING_COMPONENT_USE_UNUSED
;
889 varying
->use
[3] = VARYING_COMPONENT_USE_UNUSED
;
891 /* point coord is an input to the PS without matching VS output,
892 * so it gets a varying slot without being assigned a VS register.
894 if (fsio
->slot
== VARYING_SLOT_PNTC
) {
895 varying
->use
[0] = VARYING_COMPONENT_USE_POINTCOORD_X
;
896 varying
->use
[1] = VARYING_COMPONENT_USE_POINTCOORD_Y
;
898 info
->pcoord_varying_comp_ofs
= comp_ofs
;
900 if (vsio
== NULL
) { /* not found -- link error */
901 BUG("Semantic value not found in vertex shader outputs\n");
904 varying
->reg
= vsio
->reg
;
907 comp_ofs
+= varying
->num_components
;
910 assert(info
->num_varyings
== fs
->infile
.num_reg
);