src/gallium/drivers/etnaviv/etnaviv_context.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  *    Christian Gmeiner <christian.gmeiner@gmail.com>
  26  */
  27
  28 #include "etnaviv_context.h"
  29
  30 #include "etnaviv_blend.h"
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_compiler.h"
  33 #include "etnaviv_debug.h"
  34 #include "etnaviv_emit.h"
  35 #include "etnaviv_fence.h"
  36 #include "etnaviv_query.h"
  37 #include "etnaviv_query_acc.h"
  38 #include "etnaviv_rasterizer.h"
  39 #include "etnaviv_resource.h"
  40 #include "etnaviv_screen.h"
  41 #include "etnaviv_shader.h"
  42 #include "etnaviv_state.h"
  43 #include "etnaviv_surface.h"
  44 #include "etnaviv_texture.h"
  45 #include "etnaviv_transfer.h"
  46 #include "etnaviv_translate.h"
  47 #include "etnaviv_zsa.h"
  48
  49 #include "pipe/p_context.h"
  50 #include "pipe/p_state.h"
  51 #include "util/hash_table.h"
  52 #include "util/u_blitter.h"
  53 #include "util/u_helpers.h"
  54 #include "util/u_memory.h"
  55 #include "util/u_prim.h"
  56 #include "util/u_upload_mgr.h"
  57
  58 #include "hw/common.xml.h"
  59
  60 static inline void
  61 etna_emit_nop_with_data(struct etna_cmd_stream *stream, uint32_t value)
  62 {
  63    etna_cmd_stream_emit(stream, VIV_FE_NOP_HEADER_OP_NOP);
  64    etna_cmd_stream_emit(stream, value);
  65 }
  66
  67 static void
  68 etna_emit_string_marker(struct pipe_context *pctx, const char *string, int len)
  69 {
  70    struct etna_context *ctx = etna_context(pctx);
  71    struct etna_cmd_stream *stream = ctx->stream;
  72    const uint32_t *buf = (const void *)string;
  73
  74    etna_cmd_stream_reserve(stream, len * 2);
  75
  76    while (len >= 4) {
  77       etna_emit_nop_with_data(stream, *buf);
  78       buf++;
  79       len -= 4;
  80    }
  81
  82    /* copy remainder bytes without reading past end of input string */
  83    if (len > 0) {
  84       uint32_t w = 0;
  85       memcpy(&w, buf, len);
  86       etna_emit_nop_with_data(stream, w);
  87    }
  88 }
  89
  90 static void
  91 etna_context_destroy(struct pipe_context *pctx)
  92 {
  93    struct etna_context *ctx = etna_context(pctx);
  94
  95    mtx_lock(&ctx->lock);
  96    if (ctx->used_resources_read) {
  97
  98       /*
  99        * There should be no resources tracked in the context when it's being
 100        * destroyed. Be sure there are none to avoid memory leaks on buggy
 101        * programs.
 102        */
 103       set_foreach(ctx->used_resources_read, entry) {
 104          struct etna_resource *rsc = (struct etna_resource *)entry->key;
 105
 106          _mesa_set_remove_key(rsc->pending_ctx, ctx);
 107       }
 108       _mesa_set_destroy(ctx->used_resources_read, NULL);
 109
 110    }
 111    if (ctx->used_resources_write) {
 112
 113       /*
 114        * There should be no resources tracked in the context when it's being
 115        * destroyed. Be sure there are none to avoid memory leaks on buggy
 116        * programs.
 117        */
 118       set_foreach(ctx->used_resources_write, entry) {
 119          struct etna_resource *rsc = (struct etna_resource *)entry->key;
 120
 121          _mesa_set_remove_key(rsc->pending_ctx, ctx);
 122       }
 123       _mesa_set_destroy(ctx->used_resources_write, NULL);
 124
 125    }
 126    mtx_unlock(&ctx->lock);
 127
 128    if (ctx->dummy_rt)
 129       etna_bo_del(ctx->dummy_rt);
 130
 131    util_copy_framebuffer_state(&ctx->framebuffer_s, NULL);
 132
 133    if (ctx->primconvert)
 134       util_primconvert_destroy(ctx->primconvert);
 135
 136    if (ctx->blitter)
 137       util_blitter_destroy(ctx->blitter);
 138
 139    if (pctx->stream_uploader)
 140       u_upload_destroy(pctx->stream_uploader);
 141
 142    if (ctx->stream)
 143       etna_cmd_stream_del(ctx->stream);
 144
 145    slab_destroy_child(&ctx->transfer_pool);
 146
 147    if (ctx->in_fence_fd != -1)
 148       close(ctx->in_fence_fd);
 149
 150    mtx_destroy(&ctx->lock);
 151
 152    FREE(pctx);
 153 }
 154
 155 /* Update render state where needed based on draw operation */
 156 static void
 157 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
 158 {
 159    /* Handle primitive restart:
 160     * - If not an indexed draw, we don't care about the state of the primitive restart bit.
 161     * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
 162     *   accordingly
 163     * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
 164     *   primitive restart is enabled and the restart index changed, mark the index
 165     *   buffer state as dirty
 166     */
 167
 168    if (info->index_size) {
 169       uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
 170
 171       if (info->primitive_restart)
 172          new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 173       else
 174          new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 175
 176       if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
 177           (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
 178          ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
 179          ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
 180          ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 181       }
 182    }
 183 }
 184
 185 static bool
 186 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
 187 {
 188    const struct etna_shader_variant *old = ctx->shader.vs;
 189
 190    ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
 191
 192    if (!ctx->shader.vs)
 193       return false;
 194
 195    if (old != ctx->shader.vs)
 196       ctx->dirty |= ETNA_DIRTY_SHADER;
 197
 198    return true;
 199 }
 200
 201 static bool
 202 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
 203 {
 204    const struct etna_shader_variant *old = ctx->shader.fs;
 205
 206    ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
 207
 208    if (!ctx->shader.fs)
 209       return false;
 210
 211    if (old != ctx->shader.fs)
 212       ctx->dirty |= ETNA_DIRTY_SHADER;
 213
 214    return true;
 215 }
 216
 217 static void
 218 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
 219 {
 220    struct etna_context *ctx = etna_context(pctx);
 221    struct etna_screen *screen = ctx->screen;
 222    struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
 223    uint32_t draw_mode;
 224    unsigned i;
 225
 226    if (!info->count_from_stream_output && !info->indirect &&
 227        !info->primitive_restart &&
 228        !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
 229       return;
 230
 231    if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
 232       return; /* Nothing to do */
 233
 234    if (!(ctx->prim_hwsupport & (1 << info->mode))) {
 235       struct primconvert_context *primconvert = ctx->primconvert;
 236       util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
 237       util_primconvert_draw_vbo(primconvert, info);
 238       return;
 239    }
 240
 241    int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
 242    if (unlikely(prims <= 0)) {
 243       DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
 244       return;
 245    }
 246
 247    draw_mode = translate_draw_mode(info->mode);
 248    if (draw_mode == ETNA_NO_MATCH) {
 249       BUG("Unsupported draw mode");
 250       return;
 251    }
 252
 253    /* Upload a user index buffer. */
 254    unsigned index_offset = 0;
 255    struct pipe_resource *indexbuf = NULL;
 256
 257    if (info->index_size) {
 258       indexbuf = info->has_user_indices ? NULL : info->index.resource;
 259       if (info->has_user_indices &&
 260           !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset, 4)) {
 261          BUG("Index buffer upload failed.");
 262          return;
 263       }
 264       /* Add start to index offset, when rendering indexed */
 265       index_offset += info->start * info->index_size;
 266
 267       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
 268       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
 269       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
 270       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
 271
 272       if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
 273          BUG("Unsupported or no index buffer");
 274          return;
 275       }
 276    } else {
 277       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
 278       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
 279       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
 280       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
 281    }
 282    ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 283
 284    struct etna_shader_key key = {
 285       .front_ccw = ctx->rasterizer->front_ccw,
 286    };
 287
 288    if (pfb->cbufs[0])
 289       key.frag_rb_swap = !!translate_pe_format_rb_swap(pfb->cbufs[0]->format);
 290
 291    if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
 292       BUG("compiled shaders are not okay");
 293       return;
 294    }
 295
 296    /* Update any derived state */
 297    if (!etna_state_update(ctx))
 298       return;
 299
 300    mtx_lock(&ctx->lock);
 301
 302    /*
 303     * Figure out the buffers/features we need:
 304     */
 305    if (etna_depth_enabled(ctx))
 306       resource_written(ctx, pfb->zsbuf->texture);
 307
 308    if (etna_stencil_enabled(ctx))
 309       resource_written(ctx, pfb->zsbuf->texture);
 310
 311    for (i = 0; i < pfb->nr_cbufs; i++) {
 312       struct pipe_resource *surf;
 313
 314       if (!pfb->cbufs[i])
 315          continue;
 316
 317       surf = pfb->cbufs[i]->texture;
 318       resource_written(ctx, surf);
 319    }
 320
 321    /* Mark constant buffers as being read */
 322    foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask)
 323       resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb[i].buffer);
 324
 325    foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask)
 326       resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer);
 327
 328    /* Mark VBOs as being read */
 329    foreach_bit(i, ctx->vertex_buffer.enabled_mask) {
 330       assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
 331       resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
 332    }
 333
 334    /* Mark index buffer as being read */
 335    resource_read(ctx, indexbuf);
 336
 337    /* Mark textures as being read */
 338    for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
 339       if (ctx->sampler_view[i]) {
 340           resource_read(ctx, ctx->sampler_view[i]->texture);
 341
 342          /* if texture was modified since the last update,
 343           * we need to clear the texture cache and possibly
 344           * resolve/update ts
 345           */
 346          etna_update_sampler_source(ctx->sampler_view[i], i);
 347       }
 348    }
 349
 350    ctx->stats.prims_generated += u_reduced_prims_for_vertices(info->mode, info->count);
 351    ctx->stats.draw_calls++;
 352
 353    /* Update state for this draw operation */
 354    etna_update_state_for_draw(ctx, info);
 355
 356    /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
 357    etna_emit_state(ctx);
 358
 359    if (screen->specs.halti >= 2) {
 360       /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
 361       etna_draw_instanced(ctx->stream, info->index_size, draw_mode, info->instance_count,
 362          info->count, info->index_size ? info->index_bias : info->start);
 363    } else {
 364       if (info->index_size)
 365          etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
 366       else
 367          etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
 368    }
 369
 370    if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
 371       /* Stall the FE after every draw operation.  This allows better
 372        * debug of GPU hang conditions, as the FE will indicate which
 373        * draw op has caused the hang. */
 374       etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
 375    }
 376    mtx_unlock(&ctx->lock);
 377
 378    if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
 379       pctx->flush(pctx, NULL, 0);
 380
 381    if (ctx->framebuffer_s.cbufs[0])
 382       etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++;
 383    if (ctx->framebuffer_s.zsbuf)
 384       etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++;
 385    if (info->index_size && indexbuf != info->index.resource)
 386       pipe_resource_reference(&indexbuf, NULL);
 387 }
 388
 389 static void
 390 etna_reset_gpu_state(struct etna_context *ctx)
 391 {
 392    struct etna_cmd_stream *stream = ctx->stream;
 393    struct etna_screen *screen = ctx->screen;
 394
 395    etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
 396    etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
 397    etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
 398    etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
 399    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
 400    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
 401    etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
 402    etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
 403    etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
 404
 405    /* There is no HALTI0 specific state */
 406    if (screen->specs.halti >= 1) { /* Only on HALTI1+ */
 407       etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
 408    }
 409    if (screen->specs.halti >= 2) { /* Only on HALTI2+ */
 410       etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
 411    }
 412    if (screen->specs.halti >= 3) { /* Only on HALTI3+ */
 413       etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
 414    }
 415    if (screen->specs.halti >= 4) { /* Only on HALTI4+ */
 416       etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
 417                                                   0xffff6fff & 0xfffff6ff & 0xffffff7f);
 418       etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
 419    }
 420    if (screen->specs.halti >= 5) { /* Only on HALTI5+ */
 421       etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
 422       etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
 423       etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
 424       etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
 425       etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
 426    } else { /* Only on pre-HALTI5 */
 427       etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
 428       etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
 429    }
 430
 431    if (!screen->specs.use_blt) {
 432       /* Enable SINGLE_BUFFER for resolve, if supported */
 433       etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
 434    }
 435
 436    if (screen->specs.halti >= 5) {
 437       /* TXDESC cache flush - do this once at the beginning, as texture
 438        * descriptors are only written by the CPU once, then patched by the kernel
 439        * before command stream submission. It does not need flushing if the
 440        * referenced image data changes.
 441        */
 442       etna_set_state(stream, VIVS_NTE_DESCRIPTOR_FLUSH, 0);
 443       etna_set_state(stream, VIVS_GL_FLUSH_CACHE,
 444             VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK12 |
 445             VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK13);
 446
 447       /* Icache invalidate (should do this on shader change?) */
 448       etna_set_state(stream, VIVS_VS_ICACHE_INVALIDATE,
 449             VIVS_VS_ICACHE_INVALIDATE_UNK0 | VIVS_VS_ICACHE_INVALIDATE_UNK1 |
 450             VIVS_VS_ICACHE_INVALIDATE_UNK2 | VIVS_VS_ICACHE_INVALIDATE_UNK3 |
 451             VIVS_VS_ICACHE_INVALIDATE_UNK4);
 452    }
 453
 454    ctx->dirty = ~0L;
 455    ctx->dirty_sampler_views = ~0L;
 456 }
 457
 458 static void
 459 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
 460            enum pipe_flush_flags flags)
 461 {
 462    struct etna_context *ctx = etna_context(pctx);
 463    int out_fence_fd = -1;
 464
 465    mtx_lock(&ctx->lock);
 466
 467    list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node)
 468       etna_acc_query_suspend(aq, ctx);
 469
 470    etna_cmd_stream_flush(ctx->stream, ctx->in_fence_fd,
 471                           (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd : NULL);
 472
 473    list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node)
 474       etna_acc_query_resume(aq, ctx);
 475
 476    if (fence)
 477       *fence = etna_fence_create(pctx, out_fence_fd);
 478
 479    /*
 480    * Go through all _resources_ pending in this _context_ and mark them as
 481    * not pending in this _context_ anymore, since they were just flushed.
 482    */
 483    set_foreach(ctx->used_resources_read, entry) {
 484       struct etna_resource *rsc = (struct etna_resource *)entry->key;
 485       struct pipe_resource *referenced = &rsc->base;
 486
 487       _mesa_set_remove_key(rsc->pending_ctx, ctx);
 488
 489       /* if resource has no pending ctx's reset its status */
 490       if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
 491          rsc->status &= ~ETNA_PENDING_READ;
 492
 493       pipe_resource_reference(&referenced, NULL);
 494    }
 495    _mesa_set_clear(ctx->used_resources_read, NULL);
 496
 497    set_foreach(ctx->used_resources_write, entry) {
 498       struct etna_resource *rsc = (struct etna_resource *)entry->key;
 499       struct pipe_resource *referenced = &rsc->base;
 500
 501       _mesa_set_remove_key(rsc->pending_ctx, ctx);
 502
 503       /* if resource has no pending ctx's reset its status */
 504       if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
 505          rsc->status &= ~ETNA_PENDING_WRITE;
 506
 507       pipe_resource_reference(&referenced, NULL);
 508    }
 509    _mesa_set_clear(ctx->used_resources_write, NULL);
 510
 511    etna_reset_gpu_state(ctx);
 512    mtx_unlock(&ctx->lock);
 513 }
 514
 515 static void
 516 etna_context_force_flush(struct etna_cmd_stream *stream, void *priv)
 517 {
 518    struct pipe_context *pctx = priv;
 519
 520    pctx->flush(pctx, NULL, 0);
 521
 522 }
 523
 524 static void
 525 etna_set_debug_callback(struct pipe_context *pctx,
 526                         const struct pipe_debug_callback *cb)
 527 {
 528    struct etna_context *ctx = etna_context(pctx);
 529
 530    if (cb)
 531       ctx->debug = *cb;
 532    else
 533       memset(&ctx->debug, 0, sizeof(ctx->debug));
 534 }
 535
 536 struct pipe_context *
 537 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
 538 {
 539    struct etna_context *ctx = CALLOC_STRUCT(etna_context);
 540    struct etna_screen *screen;
 541    struct pipe_context *pctx;
 542
 543    if (ctx == NULL)
 544       return NULL;
 545
 546    pctx = &ctx->base;
 547    pctx->priv = ctx;
 548    pctx->screen = pscreen;
 549    pctx->stream_uploader = u_upload_create_default(pctx);
 550    if (!pctx->stream_uploader)
 551       goto fail;
 552    pctx->const_uploader = pctx->stream_uploader;
 553
 554    screen = etna_screen(pscreen);
 555    ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000,
 556                                      &etna_context_force_flush, pctx);
 557    if (ctx->stream == NULL)
 558       goto fail;
 559
 560    ctx->used_resources_read = _mesa_set_create(NULL, _mesa_hash_pointer,
 561                                           _mesa_key_pointer_equal);
 562    if (!ctx->used_resources_read)
 563       goto fail;
 564
 565    ctx->used_resources_write = _mesa_set_create(NULL, _mesa_hash_pointer,
 566                                           _mesa_key_pointer_equal);
 567    if (!ctx->used_resources_write)
 568       goto fail;
 569
 570    mtx_init(&ctx->lock, mtx_recursive);
 571
 572    /* context ctxate setup */
 573    ctx->screen = screen;
 574    /* need some sane default in case gallium frontends don't set some state: */
 575    ctx->sample_mask = 0xffff;
 576
 577    /*  Set sensible defaults for state */
 578    etna_reset_gpu_state(ctx);
 579
 580    ctx->in_fence_fd = -1;
 581
 582    pctx->destroy = etna_context_destroy;
 583    pctx->draw_vbo = etna_draw_vbo;
 584    pctx->flush = etna_flush;
 585    pctx->set_debug_callback = etna_set_debug_callback;
 586    pctx->create_fence_fd = etna_create_fence_fd;
 587    pctx->fence_server_sync = etna_fence_server_sync;
 588    pctx->emit_string_marker = etna_emit_string_marker;
 589
 590    /* creation of compile states */
 591    pctx->create_blend_state = etna_blend_state_create;
 592    pctx->create_rasterizer_state = etna_rasterizer_state_create;
 593    pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
 594
 595    etna_clear_blit_init(pctx);
 596    etna_query_context_init(pctx);
 597    etna_state_init(pctx);
 598    etna_surface_init(pctx);
 599    etna_shader_init(pctx);
 600    etna_texture_init(pctx);
 601    etna_transfer_init(pctx);
 602
 603    ctx->blitter = util_blitter_create(pctx);
 604    if (!ctx->blitter)
 605       goto fail;
 606
 607    /* Generate the bitmask of supported draw primitives. */
 608    ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
 609                          1 << PIPE_PRIM_LINES |
 610                          1 << PIPE_PRIM_LINE_STRIP |
 611                          1 << PIPE_PRIM_TRIANGLES |
 612                          1 << PIPE_PRIM_TRIANGLE_FAN;
 613
 614    /* TODO: The bug relates only to indexed draws, but here we signal
 615     * that there is no support for triangle strips at all. This should
 616     * be refined.
 617     */
 618    if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, BUG_FIXES8))
 619       ctx->prim_hwsupport |= 1 << PIPE_PRIM_TRIANGLE_STRIP;
 620
 621    if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
 622       ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
 623
 624    ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
 625    if (!ctx->primconvert)
 626       goto fail;
 627
 628    slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
 629    list_inithead(&ctx->active_acc_queries);
 630
 631    /* create dummy RT buffer, used when rendering with no color buffer */
 632    ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
 633                                DRM_ETNA_GEM_CACHE_WC);
 634    if (!ctx->dummy_rt)
 635       goto fail;
 636
 637    ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
 638    ctx->dummy_rt_reloc.offset = 0;
 639    ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
 640
 641    if (screen->specs.halti >= 5) {
 642       /* Create an empty dummy texture descriptor */
 643       ctx->dummy_desc_bo = etna_bo_new(ctx->screen->dev, 0x100, DRM_ETNA_GEM_CACHE_WC);
 644       if (!ctx->dummy_desc_bo)
 645          goto fail;
 646       uint32_t *buf = etna_bo_map(ctx->dummy_desc_bo);
 647       etna_bo_cpu_prep(ctx->dummy_desc_bo, DRM_ETNA_PREP_WRITE);
 648       memset(buf, 0, 0x100);
 649       etna_bo_cpu_fini(ctx->dummy_desc_bo);
 650       ctx->DUMMY_DESC_ADDR.bo = ctx->dummy_desc_bo;
 651       ctx->DUMMY_DESC_ADDR.offset = 0;
 652       ctx->DUMMY_DESC_ADDR.flags = ETNA_RELOC_READ;
 653    }
 654
 655    return pctx;
 656
 657 fail:
 658    pctx->destroy(pctx);
 659
 660    return NULL;
 661 }