src/gallium/drivers/etnaviv/etnaviv_context.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  *    Christian Gmeiner <christian.gmeiner@gmail.com>
  26  */
  27
  28 #include "etnaviv_context.h"
  29
  30 #include "etnaviv_blend.h"
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_compiler.h"
  33 #include "etnaviv_debug.h"
  34 #include "etnaviv_emit.h"
  35 #include "etnaviv_fence.h"
  36 #include "etnaviv_query.h"
  37 #include "etnaviv_query_hw.h"
  38 #include "etnaviv_rasterizer.h"
  39 #include "etnaviv_resource.h"
  40 #include "etnaviv_screen.h"
  41 #include "etnaviv_shader.h"
  42 #include "etnaviv_state.h"
  43 #include "etnaviv_surface.h"
  44 #include "etnaviv_texture.h"
  45 #include "etnaviv_transfer.h"
  46 #include "etnaviv_translate.h"
  47 #include "etnaviv_zsa.h"
  48
  49 #include "pipe/p_context.h"
  50 #include "pipe/p_state.h"
  51 #include "util/hash_table.h"
  52 #include "util/u_blitter.h"
  53 #include "util/u_helpers.h"
  54 #include "util/u_memory.h"
  55 #include "util/u_prim.h"
  56 #include "util/u_upload_mgr.h"
  57
  58 #include "hw/common.xml.h"
  59
  60 static void
  61 etna_context_destroy(struct pipe_context *pctx)
  62 {
  63    struct etna_context *ctx = etna_context(pctx);
  64    struct etna_screen *screen = ctx->screen;
  65
  66    if (ctx->used_resources) {
  67       mtx_lock(&screen->lock);
  68
  69       /*
  70        * There should be no resources tracked in the context when it's being
  71        * destroyed. Be sure there are none to avoid memory leaks on buggy
  72        * programs.
  73        */
  74       set_foreach(ctx->used_resources, entry) {
  75          struct etna_resource *rsc = (struct etna_resource *)entry->key;
  76
  77          _mesa_set_remove_key(rsc->pending_ctx, ctx);
  78       }
  79       _mesa_set_destroy(ctx->used_resources, NULL);
  80
  81       mtx_unlock(&screen->lock);
  82    }
  83
  84    if (ctx->dummy_rt)
  85       etna_bo_del(ctx->dummy_rt);
  86
  87    util_copy_framebuffer_state(&ctx->framebuffer_s, NULL);
  88
  89    if (ctx->primconvert)
  90       util_primconvert_destroy(ctx->primconvert);
  91
  92    if (ctx->blitter)
  93       util_blitter_destroy(ctx->blitter);
  94
  95    if (pctx->stream_uploader)
  96       u_upload_destroy(pctx->stream_uploader);
  97
  98    if (ctx->stream)
  99       etna_cmd_stream_del(ctx->stream);
 100
 101    slab_destroy_child(&ctx->transfer_pool);
 102
 103    if (ctx->in_fence_fd != -1)
 104       close(ctx->in_fence_fd);
 105
 106    FREE(pctx);
 107 }
 108
 109 /* Update render state where needed based on draw operation */
 110 static void
 111 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
 112 {
 113    /* Handle primitive restart:
 114     * - If not an indexed draw, we don't care about the state of the primitive restart bit.
 115     * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
 116     *   accordingly
 117     * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
 118     *   primitive restart is enabled and the restart index changed, mark the index
 119     *   buffer state as dirty
 120     */
 121
 122    if (info->index_size) {
 123       uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
 124
 125       if (info->primitive_restart)
 126          new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 127       else
 128          new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 129
 130       if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
 131           (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
 132          ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
 133          ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
 134          ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 135       }
 136    }
 137 }
 138
 139 static bool
 140 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
 141 {
 142    const struct etna_shader_variant *old = ctx->shader.vs;
 143
 144    ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
 145
 146    if (!ctx->shader.vs)
 147       return false;
 148
 149    if (old != ctx->shader.vs)
 150       ctx->dirty |= ETNA_DIRTY_SHADER;
 151
 152    return true;
 153 }
 154
 155 static bool
 156 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
 157 {
 158    const struct etna_shader_variant *old = ctx->shader.fs;
 159
 160    ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
 161
 162    if (!ctx->shader.fs)
 163       return false;
 164
 165    if (old != ctx->shader.fs)
 166       ctx->dirty |= ETNA_DIRTY_SHADER;
 167
 168    return true;
 169 }
 170
 171 static void
 172 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
 173 {
 174    struct etna_context *ctx = etna_context(pctx);
 175    struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
 176    uint32_t draw_mode;
 177    unsigned i;
 178
 179    if (!info->count_from_stream_output && !info->indirect &&
 180        !info->primitive_restart &&
 181        !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
 182       return;
 183
 184    if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
 185       return; /* Nothing to do */
 186
 187    if (!(ctx->prim_hwsupport & (1 << info->mode))) {
 188       struct primconvert_context *primconvert = ctx->primconvert;
 189       util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
 190       util_primconvert_draw_vbo(primconvert, info);
 191       return;
 192    }
 193
 194    int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
 195    if (unlikely(prims <= 0)) {
 196       DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
 197       return;
 198    }
 199
 200    draw_mode = translate_draw_mode(info->mode);
 201    if (draw_mode == ETNA_NO_MATCH) {
 202       BUG("Unsupported draw mode");
 203       return;
 204    }
 205
 206    /* Upload a user index buffer. */
 207    unsigned index_offset = 0;
 208    struct pipe_resource *indexbuf = NULL;
 209
 210    if (info->index_size) {
 211       indexbuf = info->has_user_indices ? NULL : info->index.resource;
 212       if (info->has_user_indices &&
 213           !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset)) {
 214          BUG("Index buffer upload failed.");
 215          return;
 216       }
 217       /* Add start to index offset, when rendering indexed */
 218       index_offset += info->start * info->index_size;
 219
 220       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
 221       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
 222       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
 223       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
 224
 225       if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
 226          BUG("Unsupported or no index buffer");
 227          return;
 228       }
 229    } else {
 230       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
 231       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
 232       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
 233       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
 234    }
 235    ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 236
 237    struct etna_shader_key key = {
 238       .front_ccw = ctx->rasterizer->front_ccw,
 239    };
 240
 241    if (pfb->cbufs[0])
 242       key.frag_rb_swap = !!translate_rs_format_rb_swap(pfb->cbufs[0]->format);
 243
 244    if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
 245       BUG("compiled shaders are not okay");
 246       return;
 247    }
 248
 249    /* Update any derived state */
 250    if (!etna_state_update(ctx))
 251       return;
 252
 253    /*
 254     * Figure out the buffers/features we need:
 255     */
 256    if (etna_depth_enabled(ctx))
 257       resource_written(ctx, pfb->zsbuf->texture);
 258
 259    if (etna_stencil_enabled(ctx))
 260       resource_written(ctx, pfb->zsbuf->texture);
 261
 262    for (i = 0; i < pfb->nr_cbufs; i++) {
 263       struct pipe_resource *surf;
 264
 265       if (!pfb->cbufs[i])
 266          continue;
 267
 268       surf = pfb->cbufs[i]->texture;
 269       resource_written(ctx, surf);
 270    }
 271
 272    /* Mark constant buffers as being read */
 273    resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].buffer);
 274    resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].buffer);
 275
 276    /* Mark VBOs as being read */
 277    foreach_bit(i, ctx->vertex_buffer.enabled_mask) {
 278       assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
 279       resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
 280    }
 281
 282    /* Mark index buffer as being read */
 283    resource_read(ctx, indexbuf);
 284
 285    /* Mark textures as being read */
 286    for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
 287       if (ctx->sampler_view[i]) {
 288           resource_read(ctx, ctx->sampler_view[i]->texture);
 289
 290          /* if texture was modified since the last update,
 291           * we need to clear the texture cache and possibly
 292           * resolve/update ts
 293           */
 294          etna_update_sampler_source(ctx->sampler_view[i], i);
 295       }
 296    }
 297
 298    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 299       resource_written(ctx, hq->prsc);
 300
 301    ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count);
 302    ctx->stats.draw_calls++;
 303
 304    /* Update state for this draw operation */
 305    etna_update_state_for_draw(ctx, info);
 306
 307    /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
 308    etna_emit_state(ctx);
 309
 310    if (ctx->specs.halti >= 2) {
 311       /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
 312       etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
 313          info->count, info->index_size ? info->index_bias : info->start);
 314    } else {
 315       if (info->index_size)
 316          etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
 317       else
 318          etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
 319    }
 320
 321    if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
 322       /* Stall the FE after every draw operation.  This allows better
 323        * debug of GPU hang conditions, as the FE will indicate which
 324        * draw op has caused the hang. */
 325       etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
 326    }
 327
 328    if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
 329       pctx->flush(pctx, NULL, 0);
 330
 331    if (ctx->framebuffer_s.cbufs[0])
 332       etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++;
 333    if (ctx->framebuffer_s.zsbuf)
 334       etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++;
 335    if (info->index_size && indexbuf != info->index.resource)
 336       pipe_resource_reference(&indexbuf, NULL);
 337 }
 338
 339 static void etna_reset_gpu_state(struct etna_context *ctx)
 340 {
 341    struct etna_cmd_stream *stream = ctx->stream;
 342
 343    etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
 344    etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
 345    /* blob sets this to 0x40000031 on GC7000, seems to make no difference,
 346     * but keep it in mind if depth behaves strangely. */
 347    etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x00000031);
 348    etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
 349    etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
 350    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
 351    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
 352    etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
 353    etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
 354    etna_set_state(stream, VIVS_PE_STENCIL_CONFIG_EXT2, 0x00000000);
 355    etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
 356
 357    /* There is no HALTI0 specific state */
 358    if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */
 359       etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
 360    }
 361    if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */
 362       etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
 363    }
 364    if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */
 365       etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
 366    }
 367    if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */
 368       etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
 369                                                   0xffff6fff & 0xfffff6ff & 0xffffff7f);
 370       etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
 371    }
 372    if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */
 373       etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
 374       etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
 375       etna_set_state(stream, VIVS_FE_HALTI5_ID_CONFIG, 0x00000000);
 376       etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
 377       etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
 378       etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
 379    } else { /* Only on pre-HALTI5 */
 380       etna_set_state(stream, VIVS_GL_UNK03834, 0x00000000);
 381       etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
 382       etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
 383    }
 384
 385    if (!ctx->specs.use_blt) {
 386       /* Enable SINGLE_BUFFER for resolve, if supported */
 387       etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
 388    }
 389
 390    ctx->dirty = ~0L;
 391    ctx->dirty_sampler_views = ~0L;
 392 }
 393
 394 static void
 395 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
 396            enum pipe_flush_flags flags)
 397 {
 398    struct etna_context *ctx = etna_context(pctx);
 399    struct etna_screen *screen = ctx->screen;
 400    int out_fence_fd = -1;
 401
 402    mtx_lock(&screen->lock);
 403
 404    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 405       etna_hw_query_suspend(hq, ctx);
 406
 407    etna_cmd_stream_flush(ctx->stream, ctx->in_fence_fd,
 408                           (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd : NULL);
 409
 410    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 411       etna_hw_query_resume(hq, ctx);
 412
 413    if (fence)
 414       *fence = etna_fence_create(pctx, out_fence_fd);
 415
 416    /*
 417    * Go through all _resources_ pending in this _context_ and mark them as
 418    * not pending in this _context_ anymore, since they were just flushed.
 419    */
 420    set_foreach(ctx->used_resources, entry) {
 421       struct etna_resource *rsc = (struct etna_resource *)entry->key;
 422       struct pipe_resource *referenced = &rsc->base;
 423
 424       rsc->status = 0;
 425
 426       _mesa_set_remove_key(rsc->pending_ctx, ctx);
 427
 428       pipe_resource_reference(&referenced, NULL);
 429    }
 430    _mesa_set_clear(ctx->used_resources, NULL);
 431
 432    mtx_unlock(&screen->lock);
 433
 434    etna_reset_gpu_state(ctx);
 435 }
 436
 437 static void
 438 etna_context_force_flush(struct etna_cmd_stream *stream, void *priv)
 439 {
 440    struct pipe_context *pctx = priv;
 441
 442    pctx->flush(pctx, NULL, 0);
 443
 444 }
 445
 446 static void
 447 etna_set_debug_callback(struct pipe_context *pctx,
 448                         const struct pipe_debug_callback *cb)
 449 {
 450    struct etna_context *ctx = etna_context(pctx);
 451
 452    if (cb)
 453       ctx->debug = *cb;
 454    else
 455       memset(&ctx->debug, 0, sizeof(ctx->debug));
 456 }
 457
 458 struct pipe_context *
 459 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
 460 {
 461    struct etna_context *ctx = CALLOC_STRUCT(etna_context);
 462    struct etna_screen *screen;
 463    struct pipe_context *pctx;
 464
 465    if (ctx == NULL)
 466       return NULL;
 467
 468    pctx = &ctx->base;
 469    pctx->priv = ctx;
 470    pctx->screen = pscreen;
 471    pctx->stream_uploader = u_upload_create_default(pctx);
 472    if (!pctx->stream_uploader)
 473       goto fail;
 474    pctx->const_uploader = pctx->stream_uploader;
 475
 476    screen = etna_screen(pscreen);
 477    ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000,
 478                                      &etna_context_force_flush, pctx);
 479    if (ctx->stream == NULL)
 480       goto fail;
 481
 482    ctx->used_resources = _mesa_set_create(NULL, _mesa_hash_pointer,
 483                                           _mesa_key_pointer_equal);
 484    if (!ctx->used_resources)
 485       goto fail;
 486
 487    /* context ctxate setup */
 488    ctx->specs = screen->specs;
 489    ctx->screen = screen;
 490    /* need some sane default in case state tracker doesn't set some state: */
 491    ctx->sample_mask = 0xffff;
 492
 493    /*  Set sensible defaults for state */
 494    etna_reset_gpu_state(ctx);
 495
 496    ctx->in_fence_fd = -1;
 497
 498    pctx->destroy = etna_context_destroy;
 499    pctx->draw_vbo = etna_draw_vbo;
 500    pctx->flush = etna_flush;
 501    pctx->set_debug_callback = etna_set_debug_callback;
 502    pctx->create_fence_fd = etna_create_fence_fd;
 503    pctx->fence_server_sync = etna_fence_server_sync;
 504
 505    /* creation of compile states */
 506    pctx->create_blend_state = etna_blend_state_create;
 507    pctx->create_rasterizer_state = etna_rasterizer_state_create;
 508    pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
 509
 510    etna_clear_blit_init(pctx);
 511    etna_query_context_init(pctx);
 512    etna_state_init(pctx);
 513    etna_surface_init(pctx);
 514    etna_shader_init(pctx);
 515    etna_texture_init(pctx);
 516    etna_transfer_init(pctx);
 517
 518    ctx->blitter = util_blitter_create(pctx);
 519    if (!ctx->blitter)
 520       goto fail;
 521
 522    /* Generate the bitmask of supported draw primitives. */
 523    ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
 524                          1 << PIPE_PRIM_LINES |
 525                          1 << PIPE_PRIM_LINE_STRIP |
 526                          1 << PIPE_PRIM_TRIANGLES |
 527                          1 << PIPE_PRIM_TRIANGLE_FAN;
 528
 529    /* TODO: The bug relates only to indexed draws, but here we signal
 530     * that there is no support for triangle strips at all. This should
 531     * be refined.
 532     */
 533    if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, BUG_FIXES8))
 534       ctx->prim_hwsupport |= 1 << PIPE_PRIM_TRIANGLE_STRIP;
 535
 536    if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
 537       ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
 538
 539    ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
 540    if (!ctx->primconvert)
 541       goto fail;
 542
 543    slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
 544    list_inithead(&ctx->active_hw_queries);
 545
 546    /* create dummy RT buffer, used when rendering with no color buffer */
 547    ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
 548                                DRM_ETNA_GEM_CACHE_WC);
 549    if (!ctx->dummy_rt)
 550       goto fail;
 551
 552    ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
 553    ctx->dummy_rt_reloc.offset = 0;
 554    ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
 555
 556    return pctx;
 557
 558 fail:
 559    pctx->destroy(pctx);
 560
 561    return NULL;
 562 }