etnaviv: Add lock around pending_ctx
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_context.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 * Christian Gmeiner <christian.gmeiner@gmail.com>
26 */
27
28 #include "etnaviv_context.h"
29
30 #include "etnaviv_blend.h"
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_compiler.h"
33 #include "etnaviv_debug.h"
34 #include "etnaviv_emit.h"
35 #include "etnaviv_fence.h"
36 #include "etnaviv_query.h"
37 #include "etnaviv_query_acc.h"
38 #include "etnaviv_rasterizer.h"
39 #include "etnaviv_resource.h"
40 #include "etnaviv_screen.h"
41 #include "etnaviv_shader.h"
42 #include "etnaviv_state.h"
43 #include "etnaviv_surface.h"
44 #include "etnaviv_texture.h"
45 #include "etnaviv_transfer.h"
46 #include "etnaviv_translate.h"
47 #include "etnaviv_zsa.h"
48
49 #include "pipe/p_context.h"
50 #include "pipe/p_state.h"
51 #include "util/hash_table.h"
52 #include "util/u_blitter.h"
53 #include "util/u_helpers.h"
54 #include "util/u_memory.h"
55 #include "util/u_prim.h"
56 #include "util/u_upload_mgr.h"
57
58 #include "hw/common.xml.h"
59
60 static inline void
61 etna_emit_nop_with_data(struct etna_cmd_stream *stream, uint32_t value)
62 {
63 etna_cmd_stream_emit(stream, VIV_FE_NOP_HEADER_OP_NOP);
64 etna_cmd_stream_emit(stream, value);
65 }
66
67 static void
68 etna_emit_string_marker(struct pipe_context *pctx, const char *string, int len)
69 {
70 struct etna_context *ctx = etna_context(pctx);
71 struct etna_cmd_stream *stream = ctx->stream;
72 const uint32_t *buf = (const void *)string;
73
74 etna_cmd_stream_reserve(stream, len * 2);
75
76 while (len >= 4) {
77 etna_emit_nop_with_data(stream, *buf);
78 buf++;
79 len -= 4;
80 }
81
82 /* copy remainder bytes without reading past end of input string */
83 if (len > 0) {
84 uint32_t w = 0;
85 memcpy(&w, buf, len);
86 etna_emit_nop_with_data(stream, w);
87 }
88 }
89
90 static void
91 etna_context_destroy(struct pipe_context *pctx)
92 {
93 struct etna_context *ctx = etna_context(pctx);
94
95 mtx_lock(&ctx->lock);
96
97 if (ctx->used_resources_read) {
98
99 /*
100 * There should be no resources tracked in the context when it's being
101 * destroyed. Be sure there are none to avoid memory leaks on buggy
102 * programs.
103 */
104 set_foreach(ctx->used_resources_read, entry) {
105 struct etna_resource *rsc = (struct etna_resource *)entry->key;
106
107 mtx_lock(&rsc->lock);
108 _mesa_set_remove_key(rsc->pending_ctx, ctx);
109 mtx_unlock(&rsc->lock);
110 }
111 _mesa_set_destroy(ctx->used_resources_read, NULL);
112
113 }
114 if (ctx->used_resources_write) {
115
116 /*
117 * There should be no resources tracked in the context when it's being
118 * destroyed. Be sure there are none to avoid memory leaks on buggy
119 * programs.
120 */
121 set_foreach(ctx->used_resources_write, entry) {
122 struct etna_resource *rsc = (struct etna_resource *)entry->key;
123
124 mtx_lock(&rsc->lock);
125 _mesa_set_remove_key(rsc->pending_ctx, ctx);
126 mtx_unlock(&rsc->lock);
127 }
128 _mesa_set_destroy(ctx->used_resources_write, NULL);
129
130 }
131 mtx_unlock(&ctx->lock);
132
133 if (ctx->dummy_rt)
134 etna_bo_del(ctx->dummy_rt);
135
136 util_copy_framebuffer_state(&ctx->framebuffer_s, NULL);
137
138 if (ctx->primconvert)
139 util_primconvert_destroy(ctx->primconvert);
140
141 if (ctx->blitter)
142 util_blitter_destroy(ctx->blitter);
143
144 if (pctx->stream_uploader)
145 u_upload_destroy(pctx->stream_uploader);
146
147 if (ctx->stream)
148 etna_cmd_stream_del(ctx->stream);
149
150 slab_destroy_child(&ctx->transfer_pool);
151
152 if (ctx->in_fence_fd != -1)
153 close(ctx->in_fence_fd);
154
155 mtx_destroy(&ctx->lock);
156
157 FREE(pctx);
158 }
159
160 /* Update render state where needed based on draw operation */
161 static void
162 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
163 {
164 /* Handle primitive restart:
165 * - If not an indexed draw, we don't care about the state of the primitive restart bit.
166 * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
167 * accordingly
168 * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
169 * primitive restart is enabled and the restart index changed, mark the index
170 * buffer state as dirty
171 */
172
173 if (info->index_size) {
174 uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
175
176 if (info->primitive_restart)
177 new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
178 else
179 new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
180
181 if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
182 (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
183 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
184 ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
185 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
186 }
187 }
188 }
189
190 static bool
191 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
192 {
193 const struct etna_shader_variant *old = ctx->shader.vs;
194
195 ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
196
197 if (!ctx->shader.vs)
198 return false;
199
200 if (old != ctx->shader.vs)
201 ctx->dirty |= ETNA_DIRTY_SHADER;
202
203 return true;
204 }
205
206 static bool
207 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
208 {
209 const struct etna_shader_variant *old = ctx->shader.fs;
210
211 ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
212
213 if (!ctx->shader.fs)
214 return false;
215
216 if (old != ctx->shader.fs)
217 ctx->dirty |= ETNA_DIRTY_SHADER;
218
219 return true;
220 }
221
222 static void
223 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
224 {
225 struct etna_context *ctx = etna_context(pctx);
226 struct etna_screen *screen = ctx->screen;
227 struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
228 uint32_t draw_mode;
229 unsigned i;
230
231 if (!info->count_from_stream_output && !info->indirect &&
232 !info->primitive_restart &&
233 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
234 return;
235
236 if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
237 return; /* Nothing to do */
238
239 if (!(ctx->prim_hwsupport & (1 << info->mode))) {
240 struct primconvert_context *primconvert = ctx->primconvert;
241 util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
242 util_primconvert_draw_vbo(primconvert, info);
243 return;
244 }
245
246 int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
247 if (unlikely(prims <= 0)) {
248 DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
249 return;
250 }
251
252 draw_mode = translate_draw_mode(info->mode);
253 if (draw_mode == ETNA_NO_MATCH) {
254 BUG("Unsupported draw mode");
255 return;
256 }
257
258 /* Upload a user index buffer. */
259 unsigned index_offset = 0;
260 struct pipe_resource *indexbuf = NULL;
261
262 if (info->index_size) {
263 indexbuf = info->has_user_indices ? NULL : info->index.resource;
264 if (info->has_user_indices &&
265 !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset, 4)) {
266 BUG("Index buffer upload failed.");
267 return;
268 }
269 /* Add start to index offset, when rendering indexed */
270 index_offset += info->start * info->index_size;
271
272 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
273 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
274 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
275 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
276
277 if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
278 BUG("Unsupported or no index buffer");
279 return;
280 }
281 } else {
282 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
283 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
284 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
285 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
286 }
287 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
288
289 struct etna_shader_key key = {
290 .front_ccw = ctx->rasterizer->front_ccw,
291 };
292
293 if (pfb->cbufs[0])
294 key.frag_rb_swap = !!translate_pe_format_rb_swap(pfb->cbufs[0]->format);
295
296 if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
297 BUG("compiled shaders are not okay");
298 return;
299 }
300
301 /* Update any derived state */
302 if (!etna_state_update(ctx))
303 return;
304
305 mtx_lock(&ctx->lock);
306
307 /*
308 * Figure out the buffers/features we need:
309 */
310 if (etna_depth_enabled(ctx))
311 resource_written(ctx, pfb->zsbuf->texture);
312
313 if (etna_stencil_enabled(ctx))
314 resource_written(ctx, pfb->zsbuf->texture);
315
316 for (i = 0; i < pfb->nr_cbufs; i++) {
317 struct pipe_resource *surf;
318
319 if (!pfb->cbufs[i])
320 continue;
321
322 surf = pfb->cbufs[i]->texture;
323 resource_written(ctx, surf);
324 }
325
326 /* Mark constant buffers as being read */
327 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask)
328 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb[i].buffer);
329
330 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask)
331 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer);
332
333 /* Mark VBOs as being read */
334 foreach_bit(i, ctx->vertex_buffer.enabled_mask) {
335 assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
336 resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
337 }
338
339 /* Mark index buffer as being read */
340 resource_read(ctx, indexbuf);
341
342 /* Mark textures as being read */
343 for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
344 if (ctx->sampler_view[i]) {
345 resource_read(ctx, ctx->sampler_view[i]->texture);
346
347 /* if texture was modified since the last update,
348 * we need to clear the texture cache and possibly
349 * resolve/update ts
350 */
351 etna_update_sampler_source(ctx->sampler_view[i], i);
352 }
353 }
354
355 ctx->stats.prims_generated += u_reduced_prims_for_vertices(info->mode, info->count);
356 ctx->stats.draw_calls++;
357
358 /* Update state for this draw operation */
359 etna_update_state_for_draw(ctx, info);
360
361 /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
362 etna_emit_state(ctx);
363
364 if (screen->specs.halti >= 2) {
365 /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
366 etna_draw_instanced(ctx->stream, info->index_size, draw_mode, info->instance_count,
367 info->count, info->index_size ? info->index_bias : info->start);
368 } else {
369 if (info->index_size)
370 etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
371 else
372 etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
373 }
374
375 if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
376 /* Stall the FE after every draw operation. This allows better
377 * debug of GPU hang conditions, as the FE will indicate which
378 * draw op has caused the hang. */
379 etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
380 }
381 mtx_unlock(&ctx->lock);
382
383 if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
384 pctx->flush(pctx, NULL, 0);
385
386 if (ctx->framebuffer_s.cbufs[0])
387 etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++;
388 if (ctx->framebuffer_s.zsbuf)
389 etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++;
390 if (info->index_size && indexbuf != info->index.resource)
391 pipe_resource_reference(&indexbuf, NULL);
392 }
393
394 static void
395 etna_reset_gpu_state(struct etna_context *ctx)
396 {
397 struct etna_cmd_stream *stream = ctx->stream;
398 struct etna_screen *screen = ctx->screen;
399
400 etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
401 etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
402 etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
403 etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
404 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
405 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
406 etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
407 etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
408 etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
409
410 /* There is no HALTI0 specific state */
411 if (screen->specs.halti >= 1) { /* Only on HALTI1+ */
412 etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
413 }
414 if (screen->specs.halti >= 2) { /* Only on HALTI2+ */
415 etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
416 }
417 if (screen->specs.halti >= 3) { /* Only on HALTI3+ */
418 etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
419 }
420 if (screen->specs.halti >= 4) { /* Only on HALTI4+ */
421 etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
422 0xffff6fff & 0xfffff6ff & 0xffffff7f);
423 etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
424 }
425 if (screen->specs.halti >= 5) { /* Only on HALTI5+ */
426 etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
427 etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
428 etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
429 etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
430 etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
431 } else { /* Only on pre-HALTI5 */
432 etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
433 etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
434 }
435
436 if (!screen->specs.use_blt) {
437 /* Enable SINGLE_BUFFER for resolve, if supported */
438 etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
439 }
440
441 if (screen->specs.halti >= 5) {
442 /* TXDESC cache flush - do this once at the beginning, as texture
443 * descriptors are only written by the CPU once, then patched by the kernel
444 * before command stream submission. It does not need flushing if the
445 * referenced image data changes.
446 */
447 etna_set_state(stream, VIVS_NTE_DESCRIPTOR_FLUSH, 0);
448 etna_set_state(stream, VIVS_GL_FLUSH_CACHE,
449 VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK12 |
450 VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK13);
451
452 /* Icache invalidate (should do this on shader change?) */
453 etna_set_state(stream, VIVS_VS_ICACHE_INVALIDATE,
454 VIVS_VS_ICACHE_INVALIDATE_UNK0 | VIVS_VS_ICACHE_INVALIDATE_UNK1 |
455 VIVS_VS_ICACHE_INVALIDATE_UNK2 | VIVS_VS_ICACHE_INVALIDATE_UNK3 |
456 VIVS_VS_ICACHE_INVALIDATE_UNK4);
457 }
458
459 ctx->dirty = ~0L;
460 ctx->dirty_sampler_views = ~0L;
461 }
462
463 static void
464 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
465 enum pipe_flush_flags flags)
466 {
467 struct etna_context *ctx = etna_context(pctx);
468 int out_fence_fd = -1;
469
470 mtx_lock(&ctx->lock);
471
472 list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node)
473 etna_acc_query_suspend(aq, ctx);
474
475 etna_cmd_stream_flush(ctx->stream, ctx->in_fence_fd,
476 (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd : NULL);
477
478 list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node)
479 etna_acc_query_resume(aq, ctx);
480
481 if (fence)
482 *fence = etna_fence_create(pctx, out_fence_fd);
483
484 /*
485 * Go through all _resources_ pending in this _context_ and mark them as
486 * not pending in this _context_ anymore, since they were just flushed.
487 */
488 set_foreach(ctx->used_resources_read, entry) {
489 struct etna_resource *rsc = (struct etna_resource *)entry->key;
490 struct pipe_resource *referenced = &rsc->base;
491
492 mtx_lock(&rsc->lock);
493
494 _mesa_set_remove_key(rsc->pending_ctx, ctx);
495
496 /* if resource has no pending ctx's reset its status */
497 if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
498 rsc->status &= ~ETNA_PENDING_READ;
499
500 mtx_unlock(&rsc->lock);
501
502 pipe_resource_reference(&referenced, NULL);
503 }
504 _mesa_set_clear(ctx->used_resources_read, NULL);
505
506 set_foreach(ctx->used_resources_write, entry) {
507 struct etna_resource *rsc = (struct etna_resource *)entry->key;
508 struct pipe_resource *referenced = &rsc->base;
509
510 mtx_lock(&rsc->lock);
511 _mesa_set_remove_key(rsc->pending_ctx, ctx);
512
513 /* if resource has no pending ctx's reset its status */
514 if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
515 rsc->status &= ~ETNA_PENDING_WRITE;
516 mtx_unlock(&rsc->lock);
517
518 pipe_resource_reference(&referenced, NULL);
519 }
520 _mesa_set_clear(ctx->used_resources_write, NULL);
521
522 etna_reset_gpu_state(ctx);
523 mtx_unlock(&ctx->lock);
524 }
525
526 static void
527 etna_context_force_flush(struct etna_cmd_stream *stream, void *priv)
528 {
529 struct pipe_context *pctx = priv;
530
531 pctx->flush(pctx, NULL, 0);
532
533 }
534
535 static void
536 etna_set_debug_callback(struct pipe_context *pctx,
537 const struct pipe_debug_callback *cb)
538 {
539 struct etna_context *ctx = etna_context(pctx);
540
541 if (cb)
542 ctx->debug = *cb;
543 else
544 memset(&ctx->debug, 0, sizeof(ctx->debug));
545 }
546
547 struct pipe_context *
548 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
549 {
550 struct etna_context *ctx = CALLOC_STRUCT(etna_context);
551 struct etna_screen *screen;
552 struct pipe_context *pctx;
553
554 if (ctx == NULL)
555 return NULL;
556
557 pctx = &ctx->base;
558 pctx->priv = ctx;
559 pctx->screen = pscreen;
560 pctx->stream_uploader = u_upload_create_default(pctx);
561 if (!pctx->stream_uploader)
562 goto fail;
563 pctx->const_uploader = pctx->stream_uploader;
564
565 screen = etna_screen(pscreen);
566 ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000,
567 &etna_context_force_flush, pctx);
568 if (ctx->stream == NULL)
569 goto fail;
570
571 ctx->used_resources_read = _mesa_set_create(NULL, _mesa_hash_pointer,
572 _mesa_key_pointer_equal);
573 if (!ctx->used_resources_read)
574 goto fail;
575
576 ctx->used_resources_write = _mesa_set_create(NULL, _mesa_hash_pointer,
577 _mesa_key_pointer_equal);
578 if (!ctx->used_resources_write)
579 goto fail;
580
581 mtx_init(&ctx->lock, mtx_recursive);
582
583 /* context ctxate setup */
584 ctx->screen = screen;
585 /* need some sane default in case gallium frontends don't set some state: */
586 ctx->sample_mask = 0xffff;
587
588 /* Set sensible defaults for state */
589 etna_reset_gpu_state(ctx);
590
591 ctx->in_fence_fd = -1;
592
593 pctx->destroy = etna_context_destroy;
594 pctx->draw_vbo = etna_draw_vbo;
595 pctx->flush = etna_flush;
596 pctx->set_debug_callback = etna_set_debug_callback;
597 pctx->create_fence_fd = etna_create_fence_fd;
598 pctx->fence_server_sync = etna_fence_server_sync;
599 pctx->emit_string_marker = etna_emit_string_marker;
600
601 /* creation of compile states */
602 pctx->create_blend_state = etna_blend_state_create;
603 pctx->create_rasterizer_state = etna_rasterizer_state_create;
604 pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
605
606 etna_clear_blit_init(pctx);
607 etna_query_context_init(pctx);
608 etna_state_init(pctx);
609 etna_surface_init(pctx);
610 etna_shader_init(pctx);
611 etna_texture_init(pctx);
612 etna_transfer_init(pctx);
613
614 ctx->blitter = util_blitter_create(pctx);
615 if (!ctx->blitter)
616 goto fail;
617
618 /* Generate the bitmask of supported draw primitives. */
619 ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
620 1 << PIPE_PRIM_LINES |
621 1 << PIPE_PRIM_LINE_STRIP |
622 1 << PIPE_PRIM_TRIANGLES |
623 1 << PIPE_PRIM_TRIANGLE_FAN;
624
625 /* TODO: The bug relates only to indexed draws, but here we signal
626 * that there is no support for triangle strips at all. This should
627 * be refined.
628 */
629 if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, BUG_FIXES8))
630 ctx->prim_hwsupport |= 1 << PIPE_PRIM_TRIANGLE_STRIP;
631
632 if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
633 ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
634
635 ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
636 if (!ctx->primconvert)
637 goto fail;
638
639 slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
640 list_inithead(&ctx->active_acc_queries);
641
642 /* create dummy RT buffer, used when rendering with no color buffer */
643 ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
644 DRM_ETNA_GEM_CACHE_WC);
645 if (!ctx->dummy_rt)
646 goto fail;
647
648 ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
649 ctx->dummy_rt_reloc.offset = 0;
650 ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
651
652 if (screen->specs.halti >= 5) {
653 /* Create an empty dummy texture descriptor */
654 ctx->dummy_desc_bo = etna_bo_new(ctx->screen->dev, 0x100, DRM_ETNA_GEM_CACHE_WC);
655 if (!ctx->dummy_desc_bo)
656 goto fail;
657 uint32_t *buf = etna_bo_map(ctx->dummy_desc_bo);
658 etna_bo_cpu_prep(ctx->dummy_desc_bo, DRM_ETNA_PREP_WRITE);
659 memset(buf, 0, 0x100);
660 etna_bo_cpu_fini(ctx->dummy_desc_bo);
661 ctx->DUMMY_DESC_ADDR.bo = ctx->dummy_desc_bo;
662 ctx->DUMMY_DESC_ADDR.offset = 0;
663 ctx->DUMMY_DESC_ADDR.flags = ETNA_RELOC_READ;
664 }
665
666 return pctx;
667
668 fail:
669 pctx->destroy(pctx);
670
671 return NULL;
672 }