src/gallium/drivers/etnaviv/etnaviv_context.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  *    Christian Gmeiner <christian.gmeiner@gmail.com>
  26  */
  27
  28 #include "etnaviv_context.h"
  29
  30 #include "etnaviv_blend.h"
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_compiler.h"
  33 #include "etnaviv_debug.h"
  34 #include "etnaviv_emit.h"
  35 #include "etnaviv_fence.h"
  36 #include "etnaviv_query.h"
  37 #include "etnaviv_query_hw.h"
  38 #include "etnaviv_rasterizer.h"
  39 #include "etnaviv_screen.h"
  40 #include "etnaviv_shader.h"
  41 #include "etnaviv_state.h"
  42 #include "etnaviv_surface.h"
  43 #include "etnaviv_texture.h"
  44 #include "etnaviv_transfer.h"
  45 #include "etnaviv_translate.h"
  46 #include "etnaviv_zsa.h"
  47
  48 #include "pipe/p_context.h"
  49 #include "pipe/p_state.h"
  50 #include "util/u_blitter.h"
  51 #include "util/u_helpers.h"
  52 #include "util/u_memory.h"
  53 #include "util/u_prim.h"
  54 #include "util/u_upload_mgr.h"
  55
  56 #include "hw/common.xml.h"
  57
  58 static void
  59 etna_context_destroy(struct pipe_context *pctx)
  60 {
  61    struct etna_context *ctx = etna_context(pctx);
  62
  63    if (ctx->primconvert)
  64       util_primconvert_destroy(ctx->primconvert);
  65
  66    if (ctx->blitter)
  67       util_blitter_destroy(ctx->blitter);
  68
  69    if (pctx->stream_uploader)
  70       u_upload_destroy(pctx->stream_uploader);
  71
  72    if (ctx->stream)
  73       etna_cmd_stream_del(ctx->stream);
  74
  75    slab_destroy_child(&ctx->transfer_pool);
  76
  77    if (ctx->in_fence_fd != -1)
  78       close(ctx->in_fence_fd);
  79
  80    FREE(pctx);
  81 }
  82
  83 /* Update render state where needed based on draw operation */
  84 static void
  85 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
  86 {
  87    /* Handle primitive restart:
  88     * - If not an indexed draw, we don't care about the state of the primitive restart bit.
  89     * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
  90     *   accordingly
  91     * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
  92     *   primitive restart is enabled and the restart index changed, mark the index
  93     *   buffer state as dirty
  94     */
  95
  96    if (info->index_size) {
  97       uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
  98
  99       if (info->primitive_restart)
 100          new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 101       else
 102          new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
 103
 104       if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
 105           (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
 106          ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
 107          ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
 108          ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 109       }
 110    }
 111 }
 112
 113 static bool
 114 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
 115 {
 116    const struct etna_shader_variant *old = ctx->shader.vs;
 117
 118    ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
 119
 120    if (!ctx->shader.vs)
 121       return false;
 122
 123    if (old != ctx->shader.vs)
 124       ctx->dirty |= ETNA_DIRTY_SHADER;
 125
 126    return true;
 127 }
 128
 129 static bool
 130 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
 131 {
 132    const struct etna_shader_variant *old = ctx->shader.fs;
 133
 134    ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
 135
 136    if (!ctx->shader.fs)
 137       return false;
 138
 139    if (old != ctx->shader.fs)
 140       ctx->dirty |= ETNA_DIRTY_SHADER;
 141
 142    return true;
 143 }
 144
 145 static void
 146 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
 147 {
 148    struct etna_context *ctx = etna_context(pctx);
 149    struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
 150    uint32_t draw_mode;
 151    unsigned i;
 152
 153    if (!info->count_from_stream_output && !info->indirect &&
 154        !info->primitive_restart &&
 155        !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
 156       return;
 157
 158    if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
 159       return; /* Nothing to do */
 160
 161    if (!(ctx->prim_hwsupport & (1 << info->mode))) {
 162       struct primconvert_context *primconvert = ctx->primconvert;
 163       util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
 164       util_primconvert_draw_vbo(primconvert, info);
 165       return;
 166    }
 167
 168    int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
 169    if (unlikely(prims <= 0)) {
 170       DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
 171       return;
 172    }
 173
 174    draw_mode = translate_draw_mode(info->mode);
 175    if (draw_mode == ETNA_NO_MATCH) {
 176       BUG("Unsupported draw mode");
 177       return;
 178    }
 179
 180    /* Upload a user index buffer. */
 181    unsigned index_offset = 0;
 182    struct pipe_resource *indexbuf = NULL;
 183
 184    if (info->index_size) {
 185       indexbuf = info->has_user_indices ? NULL : info->index.resource;
 186       if (info->has_user_indices &&
 187           !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset)) {
 188          BUG("Index buffer upload failed.");
 189          return;
 190       }
 191       /* Add start to index offset, when rendering indexed */
 192       index_offset += info->start * info->index_size;
 193
 194       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
 195       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
 196       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
 197       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
 198
 199       if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
 200          BUG("Unsupported or no index buffer");
 201          return;
 202       }
 203    } else {
 204       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
 205       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
 206       ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
 207       ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
 208    }
 209    ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
 210
 211    struct etna_shader_key key = {};
 212    struct etna_surface *cbuf = etna_surface(pfb->cbufs[0]);
 213
 214    if (cbuf) {
 215       struct etna_resource *res = etna_resource(cbuf->base.texture);
 216
 217       key.frag_rb_swap = !!translate_rs_format_rb_swap(res->base.format);
 218    }
 219
 220    if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
 221       BUG("compiled shaders are not okay");
 222       return;
 223    }
 224
 225    /* Update any derived state */
 226    if (!etna_state_update(ctx))
 227       return;
 228
 229    /*
 230     * Figure out the buffers/features we need:
 231     */
 232    if (etna_depth_enabled(ctx))
 233       resource_written(ctx, pfb->zsbuf->texture);
 234
 235    if (etna_stencil_enabled(ctx))
 236       resource_written(ctx, pfb->zsbuf->texture);
 237
 238    for (i = 0; i < pfb->nr_cbufs; i++) {
 239       struct pipe_resource *surf;
 240
 241       if (!pfb->cbufs[i])
 242          continue;
 243
 244       surf = pfb->cbufs[i]->texture;
 245       resource_written(ctx, surf);
 246    }
 247
 248    /* Mark constant buffers as being read */
 249    resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].buffer);
 250    resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].buffer);
 251
 252    /* Mark VBOs as being read */
 253    for (i = 0; i < ctx->vertex_buffer.count; i++) {
 254       assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
 255       resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
 256    }
 257
 258    /* Mark index buffer as being read */
 259    resource_read(ctx, indexbuf);
 260
 261    /* Mark textures as being read */
 262    for (i = 0; i < PIPE_MAX_SAMPLERS; i++)
 263       if (ctx->sampler_view[i])
 264          resource_read(ctx, ctx->sampler_view[i]->texture);
 265
 266    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 267       resource_written(ctx, hq->prsc);
 268
 269    ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count);
 270    ctx->stats.draw_calls++;
 271
 272    /* Update state for this draw operation */
 273    etna_update_state_for_draw(ctx, info);
 274
 275    /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
 276    etna_emit_state(ctx);
 277
 278    if (ctx->specs.halti >= 2) {
 279       /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
 280       etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
 281          info->count, info->index_size ? info->index_bias : info->start);
 282    } else {
 283       if (info->index_size)
 284          etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
 285       else
 286          etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
 287    }
 288
 289    if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
 290       /* Stall the FE after every draw operation.  This allows better
 291        * debug of GPU hang conditions, as the FE will indicate which
 292        * draw op has caused the hang. */
 293       etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
 294    }
 295
 296    if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
 297       pctx->flush(pctx, NULL, 0);
 298
 299    if (ctx->framebuffer.cbuf)
 300       etna_resource(ctx->framebuffer.cbuf->texture)->seqno++;
 301    if (ctx->framebuffer.zsbuf)
 302       etna_resource(ctx->framebuffer.zsbuf->texture)->seqno++;
 303    if (info->index_size && indexbuf != info->index.resource)
 304       pipe_resource_reference(&indexbuf, NULL);
 305 }
 306
 307 static void
 308 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
 309            enum pipe_flush_flags flags)
 310 {
 311    struct etna_context *ctx = etna_context(pctx);
 312    int out_fence_fd = -1;
 313
 314    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 315       etna_hw_query_suspend(hq, ctx);
 316
 317    etna_cmd_stream_flush2(ctx->stream, ctx->in_fence_fd,
 318                           (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd :
 319                           NULL);
 320
 321    list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
 322       etna_hw_query_resume(hq, ctx);
 323
 324    if (fence)
 325       *fence = etna_fence_create(pctx, out_fence_fd);
 326 }
 327
 328 static void
 329 etna_cmd_stream_reset_notify(struct etna_cmd_stream *stream, void *priv)
 330 {
 331    struct etna_context *ctx = priv;
 332    struct etna_resource *rsc, *rsc_tmp;
 333
 334    etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
 335    etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
 336    /* blob sets this to 0x40000031 on GC7000, seems to make no difference,
 337     * but keep it in mind if depth behaves strangely. */
 338    etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x00000031);
 339    etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
 340    etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
 341    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
 342    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
 343    etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
 344    etna_set_state(stream, VIVS_PE_ALPHA_COLOR_EXT0, 0x00000000);
 345    etna_set_state(stream, VIVS_PE_ALPHA_COLOR_EXT1, 0x00000000);
 346    etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
 347    etna_set_state(stream, VIVS_PE_STENCIL_CONFIG_EXT2, 0x00000000);
 348    etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
 349
 350    /* There is no HALTI0 specific state */
 351    if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */
 352       etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
 353    }
 354    if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */
 355       etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
 356    }
 357    if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */
 358       etna_set_state(stream, VIVS_PE_MEM_CONFIG, 0x00000000); /* TODO: cache modes */
 359       etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
 360    }
 361    if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */
 362       etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
 363                                                   0xffff6fff & 0xfffff6ff & 0xffffff7f);
 364       etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
 365    }
 366    if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */
 367       etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
 368       etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
 369       etna_set_state(stream, VIVS_FE_HALTI5_UNK007C4, 0x00000000);
 370       etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
 371       etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
 372       etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
 373    } else { /* Only on pre-HALTI5 */
 374       etna_set_state(stream, VIVS_GL_UNK03834, 0x00000000);
 375       etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
 376       etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
 377    }
 378
 379    if (!ctx->specs.use_blt) {
 380       /* Enable SINGLE_BUFFER for resolve, if supported */
 381       etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
 382    }
 383
 384    ctx->dirty = ~0L;
 385    ctx->dirty_sampler_views = ~0L;
 386
 387    /* go through all the used resources and clear their status flag */
 388    LIST_FOR_EACH_ENTRY_SAFE(rsc, rsc_tmp, &ctx->used_resources, list)
 389    {
 390       debug_assert(rsc->status != 0);
 391       rsc->status = 0;
 392       rsc->pending_ctx = NULL;
 393       list_delinit(&rsc->list);
 394    }
 395
 396    assert(LIST_IS_EMPTY(&ctx->used_resources));
 397 }
 398
 399 static void
 400 etna_set_debug_callback(struct pipe_context *pctx,
 401                         const struct pipe_debug_callback *cb)
 402 {
 403    struct etna_context *ctx = etna_context(pctx);
 404
 405    if (cb)
 406       ctx->debug = *cb;
 407    else
 408       memset(&ctx->debug, 0, sizeof(ctx->debug));
 409 }
 410
 411 struct pipe_context *
 412 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
 413 {
 414    struct etna_context *ctx = CALLOC_STRUCT(etna_context);
 415    struct etna_screen *screen;
 416    struct pipe_context *pctx;
 417
 418    if (ctx == NULL)
 419       return NULL;
 420
 421    pctx = &ctx->base;
 422    pctx->priv = ctx;
 423    pctx->screen = pscreen;
 424    pctx->stream_uploader = u_upload_create_default(pctx);
 425    if (!pctx->stream_uploader)
 426       goto fail;
 427    pctx->const_uploader = pctx->stream_uploader;
 428
 429    screen = etna_screen(pscreen);
 430    ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000, &etna_cmd_stream_reset_notify, ctx);
 431    if (ctx->stream == NULL)
 432       goto fail;
 433
 434    /* context ctxate setup */
 435    ctx->specs = screen->specs;
 436    ctx->screen = screen;
 437    /* need some sane default in case state tracker doesn't set some state: */
 438    ctx->sample_mask = 0xffff;
 439
 440    list_inithead(&ctx->used_resources);
 441
 442    /*  Set sensible defaults for state */
 443    etna_cmd_stream_reset_notify(ctx->stream, ctx);
 444
 445    ctx->in_fence_fd = -1;
 446
 447    pctx->destroy = etna_context_destroy;
 448    pctx->draw_vbo = etna_draw_vbo;
 449    pctx->flush = etna_flush;
 450    pctx->set_debug_callback = etna_set_debug_callback;
 451    pctx->create_fence_fd = etna_create_fence_fd;
 452    pctx->fence_server_sync = etna_fence_server_sync;
 453
 454    /* creation of compile states */
 455    pctx->create_blend_state = etna_blend_state_create;
 456    pctx->create_rasterizer_state = etna_rasterizer_state_create;
 457    pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
 458
 459    etna_clear_blit_init(pctx);
 460    etna_query_context_init(pctx);
 461    etna_state_init(pctx);
 462    etna_surface_init(pctx);
 463    etna_shader_init(pctx);
 464    etna_texture_init(pctx);
 465    etna_transfer_init(pctx);
 466
 467    ctx->blitter = util_blitter_create(pctx);
 468    if (!ctx->blitter)
 469       goto fail;
 470
 471    /* Generate the bitmask of supported draw primitives. */
 472    ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
 473                          1 << PIPE_PRIM_LINES |
 474                          1 << PIPE_PRIM_LINE_STRIP |
 475                          1 << PIPE_PRIM_TRIANGLES |
 476                          1 << PIPE_PRIM_TRIANGLE_STRIP |
 477                          1 << PIPE_PRIM_TRIANGLE_FAN;
 478
 479    if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
 480       ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
 481
 482    ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
 483    if (!ctx->primconvert)
 484       goto fail;
 485
 486    slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
 487    list_inithead(&ctx->active_hw_queries);
 488
 489    return pctx;
 490
 491 fail:
 492    pctx->destroy(pctx);
 493
 494    return NULL;
 495 }