21943140f080b4f63c667cefeab5821bc6d58abb
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_resource.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
35
36 #include "util/hash_table.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39
40 #include "drm-uapi/drm_fourcc.h"
41
42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
43 {
44 switch (modifier) {
45 case DRM_FORMAT_MOD_VIVANTE_TILED:
46 return ETNA_LAYOUT_TILED;
47 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
48 return ETNA_LAYOUT_SUPER_TILED;
49 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
50 return ETNA_LAYOUT_MULTI_TILED;
51 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
52 return ETNA_LAYOUT_MULTI_SUPERTILED;
53 case DRM_FORMAT_MOD_LINEAR:
54 default:
55 return ETNA_LAYOUT_LINEAR;
56 }
57 }
58
59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
60 {
61 switch (layout) {
62 case ETNA_LAYOUT_TILED:
63 return DRM_FORMAT_MOD_VIVANTE_TILED;
64 case ETNA_LAYOUT_SUPER_TILED:
65 return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
66 case ETNA_LAYOUT_MULTI_TILED:
67 return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
68 case ETNA_LAYOUT_MULTI_SUPERTILED:
69 return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
70 case ETNA_LAYOUT_LINEAR:
71 return DRM_FORMAT_MOD_LINEAR;
72 default:
73 return DRM_FORMAT_MOD_INVALID;
74 }
75 }
76
77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
78 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
79 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
80 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
81 */
82 bool
83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
84 struct etna_resource *rsc)
85 {
86 struct etna_screen *screen = etna_screen(pscreen);
87 size_t rt_ts_size, ts_layer_stride;
88 size_t ts_bits_per_tile, bytes_per_tile;
89 uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
90 int8_t ts_compress_fmt;
91
92 assert(!rsc->ts_bo);
93
94 /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
95 * v4 compression can be enabled everywhere without any known drawback,
96 * except that in-place resolve must go through a slower path
97 */
98 ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
99 translate_ts_format(rsc->base.format) : -1;
100
101 if (screen->specs.halti >= 5) {
102 /* enable 256B ts mode with compression, as it improves performance
103 * the size of the resource might also determine if we want to use it or not
104 */
105 if (ts_compress_fmt >= 0)
106 ts_mode = TS_MODE_256B;
107
108 ts_bits_per_tile = 4;
109 bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
110 } else {
111 ts_bits_per_tile = screen->specs.bits_per_tile;
112 bytes_per_tile = 64;
113 }
114
115 ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
116 bytes_per_tile * 8 / ts_bits_per_tile),
117 0x100 * screen->specs.pixel_pipes);
118 rt_ts_size = ts_layer_stride * rsc->base.array_size;
119 if (rt_ts_size == 0)
120 return true;
121
122 DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
123 rsc, rt_ts_size);
124
125 struct etna_bo *rt_ts;
126 rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
127
128 if (unlikely(!rt_ts)) {
129 BUG("Problem allocating tile status for resource");
130 return false;
131 }
132
133 rsc->ts_bo = rt_ts;
134 rsc->levels[0].ts_offset = 0;
135 rsc->levels[0].ts_layer_stride = ts_layer_stride;
136 rsc->levels[0].ts_size = rt_ts_size;
137 rsc->levels[0].ts_mode = ts_mode;
138 rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
139
140 return true;
141 }
142
143 static bool
144 etna_screen_can_create_resource(struct pipe_screen *pscreen,
145 const struct pipe_resource *templat)
146 {
147 struct etna_screen *screen = etna_screen(pscreen);
148 if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
149 return false;
150
151 /* templat->bind is not set here, so we must use the minimum sizes */
152 uint max_size =
153 MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
154
155 if (templat->width0 > max_size || templat->height0 > max_size)
156 return false;
157
158 return true;
159 }
160
161 static unsigned
162 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
163 unsigned msaa_xscale, unsigned msaa_yscale)
164 {
165 struct pipe_resource *prsc = &rsc->base;
166 unsigned level, size = 0;
167 unsigned width = prsc->width0;
168 unsigned height = prsc->height0;
169 unsigned depth = prsc->depth0;
170
171 for (level = 0; level <= prsc->last_level; level++) {
172 struct etna_resource_level *mip = &rsc->levels[level];
173
174 mip->width = width;
175 mip->height = height;
176 mip->depth = depth;
177 mip->padded_width = align(width * msaa_xscale, paddingX);
178 mip->padded_height = align(height * msaa_yscale, paddingY);
179 mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
180 mip->offset = size;
181 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
182 mip->size = prsc->array_size * mip->layer_stride;
183
184 /* align levels to 64 bytes to be able to render to them */
185 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
186
187 width = u_minify(width, 1);
188 height = u_minify(height, 1);
189 depth = u_minify(depth, 1);
190 }
191
192 return size;
193 }
194
195 /* Is rs alignment needed? */
196 static bool is_rs_align(struct etna_screen *screen,
197 const struct pipe_resource *tmpl)
198 {
199 return screen->specs.use_blt ? false : (
200 VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
201 !etna_resource_sampler_only(tmpl));
202 }
203
204 /* Create a new resource object, using the given template info */
205 struct pipe_resource *
206 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
207 uint64_t modifier, const struct pipe_resource *templat)
208 {
209 struct etna_screen *screen = etna_screen(pscreen);
210 struct etna_resource *rsc;
211 unsigned size;
212
213 DBG_F(ETNA_DBG_RESOURCE_MSGS,
214 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
215 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
216 templat->target, util_format_name(templat->format), templat->width0,
217 templat->height0, templat->depth0, templat->array_size,
218 templat->last_level, templat->nr_samples, templat->usage,
219 templat->bind, templat->flags);
220
221 /* Determine scaling for antialiasing, allow override using debug flag */
222 int nr_samples = templat->nr_samples;
223 if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
224 !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
225 if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
226 nr_samples = 2;
227 if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
228 nr_samples = 4;
229 }
230
231 int msaa_xscale = 1, msaa_yscale = 1;
232 if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
233 /* Number of samples not supported */
234 return NULL;
235 }
236
237 /* Determine needed padding (alignment of height/width) */
238 unsigned paddingX = 0, paddingY = 0;
239 unsigned halign = TEXTURE_HALIGN_FOUR;
240 if (!util_format_is_compressed(templat->format)) {
241 /* If we have the TEXTURE_HALIGN feature, we can always align to the
242 * resolve engine's width. If not, we must not align resources used
243 * only for textures. If this GPU uses the BLT engine, never do RS align.
244 */
245 etna_layout_multiple(layout, screen->specs.pixel_pipes,
246 is_rs_align (screen, templat),
247 &paddingX, &paddingY, &halign);
248 assert(paddingX && paddingY);
249 } else {
250 /* Compressed textures are padded to their block size, but we don't have
251 * to do anything special for that. */
252 paddingX = 1;
253 paddingY = 1;
254 }
255
256 if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
257 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
258
259 if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
260 struct pipe_resource scanout_templat = *templat;
261 struct renderonly_scanout *scanout;
262 struct winsys_handle handle;
263
264 /* pad scanout buffer size to be compatible with the RS */
265 if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR) {
266 paddingX = align(paddingX, ETNA_RS_WIDTH_MASK + 1);
267 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
268 }
269
270 scanout_templat.width0 = align(scanout_templat.width0, paddingX);
271 scanout_templat.height0 = align(scanout_templat.height0, paddingY);
272
273 scanout = renderonly_scanout_for_resource(&scanout_templat,
274 screen->ro, &handle);
275 if (!scanout)
276 return NULL;
277
278 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
279 handle.modifier = modifier;
280 rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
281 &handle,
282 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
283 close(handle.handle);
284 if (!rsc)
285 return NULL;
286
287 rsc->scanout = scanout;
288
289 return &rsc->base;
290 }
291
292 rsc = CALLOC_STRUCT(etna_resource);
293 if (!rsc)
294 return NULL;
295
296 rsc->base = *templat;
297 rsc->base.screen = pscreen;
298 rsc->base.nr_samples = nr_samples;
299 rsc->layout = layout;
300 rsc->halign = halign;
301
302 pipe_reference_init(&rsc->base.reference, 1);
303
304 size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
305
306 uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
307 if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
308 flags |= DRM_ETNA_GEM_FORCE_MMU;
309 struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
310 if (unlikely(bo == NULL)) {
311 BUG("Problem allocating video memory for resource");
312 goto free_rsc;
313 }
314
315 rsc->bo = bo;
316 rsc->ts_bo = 0; /* TS is only created when first bound to surface */
317
318 if (DBG_ENABLED(ETNA_DBG_ZERO)) {
319 void *map = etna_bo_map(bo);
320 memset(map, 0, size);
321 }
322
323 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
324 _mesa_key_pointer_equal);
325 if (!rsc->pending_ctx)
326 goto free_rsc;
327
328 return &rsc->base;
329
330 free_rsc:
331 FREE(rsc);
332 return NULL;
333 }
334
335 static struct pipe_resource *
336 etna_resource_create(struct pipe_screen *pscreen,
337 const struct pipe_resource *templat)
338 {
339 struct etna_screen *screen = etna_screen(pscreen);
340 unsigned layout = ETNA_LAYOUT_TILED;
341
342 /* At this point we don't know if the resource will be used as a texture,
343 * render target, or both, because gallium sets the bits whenever possible
344 * This matters because on some GPUs (GC2000) there is no tiling that is
345 * compatible with both TE and PE.
346 *
347 * We expect that depth/stencil buffers will always be used by PE (rendering),
348 * and any other non-scanout resource will be used as a texture at some point,
349 * So allocate a render-compatible base buffer for scanout/depthstencil buffers,
350 * and a texture-compatible base buffer in other cases
351 *
352 */
353
354 if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) {
355 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
356 layout |= ETNA_LAYOUT_BIT_MULTI;
357 if (screen->specs.can_supertile)
358 layout |= ETNA_LAYOUT_BIT_SUPER;
359 } else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
360 /* RS can't tile 1 byte per pixel formats, will have to CPU tile,
361 * which doesn't support super-tiling
362 */
363 util_format_get_blocksize(templat->format) > 1) {
364 layout |= ETNA_LAYOUT_BIT_SUPER;
365 }
366
367 if ((templat->bind & PIPE_BIND_LINEAR) || /* linear base requested */
368 templat->target == PIPE_BUFFER || /* buffer always linear */
369 /* compressed textures don't use tiling, they have their own "tiles" */
370 util_format_is_compressed(templat->format)) {
371 layout = ETNA_LAYOUT_LINEAR;
372 }
373
374 /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
375 return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
376 }
377
378 enum modifier_priority {
379 MODIFIER_PRIORITY_INVALID = 0,
380 MODIFIER_PRIORITY_LINEAR,
381 MODIFIER_PRIORITY_SPLIT_TILED,
382 MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
383 MODIFIER_PRIORITY_TILED,
384 MODIFIER_PRIORITY_SUPER_TILED,
385 };
386
387 static const uint64_t priority_to_modifier[] = {
388 [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
389 [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
390 [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
391 [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
392 [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
393 [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
394 };
395
396 static uint64_t
397 select_best_modifier(const struct etna_screen * screen,
398 const uint64_t *modifiers, const unsigned count)
399 {
400 enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
401
402 for (int i = 0; i < count; i++) {
403 switch (modifiers[i]) {
404 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
405 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
406 !screen->specs.can_supertile)
407 break;
408 prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
409 break;
410 case DRM_FORMAT_MOD_VIVANTE_TILED:
411 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
412 break;
413 prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
414 break;
415 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
416 if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
417 break;
418 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
419 break;
420 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
421 if (screen->specs.pixel_pipes < 2)
422 break;
423 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
424 break;
425 case DRM_FORMAT_MOD_LINEAR:
426 prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
427 break;
428 case DRM_FORMAT_MOD_INVALID:
429 default:
430 break;
431 }
432 }
433
434 return priority_to_modifier[prio];
435 }
436
437 static struct pipe_resource *
438 etna_resource_create_modifiers(struct pipe_screen *pscreen,
439 const struct pipe_resource *templat,
440 const uint64_t *modifiers, int count)
441 {
442 struct etna_screen *screen = etna_screen(pscreen);
443 struct pipe_resource tmpl = *templat;
444 uint64_t modifier = select_best_modifier(screen, modifiers, count);
445
446 if (modifier == DRM_FORMAT_MOD_INVALID)
447 return NULL;
448
449 /*
450 * We currently assume that all buffers allocated through this interface
451 * should be scanout enabled.
452 */
453 tmpl.bind |= PIPE_BIND_SCANOUT;
454
455 return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
456 }
457
458 static void
459 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
460 {
461 etna_resource(prsc)->seqno++;
462 }
463
464 static void
465 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
466 {
467 struct etna_screen *screen = etna_screen(pscreen);
468 struct etna_resource *rsc = etna_resource(prsc);
469
470 mtx_lock(&screen->lock);
471 _mesa_set_remove_key(screen->used_resources, rsc);
472 _mesa_set_destroy(rsc->pending_ctx, NULL);
473 mtx_unlock(&screen->lock);
474
475 if (rsc->bo)
476 etna_bo_del(rsc->bo);
477
478 if (rsc->ts_bo)
479 etna_bo_del(rsc->ts_bo);
480
481 if (rsc->scanout)
482 renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
483
484 pipe_resource_reference(&rsc->texture, NULL);
485 pipe_resource_reference(&rsc->render, NULL);
486
487 for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
488 FREE(rsc->levels[i].patch_offsets);
489
490 FREE(rsc);
491 }
492
493 static struct pipe_resource *
494 etna_resource_from_handle(struct pipe_screen *pscreen,
495 const struct pipe_resource *tmpl,
496 struct winsys_handle *handle, unsigned usage)
497 {
498 struct etna_screen *screen = etna_screen(pscreen);
499 struct etna_resource *rsc;
500 struct etna_resource_level *level;
501 struct pipe_resource *prsc;
502 struct pipe_resource *ptiled = NULL;
503
504 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
505 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
506 tmpl->target, util_format_name(tmpl->format), tmpl->width0,
507 tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
508 tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
509
510 rsc = CALLOC_STRUCT(etna_resource);
511 if (!rsc)
512 return NULL;
513
514 level = &rsc->levels[0];
515 prsc = &rsc->base;
516
517 *prsc = *tmpl;
518
519 pipe_reference_init(&prsc->reference, 1);
520 prsc->screen = pscreen;
521
522 rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
523 if (!rsc->bo)
524 goto fail;
525
526 rsc->seqno = 1;
527 rsc->layout = modifier_to_layout(handle->modifier);
528 rsc->halign = TEXTURE_HALIGN_FOUR;
529
530 level->width = tmpl->width0;
531 level->height = tmpl->height0;
532 level->depth = tmpl->depth0;
533 level->offset = handle->offset;
534
535 /* Determine padding of the imported resource. */
536 unsigned paddingX = 0, paddingY = 0;
537 etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
538 is_rs_align(screen, tmpl),
539 &paddingX, &paddingY, &rsc->halign);
540
541 if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
542 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
543 level->padded_width = align(level->width, paddingX);
544 level->padded_height = align(level->height, paddingY);
545
546 level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
547 level->padded_height);
548 level->size = level->layer_stride;
549
550 /* The DDX must give us a BO which conforms to our padding size.
551 * The stride of the BO must be greater or equal to our padded
552 * stride. The size of the BO must accomodate the padded height. */
553 if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
554 BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
555 level->stride, util_format_get_stride(tmpl->format, level->padded_width),
556 util_format_name(tmpl->format));
557 goto fail;
558 }
559 if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
560 BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
561 etna_bo_size(rsc->bo), level->stride * level->padded_height,
562 util_format_name(tmpl->format));
563 goto fail;
564 }
565
566 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
567 _mesa_key_pointer_equal);
568 if (!rsc->pending_ctx)
569 goto fail;
570
571 return prsc;
572
573 fail:
574 etna_resource_destroy(pscreen, prsc);
575 if (ptiled)
576 etna_resource_destroy(pscreen, ptiled);
577
578 return NULL;
579 }
580
581 static bool
582 etna_resource_get_handle(struct pipe_screen *pscreen,
583 struct pipe_context *pctx,
584 struct pipe_resource *prsc,
585 struct winsys_handle *handle, unsigned usage)
586 {
587 struct etna_resource *rsc = etna_resource(prsc);
588 /* Scanout is always attached to the base resource */
589 struct renderonly_scanout *scanout = rsc->scanout;
590
591 handle->stride = rsc->levels[0].stride;
592 handle->offset = rsc->levels[0].offset;
593 handle->modifier = layout_to_modifier(rsc->layout);
594
595 if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
596 return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
597 } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
598 if (renderonly_get_handle(scanout, handle)) {
599 return true;
600 } else {
601 handle->handle = etna_bo_handle(rsc->bo);
602 return true;
603 }
604 } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
605 handle->handle = etna_bo_dmabuf(rsc->bo);
606 return true;
607 } else {
608 return false;
609 }
610 }
611
612 void
613 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
614 enum etna_resource_status status)
615 {
616 struct etna_screen *screen = ctx->screen;
617 struct etna_resource *rsc;
618
619 if (!prsc)
620 return;
621
622 rsc = etna_resource(prsc);
623
624 mtx_lock(&screen->lock);
625
626 /*
627 * if we are pending read or write by any other context or
628 * if reading a resource pending a write, then
629 * flush all the contexts to maintain coherency
630 */
631 if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
632 ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
633 set_foreach(rsc->pending_ctx, entry) {
634 struct etna_context *extctx = (struct etna_context *)entry->key;
635 struct pipe_context *pctx = &extctx->base;
636
637 if (extctx == ctx)
638 continue;
639
640 pctx->flush(pctx, NULL, 0);
641 /* It's safe to clear the status here. If we need to flush it means
642 * either another context had the resource in exclusive (write) use,
643 * or we transition the resource to exclusive use in our context.
644 * In both cases the new status accurately reflects the resource use
645 * after the flush.
646 */
647 rsc->status = 0;
648 }
649 }
650
651 rsc->status |= status;
652
653 _mesa_set_add(screen->used_resources, rsc);
654 _mesa_set_add(rsc->pending_ctx, ctx);
655
656 mtx_unlock(&screen->lock);
657 }
658
659 bool
660 etna_resource_has_valid_ts(struct etna_resource *rsc)
661 {
662 if (!rsc->ts_bo)
663 return false;
664
665 for (int level = 0; level <= rsc->base.last_level; level++)
666 if (rsc->levels[level].ts_valid)
667 return true;
668
669 return false;
670 }
671
672 void
673 etna_resource_screen_init(struct pipe_screen *pscreen)
674 {
675 pscreen->can_create_resource = etna_screen_can_create_resource;
676 pscreen->resource_create = etna_resource_create;
677 pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
678 pscreen->resource_from_handle = etna_resource_from_handle;
679 pscreen->resource_get_handle = etna_resource_get_handle;
680 pscreen->resource_changed = etna_resource_changed;
681 pscreen->resource_destroy = etna_resource_destroy;
682 }