etnaviv: align TS surface size to number of pixel pipes
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_resource.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
35
36 #include "util/u_inlines.h"
37 #include "util/u_memory.h"
38
39 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
40 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
41 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
42 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
43 */
44 bool
45 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
46 struct etna_resource *rsc)
47 {
48 struct etna_screen *screen = etna_screen(pscreen);
49 size_t rt_ts_size, ts_layer_stride, pixels;
50
51 assert(!rsc->ts_bo);
52
53 /* TS only for level 0 -- XXX is this formula correct? */
54 pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format);
55 ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80,
56 0x100 * screen->specs.pixel_pipes);
57 rt_ts_size = ts_layer_stride * rsc->base.array_size;
58 if (rt_ts_size == 0)
59 return true;
60
61 DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
62 rsc, rt_ts_size);
63
64 struct etna_bo *rt_ts;
65 rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
66
67 if (unlikely(!rt_ts)) {
68 BUG("Problem allocating tile status for resource");
69 return false;
70 }
71
72 rsc->ts_bo = rt_ts;
73 rsc->levels[0].ts_offset = 0;
74 rsc->levels[0].ts_layer_stride = ts_layer_stride;
75 rsc->levels[0].ts_size = rt_ts_size;
76
77 /* It is important to initialize the TS, as random pattern
78 * can result in crashes. Do this on the CPU as this only happens once
79 * per surface anyway and it's a small area, so it may not be worth
80 * queuing this to the GPU. */
81 void *ts_map = etna_bo_map(rt_ts);
82 memset(ts_map, screen->specs.ts_clear_value, rt_ts_size);
83
84 return true;
85 }
86
87 static boolean
88 etna_screen_can_create_resource(struct pipe_screen *pscreen,
89 const struct pipe_resource *templat)
90 {
91 struct etna_screen *screen = etna_screen(pscreen);
92 if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
93 return false;
94
95 /* templat->bind is not set here, so we must use the minimum sizes */
96 uint max_size =
97 MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
98
99 if (templat->width0 > max_size || templat->height0 > max_size)
100 return false;
101
102 return true;
103 }
104
105 static unsigned
106 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
107 unsigned msaa_xscale, unsigned msaa_yscale)
108 {
109 struct pipe_resource *prsc = &rsc->base;
110 unsigned level, size = 0;
111 unsigned width = prsc->width0;
112 unsigned height = prsc->height0;
113 unsigned depth = prsc->depth0;
114
115 for (level = 0; level <= prsc->last_level; level++) {
116 struct etna_resource_level *mip = &rsc->levels[level];
117
118 mip->width = width;
119 mip->height = height;
120 mip->padded_width = align(width * msaa_xscale, paddingX);
121 mip->padded_height = align(height * msaa_yscale, paddingY);
122 mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
123 mip->offset = size;
124 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
125 mip->size = prsc->array_size * mip->layer_stride;
126
127 /* align levels to 64 bytes to be able to render to them */
128 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
129
130 width = u_minify(width, 1);
131 height = u_minify(height, 1);
132 depth = u_minify(depth, 1);
133 }
134
135 return size;
136 }
137
138 /* Create a new resource object, using the given template info */
139 struct pipe_resource *
140 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
141 const struct pipe_resource *templat)
142 {
143 struct etna_screen *screen = etna_screen(pscreen);
144 unsigned size;
145
146 DBG_F(ETNA_DBG_RESOURCE_MSGS,
147 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
148 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
149 templat->target, util_format_name(templat->format), templat->width0,
150 templat->height0, templat->depth0, templat->array_size,
151 templat->last_level, templat->nr_samples, templat->usage,
152 templat->bind, templat->flags);
153
154 /* Determine scaling for antialiasing, allow override using debug flag */
155 int nr_samples = templat->nr_samples;
156 if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
157 !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
158 if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
159 nr_samples = 2;
160 if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
161 nr_samples = 4;
162 }
163
164 int msaa_xscale = 1, msaa_yscale = 1;
165 if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
166 /* Number of samples not supported */
167 return NULL;
168 }
169
170 /* If we have the TEXTURE_HALIGN feature, we can always align to the
171 * resolve engine's width. If not, we must not align resources used
172 * only for textures. */
173 bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
174 !etna_resource_sampler_only(templat);
175
176 /* Determine needed padding (alignment of height/width) */
177 unsigned paddingX = 0, paddingY = 0;
178 unsigned halign = TEXTURE_HALIGN_FOUR;
179 etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX,
180 &paddingY, &halign);
181 assert(paddingX && paddingY);
182
183 if (templat->bind != PIPE_BUFFER) {
184 unsigned min_paddingY = 4 * screen->specs.pixel_pipes;
185 if (paddingY < min_paddingY)
186 paddingY = min_paddingY;
187 }
188
189 struct etna_resource *rsc = CALLOC_STRUCT(etna_resource);
190
191 if (!rsc)
192 return NULL;
193
194 rsc->base = *templat;
195 rsc->base.screen = pscreen;
196 rsc->base.nr_samples = nr_samples;
197 rsc->layout = layout;
198 rsc->halign = halign;
199
200 pipe_reference_init(&rsc->base.reference, 1);
201 list_inithead(&rsc->list);
202
203 size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
204
205 uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
206 if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
207 flags |= DRM_ETNA_GEM_FORCE_MMU;
208 struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
209 if (unlikely(bo == NULL)) {
210 BUG("Problem allocating video memory for resource");
211 return NULL;
212 }
213
214 rsc->bo = bo;
215 rsc->ts_bo = 0; /* TS is only created when first bound to surface */
216
217 if (templat->bind & PIPE_BIND_SCANOUT)
218 rsc->scanout = renderonly_scanout_for_resource(&rsc->base, screen->ro);
219
220 if (DBG_ENABLED(ETNA_DBG_ZERO)) {
221 void *map = etna_bo_map(bo);
222 memset(map, 0, size);
223 }
224
225 return &rsc->base;
226 }
227
228 static struct pipe_resource *
229 etna_resource_create(struct pipe_screen *pscreen,
230 const struct pipe_resource *templat)
231 {
232 struct etna_screen *screen = etna_screen(pscreen);
233
234 /* Figure out what tiling to use -- for now, assume that textures cannot be
235 * supertiled, and cannot be linear.
236 * There is a feature flag SUPERTILED_TEXTURE (not supported on any known hw)
237 * that may allow this, as well
238 * as LINEAR_TEXTURE_SUPPORT (supported on gc880 and gc2000 at least), but
239 * not sure how it works.
240 * Buffers always have LINEAR layout.
241 */
242 unsigned layout = ETNA_LAYOUT_LINEAR;
243 if (etna_resource_sampler_only(templat)) {
244 /* The buffer is only used for texturing, so create something
245 * directly compatible with the sampler. Such a buffer can
246 * never be rendered to. */
247 layout = ETNA_LAYOUT_TILED;
248
249 if (util_format_is_compressed(templat->format))
250 layout = ETNA_LAYOUT_LINEAR;
251 } else if (templat->target != PIPE_BUFFER) {
252 bool want_multitiled = screen->specs.pixel_pipes > 1;
253 bool want_supertiled = screen->specs.can_supertile && !DBG_ENABLED(ETNA_DBG_NO_SUPERTILE);
254
255 /* Keep single byte blocksized resources as tiled, since we
256 * are unable to use the RS blit to de-tile them. However,
257 * if they're used as a render target or depth/stencil, they
258 * must be multi-tiled for GPUs with multiple pixel pipes.
259 * Ignore depth/stencil here, but it is an error for a render
260 * target.
261 */
262 if (util_format_get_blocksize(templat->format) == 1 &&
263 !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
264 assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
265 want_multitiled = want_supertiled = false;
266 }
267
268 layout = ETNA_LAYOUT_BIT_TILE;
269 if (want_multitiled)
270 layout |= ETNA_LAYOUT_BIT_MULTI;
271 if (want_supertiled)
272 layout |= ETNA_LAYOUT_BIT_SUPER;
273 }
274
275 if (templat->target == PIPE_TEXTURE_3D)
276 layout = ETNA_LAYOUT_LINEAR;
277
278 return etna_resource_alloc(pscreen, layout, templat);
279 }
280
281 static void
282 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
283 {
284 struct etna_resource *res = etna_resource(prsc);
285
286 /* Make sure texture is older than the imported renderable buffer,
287 * so etna_update_sampler_source will copy the pixel data again.
288 */
289 if (res->texture)
290 etna_resource(res->texture)->seqno = res->seqno - 1;
291 }
292
293 static void
294 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
295 {
296 struct etna_resource *rsc = etna_resource(prsc);
297
298 if (rsc->bo)
299 etna_bo_del(rsc->bo);
300
301 if (rsc->ts_bo)
302 etna_bo_del(rsc->ts_bo);
303
304 if (rsc->scanout)
305 renderonly_scanout_destroy(rsc->scanout);
306
307 list_delinit(&rsc->list);
308
309 pipe_resource_reference(&rsc->texture, NULL);
310
311 FREE(rsc);
312 }
313
314 static struct pipe_resource *
315 etna_resource_from_handle(struct pipe_screen *pscreen,
316 const struct pipe_resource *tmpl,
317 struct winsys_handle *handle, unsigned usage)
318 {
319 struct etna_screen *screen = etna_screen(pscreen);
320 struct etna_resource *rsc = CALLOC_STRUCT(etna_resource);
321 struct etna_resource_level *level = &rsc->levels[0];
322 struct pipe_resource *prsc = &rsc->base;
323 struct pipe_resource *ptiled = NULL;
324
325 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
326 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
327 tmpl->target, util_format_name(tmpl->format), tmpl->width0,
328 tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
329 tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
330
331 if (!rsc)
332 return NULL;
333
334 *prsc = *tmpl;
335
336 pipe_reference_init(&prsc->reference, 1);
337 list_inithead(&rsc->list);
338 prsc->screen = pscreen;
339
340 rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
341 if (!rsc->bo)
342 goto fail;
343
344 rsc->seqno = 1;
345
346 level->width = tmpl->width0;
347 level->height = tmpl->height0;
348
349 /* We will be using the RS to copy with this resource, so we must
350 * ensure that it is appropriately aligned for the RS requirements. */
351 unsigned paddingX = ETNA_RS_WIDTH_MASK + 1;
352 unsigned paddingY = (ETNA_RS_HEIGHT_MASK + 1) * screen->specs.pixel_pipes;
353
354 level->padded_width = align(level->width, paddingX);
355 level->padded_height = align(level->height, paddingY);
356
357 /* The DDX must give us a BO which conforms to our padding size.
358 * The stride of the BO must be greater or equal to our padded
359 * stride. The size of the BO must accomodate the padded height. */
360 if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
361 BUG("BO stride is too small for RS engine width padding");
362 goto fail;
363 }
364 if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
365 BUG("BO size is too small for RS engine height padding");
366 goto fail;
367 }
368
369 if (handle->type == DRM_API_HANDLE_TYPE_SHARED && tmpl->bind & PIPE_BIND_RENDER_TARGET) {
370 /* Render targets are linear in Xorg but must be tiled
371 * here. It would be nice if dri_drawable_get_format()
372 * set scanout for these buffers too. */
373 struct etna_resource *tiled;
374
375 ptiled = etna_resource_create(pscreen, tmpl);
376 if (!ptiled)
377 goto fail;
378
379 tiled = etna_resource(ptiled);
380 tiled->scanout = renderonly_scanout_for_prime(prsc, screen->ro);
381 if (!tiled->scanout)
382 goto fail;
383
384 return ptiled;
385 }
386
387 return prsc;
388
389 fail:
390 etna_resource_destroy(pscreen, prsc);
391 if (ptiled)
392 etna_resource_destroy(pscreen, ptiled);
393
394 return NULL;
395 }
396
397 static boolean
398 etna_resource_get_handle(struct pipe_screen *pscreen,
399 struct pipe_context *pctx,
400 struct pipe_resource *prsc,
401 struct winsys_handle *handle, unsigned usage)
402 {
403 struct etna_resource *rsc = etna_resource(prsc);
404
405 if (renderonly_get_handle(rsc->scanout, handle))
406 return TRUE;
407
408 return etna_screen_bo_get_handle(pscreen, rsc->bo, rsc->levels[0].stride,
409 handle);
410 }
411
412 void
413 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
414 enum etna_resource_status status)
415 {
416 struct etna_resource *rsc;
417
418 if (!prsc)
419 return;
420
421 rsc = etna_resource(prsc);
422 rsc->status |= status;
423
424 /* TODO resources can actually be shared across contexts,
425 * so I'm not sure a single list-head will do the trick? */
426 debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx);
427 list_delinit(&rsc->list);
428 list_addtail(&rsc->list, &ctx->used_resources);
429 rsc->pending_ctx = ctx;
430 }
431
432 void
433 etna_resource_wait(struct pipe_context *pctx, struct etna_resource *rsc)
434 {
435 if (rsc->status & ETNA_PENDING_WRITE) {
436 struct pipe_fence_handle *fence;
437 struct pipe_screen *pscreen = pctx->screen;
438
439 pctx->flush(pctx, &fence, 0);
440
441 if (!pscreen->fence_finish(pscreen, pctx, fence, 5000000000ULL))
442 BUG("fence timed out (hung GPU?)");
443
444 pscreen->fence_reference(pscreen, &fence, NULL);
445 }
446 }
447
448 void
449 etna_resource_screen_init(struct pipe_screen *pscreen)
450 {
451 pscreen->can_create_resource = etna_screen_can_create_resource;
452 pscreen->resource_create = etna_resource_create;
453 pscreen->resource_from_handle = etna_resource_from_handle;
454 pscreen->resource_get_handle = etna_resource_get_handle;
455 pscreen->resource_changed = etna_resource_changed;
456 pscreen->resource_destroy = etna_resource_destroy;
457 }