src/gallium/drivers/etnaviv/etnaviv_resource.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_resource.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_screen.h"
  34 #include "etnaviv_translate.h"
  35
  36 #include "util/hash_table.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
  43 {
  44    switch (modifier) {
  45    case DRM_FORMAT_MOD_VIVANTE_TILED:
  46       return ETNA_LAYOUT_TILED;
  47    case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
  48       return ETNA_LAYOUT_SUPER_TILED;
  49    case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
  50       return ETNA_LAYOUT_MULTI_TILED;
  51    case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
  52       return ETNA_LAYOUT_MULTI_SUPERTILED;
  53    case DRM_FORMAT_MOD_LINEAR:
  54    default:
  55       return ETNA_LAYOUT_LINEAR;
  56    }
  57 }
  58
  59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
  60 {
  61    switch (layout) {
  62    case ETNA_LAYOUT_TILED:
  63       return DRM_FORMAT_MOD_VIVANTE_TILED;
  64    case ETNA_LAYOUT_SUPER_TILED:
  65       return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
  66    case ETNA_LAYOUT_MULTI_TILED:
  67       return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
  68    case ETNA_LAYOUT_MULTI_SUPERTILED:
  69       return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
  70    case ETNA_LAYOUT_LINEAR:
  71       return DRM_FORMAT_MOD_LINEAR;
  72    default:
  73       return DRM_FORMAT_MOD_INVALID;
  74    }
  75 }
  76
  77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
  78  * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
  79  * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
  80  * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
  81  */
  82 bool
  83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
  84                               struct etna_resource *rsc)
  85 {
  86    struct etna_screen *screen = etna_screen(pscreen);
  87    size_t rt_ts_size, ts_layer_stride;
  88    size_t ts_bits_per_tile, bytes_per_tile;
  89    uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
  90    int8_t ts_compress_fmt;
  91
  92    assert(!rsc->ts_bo);
  93
  94    /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
  95     * v4 compression can be enabled everywhere without any known drawback,
  96     * except that in-place resolve must go through a slower path
  97     */
  98    ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
  99                       translate_ts_format(rsc->base.format) : -1;
 100
 101    if (screen->specs.halti >= 5) {
 102       /* enable 256B ts mode with compression, as it improves performance
 103        * the size of the resource might also determine if we want to use it or not
 104        */
 105       if (ts_compress_fmt >= 0)
 106          ts_mode = TS_MODE_256B;
 107
 108       ts_bits_per_tile = 4;
 109       bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
 110    } else {
 111       ts_bits_per_tile = screen->specs.bits_per_tile;
 112       bytes_per_tile = 64;
 113    }
 114
 115    ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
 116                                         bytes_per_tile * 8 / ts_bits_per_tile),
 117                            0x100 * screen->specs.pixel_pipes);
 118    rt_ts_size = ts_layer_stride * rsc->base.array_size;
 119    if (rt_ts_size == 0)
 120       return true;
 121
 122    DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
 123          rsc, rt_ts_size);
 124
 125    struct etna_bo *rt_ts;
 126    rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
 127
 128    if (unlikely(!rt_ts)) {
 129       BUG("Problem allocating tile status for resource");
 130       return false;
 131    }
 132
 133    rsc->ts_bo = rt_ts;
 134    rsc->levels[0].ts_offset = 0;
 135    rsc->levels[0].ts_layer_stride = ts_layer_stride;
 136    rsc->levels[0].ts_size = rt_ts_size;
 137    rsc->levels[0].ts_mode = ts_mode;
 138    rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
 139
 140    return true;
 141 }
 142
 143 static bool
 144 etna_screen_can_create_resource(struct pipe_screen *pscreen,
 145                                 const struct pipe_resource *templat)
 146 {
 147    struct etna_screen *screen = etna_screen(pscreen);
 148    if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL))
 149       return false;
 150
 151    /* templat->bind is not set here, so we must use the minimum sizes */
 152    uint max_size =
 153       MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
 154
 155    if (templat->width0 > max_size || templat->height0 > max_size)
 156       return false;
 157
 158    return true;
 159 }
 160
 161 static unsigned
 162 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
 163               unsigned msaa_xscale, unsigned msaa_yscale)
 164 {
 165    struct pipe_resource *prsc = &rsc->base;
 166    unsigned level, size = 0;
 167    unsigned width = prsc->width0;
 168    unsigned height = prsc->height0;
 169    unsigned depth = prsc->depth0;
 170
 171    for (level = 0; level <= prsc->last_level; level++) {
 172       struct etna_resource_level *mip = &rsc->levels[level];
 173
 174       mip->width = width;
 175       mip->height = height;
 176       mip->depth = depth;
 177       mip->padded_width = align(width * msaa_xscale, paddingX);
 178       mip->padded_height = align(height * msaa_yscale, paddingY);
 179       mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
 180       mip->offset = size;
 181       mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
 182       mip->size = prsc->array_size * mip->layer_stride;
 183
 184       /* align levels to 64 bytes to be able to render to them */
 185       size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
 186
 187       width = u_minify(width, 1);
 188       height = u_minify(height, 1);
 189       depth = u_minify(depth, 1);
 190    }
 191
 192    return size;
 193 }
 194
 195 /* Is rs alignment needed? */
 196 static bool is_rs_align(struct etna_screen *screen,
 197                         const struct pipe_resource *tmpl)
 198 {
 199    return screen->specs.use_blt ? false : (
 200       VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
 201       !etna_resource_sampler_only(tmpl));
 202 }
 203
 204 /* Create a new resource object, using the given template info */
 205 struct pipe_resource *
 206 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
 207                     uint64_t modifier, const struct pipe_resource *templat)
 208 {
 209    struct etna_screen *screen = etna_screen(pscreen);
 210    struct etna_resource *rsc;
 211    unsigned size;
 212
 213    DBG_F(ETNA_DBG_RESOURCE_MSGS,
 214          "target=%d, format=%s, %ux%ux%u, array_size=%u, "
 215          "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
 216          templat->target, util_format_name(templat->format), templat->width0,
 217          templat->height0, templat->depth0, templat->array_size,
 218          templat->last_level, templat->nr_samples, templat->usage,
 219          templat->bind, templat->flags);
 220
 221    /* Determine scaling for antialiasing, allow override using debug flag */
 222    int nr_samples = templat->nr_samples;
 223    if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 224        !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
 225       if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
 226          nr_samples = 2;
 227       if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
 228          nr_samples = 4;
 229    }
 230
 231    int msaa_xscale = 1, msaa_yscale = 1;
 232    if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale)) {
 233       /* Number of samples not supported */
 234       return NULL;
 235    }
 236
 237    /* Determine needed padding (alignment of height/width) */
 238    unsigned paddingX = 0, paddingY = 0;
 239    unsigned halign = TEXTURE_HALIGN_FOUR;
 240    if (!util_format_is_compressed(templat->format)) {
 241       /* If we have the TEXTURE_HALIGN feature, we can always align to the
 242        * resolve engine's width.  If not, we must not align resources used
 243        * only for textures. If this GPU uses the BLT engine, never do RS align.
 244        */
 245       etna_layout_multiple(layout, screen->specs.pixel_pipes,
 246                            is_rs_align (screen, templat),
 247                            &paddingX, &paddingY, &halign);
 248       assert(paddingX && paddingY);
 249    } else {
 250       /* Compressed textures are padded to their block size, but we don't have
 251        * to do anything special for that. */
 252       paddingX = 1;
 253       paddingY = 1;
 254    }
 255
 256    if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
 257       paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 258
 259    if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
 260       struct pipe_resource scanout_templat = *templat;
 261       struct renderonly_scanout *scanout;
 262       struct winsys_handle handle;
 263
 264       /* pad scanout buffer size to be compatible with the RS */
 265       if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR) {
 266          paddingX = align(paddingX, ETNA_RS_WIDTH_MASK + 1);
 267          paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 268       }
 269
 270       scanout_templat.width0 = align(scanout_templat.width0, paddingX);
 271       scanout_templat.height0 = align(scanout_templat.height0, paddingY);
 272
 273       scanout = renderonly_scanout_for_resource(&scanout_templat,
 274                                                 screen->ro, &handle);
 275       if (!scanout)
 276          return NULL;
 277
 278       assert(handle.type == WINSYS_HANDLE_TYPE_FD);
 279       handle.modifier = modifier;
 280       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
 281                                                         &handle,
 282                                                         PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
 283       close(handle.handle);
 284       if (!rsc)
 285          return NULL;
 286
 287       rsc->scanout = scanout;
 288
 289       return &rsc->base;
 290    }
 291
 292    rsc = CALLOC_STRUCT(etna_resource);
 293    if (!rsc)
 294       return NULL;
 295
 296    rsc->base = *templat;
 297    rsc->base.screen = pscreen;
 298    rsc->base.nr_samples = nr_samples;
 299    rsc->layout = layout;
 300    rsc->halign = halign;
 301
 302    pipe_reference_init(&rsc->base.reference, 1);
 303    util_range_init(&rsc->valid_buffer_range);
 304
 305    size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
 306
 307    uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
 308    if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
 309       flags |= DRM_ETNA_GEM_FORCE_MMU;
 310    struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
 311    if (unlikely(bo == NULL)) {
 312       BUG("Problem allocating video memory for resource");
 313       goto free_rsc;
 314    }
 315
 316    rsc->bo = bo;
 317    rsc->ts_bo = 0; /* TS is only created when first bound to surface */
 318
 319    if (DBG_ENABLED(ETNA_DBG_ZERO)) {
 320       void *map = etna_bo_map(bo);
 321       memset(map, 0, size);
 322    }
 323
 324    mtx_init(&rsc->lock, mtx_recursive);
 325    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 326                                        _mesa_key_pointer_equal);
 327    if (!rsc->pending_ctx)
 328       goto free_rsc;
 329
 330    return &rsc->base;
 331
 332 free_rsc:
 333    FREE(rsc);
 334    return NULL;
 335 }
 336
 337 static struct pipe_resource *
 338 etna_resource_create(struct pipe_screen *pscreen,
 339                      const struct pipe_resource *templat)
 340 {
 341    struct etna_screen *screen = etna_screen(pscreen);
 342    unsigned layout = ETNA_LAYOUT_TILED;
 343
 344    /* At this point we don't know if the resource will be used as a texture,
 345     * render target, or both, because gallium sets the bits whenever possible
 346     * This matters because on some GPUs (GC2000) there is no tiling that is
 347     * compatible with both TE and PE.
 348     *
 349     * We expect that depth/stencil buffers will always be used by PE (rendering),
 350     * and any other non-scanout resource will be used as a texture at some point,
 351     * So allocate a render-compatible base buffer for scanout/depthstencil buffers,
 352     * and a texture-compatible base buffer in other cases
 353     *
 354     */
 355    if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) {
 356       if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
 357          layout |= ETNA_LAYOUT_BIT_MULTI;
 358       if (screen->specs.can_supertile)
 359          layout |= ETNA_LAYOUT_BIT_SUPER;
 360    } else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
 361               etna_resource_hw_tileable(screen->specs.use_blt, templat)) {
 362       layout |= ETNA_LAYOUT_BIT_SUPER;
 363    }
 364
 365    if ((templat->bind & PIPE_BIND_LINEAR) || /* linear base requested */
 366        templat->target == PIPE_BUFFER || /* buffer always linear */
 367        /* compressed textures don't use tiling, they have their own "tiles" */
 368        util_format_is_compressed(templat->format)) {
 369       layout = ETNA_LAYOUT_LINEAR;
 370    }
 371
 372    /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
 373    return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
 374 }
 375
 376 enum modifier_priority {
 377    MODIFIER_PRIORITY_INVALID = 0,
 378    MODIFIER_PRIORITY_LINEAR,
 379    MODIFIER_PRIORITY_SPLIT_TILED,
 380    MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
 381    MODIFIER_PRIORITY_TILED,
 382    MODIFIER_PRIORITY_SUPER_TILED,
 383 };
 384
 385 static const uint64_t priority_to_modifier[] = {
 386    [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
 387    [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
 388    [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
 389    [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
 390    [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
 391    [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
 392 };
 393
 394 static uint64_t
 395 select_best_modifier(const struct etna_screen * screen,
 396                      const uint64_t *modifiers, const unsigned count)
 397 {
 398    enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
 399
 400    for (int i = 0; i < count; i++) {
 401       switch (modifiers[i]) {
 402       case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
 403          if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
 404              !screen->specs.can_supertile)
 405             break;
 406          prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
 407          break;
 408       case DRM_FORMAT_MOD_VIVANTE_TILED:
 409          if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
 410             break;
 411          prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
 412          break;
 413       case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
 414          if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
 415             break;
 416          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
 417          break;
 418       case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
 419          if (screen->specs.pixel_pipes < 2)
 420             break;
 421          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
 422          break;
 423       case DRM_FORMAT_MOD_LINEAR:
 424          prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
 425          break;
 426       case DRM_FORMAT_MOD_INVALID:
 427       default:
 428          break;
 429       }
 430    }
 431
 432    return priority_to_modifier[prio];
 433 }
 434
 435 static struct pipe_resource *
 436 etna_resource_create_modifiers(struct pipe_screen *pscreen,
 437                                const struct pipe_resource *templat,
 438                                const uint64_t *modifiers, int count)
 439 {
 440    struct etna_screen *screen = etna_screen(pscreen);
 441    struct pipe_resource tmpl = *templat;
 442    uint64_t modifier = select_best_modifier(screen, modifiers, count);
 443
 444    if (modifier == DRM_FORMAT_MOD_INVALID)
 445       return NULL;
 446
 447    /*
 448     * We currently assume that all buffers allocated through this interface
 449     * should be scanout enabled.
 450     */
 451    tmpl.bind |= PIPE_BIND_SCANOUT;
 452
 453    return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
 454 }
 455
 456 static void
 457 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 458 {
 459    etna_resource(prsc)->seqno++;
 460 }
 461
 462 static void
 463 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 464 {
 465    struct etna_resource *rsc = etna_resource(prsc);
 466
 467    mtx_lock(&rsc->lock);
 468    assert(!_mesa_set_next_entry(rsc->pending_ctx, NULL));
 469    _mesa_set_destroy(rsc->pending_ctx, NULL);
 470    mtx_unlock(&rsc->lock);
 471
 472    if (rsc->bo)
 473       etna_bo_del(rsc->bo);
 474
 475    if (rsc->ts_bo)
 476       etna_bo_del(rsc->ts_bo);
 477
 478    if (rsc->scanout)
 479       renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
 480
 481    util_range_destroy(&rsc->valid_buffer_range);
 482
 483    pipe_resource_reference(&rsc->texture, NULL);
 484    pipe_resource_reference(&rsc->render, NULL);
 485
 486    for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
 487       FREE(rsc->levels[i].patch_offsets);
 488
 489    mtx_destroy(&rsc->lock);
 490
 491    FREE(rsc);
 492 }
 493
 494 static struct pipe_resource *
 495 etna_resource_from_handle(struct pipe_screen *pscreen,
 496                           const struct pipe_resource *tmpl,
 497                           struct winsys_handle *handle, unsigned usage)
 498 {
 499    struct etna_screen *screen = etna_screen(pscreen);
 500    struct etna_resource *rsc;
 501    struct etna_resource_level *level;
 502    struct pipe_resource *prsc;
 503
 504    DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
 505        "nr_samples=%u, usage=%u, bind=%x, flags=%x",
 506        tmpl->target, util_format_name(tmpl->format), tmpl->width0,
 507        tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
 508        tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
 509
 510    rsc = CALLOC_STRUCT(etna_resource);
 511    if (!rsc)
 512       return NULL;
 513
 514    level = &rsc->levels[0];
 515    prsc = &rsc->base;
 516
 517    *prsc = *tmpl;
 518
 519    pipe_reference_init(&prsc->reference, 1);
 520    util_range_init(&rsc->valid_buffer_range);
 521    prsc->screen = pscreen;
 522
 523    rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
 524    if (!rsc->bo)
 525       goto fail;
 526
 527    rsc->seqno = 1;
 528    rsc->layout = modifier_to_layout(handle->modifier);
 529    rsc->halign = TEXTURE_HALIGN_FOUR;
 530
 531    level->width = tmpl->width0;
 532    level->height = tmpl->height0;
 533    level->depth = tmpl->depth0;
 534    level->offset = handle->offset;
 535
 536    /* Determine padding of the imported resource. */
 537    unsigned paddingX = 0, paddingY = 0;
 538    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
 539                         is_rs_align(screen, tmpl),
 540                         &paddingX, &paddingY, &rsc->halign);
 541
 542    if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
 543       paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 544    level->padded_width = align(level->width, paddingX);
 545    level->padded_height = align(level->height, paddingY);
 546
 547    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
 548                                                                   level->padded_height);
 549    level->size = level->layer_stride;
 550
 551    /* The DDX must give us a BO which conforms to our padding size.
 552     * The stride of the BO must be greater or equal to our padded
 553     * stride. The size of the BO must accomodate the padded height. */
 554    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
 555       BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
 556           level->stride, util_format_get_stride(tmpl->format, level->padded_width),
 557           util_format_name(tmpl->format));
 558       goto fail;
 559    }
 560    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
 561       BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
 562           etna_bo_size(rsc->bo), level->stride * level->padded_height,
 563           util_format_name(tmpl->format));
 564       goto fail;
 565    }
 566
 567    mtx_init(&rsc->lock, mtx_recursive);
 568    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 569                                        _mesa_key_pointer_equal);
 570    if (!rsc->pending_ctx)
 571       goto fail;
 572
 573    return prsc;
 574
 575 fail:
 576    etna_resource_destroy(pscreen, prsc);
 577
 578    return NULL;
 579 }
 580
 581 static bool
 582 etna_resource_get_handle(struct pipe_screen *pscreen,
 583                          struct pipe_context *pctx,
 584                          struct pipe_resource *prsc,
 585                          struct winsys_handle *handle, unsigned usage)
 586 {
 587    struct etna_resource *rsc = etna_resource(prsc);
 588    /* Scanout is always attached to the base resource */
 589    struct renderonly_scanout *scanout = rsc->scanout;
 590
 591    handle->stride = rsc->levels[0].stride;
 592    handle->offset = rsc->levels[0].offset;
 593    handle->modifier = layout_to_modifier(rsc->layout);
 594
 595    if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
 596       return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
 597    } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
 598       if (renderonly_get_handle(scanout, handle)) {
 599          return true;
 600       } else {
 601          handle->handle = etna_bo_handle(rsc->bo);
 602          return true;
 603       }
 604    } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
 605       handle->handle = etna_bo_dmabuf(rsc->bo);
 606       return true;
 607    } else {
 608       return false;
 609    }
 610 }
 611
 612 void
 613 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
 614                    enum etna_resource_status status)
 615 {
 616    struct pipe_resource *referenced = NULL;
 617    struct etna_resource *rsc;
 618
 619    if (!prsc)
 620       return;
 621
 622    mtx_lock(&ctx->lock);
 623
 624    rsc = etna_resource(prsc);
 625 again:
 626    mtx_lock(&rsc->lock);
 627
 628    set_foreach(rsc->pending_ctx, entry) {
 629       struct etna_context *extctx = (struct etna_context *)entry->key;
 630       struct pipe_context *pctx = &extctx->base;
 631       bool need_flush = false;
 632
 633       if (mtx_trylock(&extctx->lock) != thrd_success) {
 634          /*
 635           * The other context could be locked in etna_flush() and
 636           * stuck waiting for the resource lock, so release the
 637           * resource lock here, let etna_flush() finish, and try
 638           * again.
 639           */
 640          mtx_unlock(&rsc->lock);
 641          thrd_yield();
 642          goto again;
 643       }
 644
 645       set_foreach(extctx->used_resources_read, entry2) {
 646          struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
 647          if (ctx == extctx || rsc2 != rsc)
 648             continue;
 649
 650          if (status & ETNA_PENDING_WRITE) {
 651             need_flush = true;
 652             break;
 653          }
 654       }
 655
 656       if (need_flush) {
 657          pctx->flush(pctx, NULL, 0);
 658          mtx_unlock(&extctx->lock);
 659          continue;
 660       }
 661
 662       set_foreach(extctx->used_resources_write, entry2) {
 663          struct etna_resource *rsc2 = (struct etna_resource *)entry2->key;
 664          if (ctx == extctx || rsc2 != rsc)
 665             continue;
 666
 667          need_flush = true;
 668          break;
 669       }
 670
 671       if (need_flush)
 672          pctx->flush(pctx, NULL, 0);
 673
 674       mtx_unlock(&extctx->lock);
 675    }
 676
 677    rsc->status = status;
 678
 679    if (!_mesa_set_search(rsc->pending_ctx, ctx)) {
 680       pipe_resource_reference(&referenced, prsc);
 681       _mesa_set_add((status & ETNA_PENDING_READ) ?
 682                     ctx->used_resources_read : ctx->used_resources_write, rsc);
 683       _mesa_set_add(rsc->pending_ctx, ctx);
 684    }
 685
 686    mtx_unlock(&rsc->lock);
 687    mtx_unlock(&ctx->lock);
 688 }
 689
 690 bool
 691 etna_resource_has_valid_ts(struct etna_resource *rsc)
 692 {
 693    if (!rsc->ts_bo)
 694       return false;
 695
 696    for (int level = 0; level <= rsc->base.last_level; level++)
 697       if (rsc->levels[level].ts_valid)
 698          return true;
 699
 700    return false;
 701 }
 702
 703 void
 704 etna_resource_screen_init(struct pipe_screen *pscreen)
 705 {
 706    pscreen->can_create_resource = etna_screen_can_create_resource;
 707    pscreen->resource_create = etna_resource_create;
 708    pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
 709    pscreen->resource_from_handle = etna_resource_from_handle;
 710    pscreen->resource_get_handle = etna_resource_get_handle;
 711    pscreen->resource_changed = etna_resource_changed;
 712    pscreen->resource_destroy = etna_resource_destroy;
 713 }