src/gallium/drivers/etnaviv/etnaviv_resource.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_resource.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_screen.h"
  34 #include "etnaviv_translate.h"
  35
  36 #include "util/hash_table.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
  43 {
  44    switch (modifier) {
  45    case DRM_FORMAT_MOD_VIVANTE_TILED:
  46       return ETNA_LAYOUT_TILED;
  47    case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
  48       return ETNA_LAYOUT_SUPER_TILED;
  49    case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
  50       return ETNA_LAYOUT_MULTI_TILED;
  51    case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
  52       return ETNA_LAYOUT_MULTI_SUPERTILED;
  53    case DRM_FORMAT_MOD_LINEAR:
  54    default:
  55       return ETNA_LAYOUT_LINEAR;
  56    }
  57 }
  58
  59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
  60 {
  61    switch (layout) {
  62    case ETNA_LAYOUT_TILED:
  63       return DRM_FORMAT_MOD_VIVANTE_TILED;
  64    case ETNA_LAYOUT_SUPER_TILED:
  65       return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
  66    case ETNA_LAYOUT_MULTI_TILED:
  67       return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
  68    case ETNA_LAYOUT_MULTI_SUPERTILED:
  69       return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
  70    case ETNA_LAYOUT_LINEAR:
  71       return DRM_FORMAT_MOD_LINEAR;
  72    default:
  73       return DRM_FORMAT_MOD_INVALID;
  74    }
  75 }
  76
  77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
  78  * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
  79  * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
  80  * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
  81  */
  82 bool
  83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
  84                               struct etna_resource *rsc)
  85 {
  86    struct etna_screen *screen = etna_screen(pscreen);
  87    size_t rt_ts_size, ts_layer_stride;
  88    size_t ts_bits_per_tile, bytes_per_tile;
  89    uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
  90    int8_t ts_compress_fmt;
  91
  92    assert(!rsc->ts_bo);
  93
  94    /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
  95     * v4 compression can be enabled everywhere without any known drawback,
  96     * except that in-place resolve must go through a slower path
  97     */
  98    ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
  99                       translate_ts_format(rsc->base.format) : -1;
 100
 101    if (screen->specs.halti >= 5) {
 102       /* enable 256B ts mode with compression, as it improves performance
 103        * the size of the resource might also determine if we want to use it or not
 104        */
 105       if (ts_compress_fmt >= 0)
 106          ts_mode = TS_MODE_256B;
 107
 108       ts_bits_per_tile = 4;
 109       bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
 110    } else {
 111       ts_bits_per_tile = screen->specs.bits_per_tile;
 112       bytes_per_tile = 64;
 113    }
 114
 115    ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
 116                                         bytes_per_tile * 8 / ts_bits_per_tile),
 117                            0x100 * screen->specs.pixel_pipes);
 118    rt_ts_size = ts_layer_stride * rsc->base.array_size;
 119    if (rt_ts_size == 0)
 120       return true;
 121
 122    DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
 123          rsc, rt_ts_size);
 124
 125    struct etna_bo *rt_ts;
 126    rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
 127
 128    if (unlikely(!rt_ts)) {
 129       BUG("Problem allocating tile status for resource");
 130       return false;
 131    }
 132
 133    rsc->ts_bo = rt_ts;
 134    rsc->levels[0].ts_offset = 0;
 135    rsc->levels[0].ts_layer_stride = ts_layer_stride;
 136    rsc->levels[0].ts_size = rt_ts_size;
 137    rsc->levels[0].ts_mode = ts_mode;
 138    rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
 139
 140    return true;
 141 }
 142
 143 static bool
 144 etna_screen_can_create_resource(struct pipe_screen *pscreen,
 145                                 const struct pipe_resource *templat)
 146 {
 147    struct etna_screen *screen = etna_screen(pscreen);
 148    if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
 149       return false;
 150
 151    /* templat->bind is not set here, so we must use the minimum sizes */
 152    uint max_size =
 153       MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
 154
 155    if (templat->width0 > max_size || templat->height0 > max_size)
 156       return false;
 157
 158    return true;
 159 }
 160
 161 static unsigned
 162 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
 163               unsigned msaa_xscale, unsigned msaa_yscale)
 164 {
 165    struct pipe_resource *prsc = &rsc->base;
 166    unsigned level, size = 0;
 167    unsigned width = prsc->width0;
 168    unsigned height = prsc->height0;
 169    unsigned depth = prsc->depth0;
 170
 171    for (level = 0; level <= prsc->last_level; level++) {
 172       struct etna_resource_level *mip = &rsc->levels[level];
 173
 174       mip->width = width;
 175       mip->height = height;
 176       mip->depth = depth;
 177       mip->padded_width = align(width * msaa_xscale, paddingX);
 178       mip->padded_height = align(height * msaa_yscale, paddingY);
 179       mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
 180       mip->offset = size;
 181       mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
 182       mip->size = prsc->array_size * mip->layer_stride;
 183
 184       /* align levels to 64 bytes to be able to render to them */
 185       size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
 186
 187       width = u_minify(width, 1);
 188       height = u_minify(height, 1);
 189       depth = u_minify(depth, 1);
 190    }
 191
 192    return size;
 193 }
 194
 195 /* Is rs alignment needed? */
 196 static bool is_rs_align(struct etna_screen *screen,
 197                         const struct pipe_resource *tmpl)
 198 {
 199    return screen->specs.use_blt ? false : (
 200       VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
 201       !etna_resource_sampler_only(tmpl));
 202 }
 203
 204 /* Create a new resource object, using the given template info */
 205 struct pipe_resource *
 206 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
 207                     uint64_t modifier, const struct pipe_resource *templat)
 208 {
 209    struct etna_screen *screen = etna_screen(pscreen);
 210    struct etna_resource *rsc;
 211    unsigned size;
 212
 213    DBG_F(ETNA_DBG_RESOURCE_MSGS,
 214          "target=%d, format=%s, %ux%ux%u, array_size=%u, "
 215          "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
 216          templat->target, util_format_name(templat->format), templat->width0,
 217          templat->height0, templat->depth0, templat->array_size,
 218          templat->last_level, templat->nr_samples, templat->usage,
 219          templat->bind, templat->flags);
 220
 221    /* Determine scaling for antialiasing, allow override using debug flag */
 222    int nr_samples = templat->nr_samples;
 223    if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 224        !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
 225       if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
 226          nr_samples = 2;
 227       if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
 228          nr_samples = 4;
 229    }
 230
 231    int msaa_xscale = 1, msaa_yscale = 1;
 232    if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
 233       /* Number of samples not supported */
 234       return NULL;
 235    }
 236
 237    /* Determine needed padding (alignment of height/width) */
 238    unsigned paddingX = 0, paddingY = 0;
 239    unsigned halign = TEXTURE_HALIGN_FOUR;
 240    if (!util_format_is_compressed(templat->format)) {
 241       /* If we have the TEXTURE_HALIGN feature, we can always align to the
 242        * resolve engine's width.  If not, we must not align resources used
 243        * only for textures. If this GPU uses the BLT engine, never do RS align.
 244        */
 245       etna_layout_multiple(layout, screen->specs.pixel_pipes,
 246                            is_rs_align (screen, templat),
 247                            &paddingX, &paddingY, &halign);
 248       assert(paddingX && paddingY);
 249    } else {
 250       /* Compressed textures are padded to their block size, but we don't have
 251        * to do anything special for that. */
 252       paddingX = 1;
 253       paddingY = 1;
 254    }
 255
 256    if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
 257       paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 258
 259    if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
 260       struct pipe_resource scanout_templat = *templat;
 261       struct renderonly_scanout *scanout;
 262       struct winsys_handle handle;
 263
 264       /* pad scanout buffer size to be compatible with the RS */
 265       if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR) {
 266          paddingX = align(paddingX, ETNA_RS_WIDTH_MASK + 1);
 267          paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 268       }
 269
 270       scanout_templat.width0 = align(scanout_templat.width0, paddingX);
 271       scanout_templat.height0 = align(scanout_templat.height0, paddingY);
 272
 273       scanout = renderonly_scanout_for_resource(&scanout_templat,
 274                                                 screen->ro, &handle);
 275       if (!scanout)
 276          return NULL;
 277
 278       assert(handle.type == WINSYS_HANDLE_TYPE_FD);
 279       handle.modifier = modifier;
 280       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
 281                                                         &handle,
 282                                                         PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
 283       close(handle.handle);
 284       if (!rsc)
 285          return NULL;
 286
 287       rsc->scanout = scanout;
 288
 289       return &rsc->base;
 290    }
 291
 292    rsc = CALLOC_STRUCT(etna_resource);
 293    if (!rsc)
 294       return NULL;
 295
 296    rsc->base = *templat;
 297    rsc->base.screen = pscreen;
 298    rsc->base.nr_samples = nr_samples;
 299    rsc->layout = layout;
 300    rsc->halign = halign;
 301
 302    pipe_reference_init(&rsc->base.reference, 1);
 303
 304    size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
 305
 306    uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
 307    if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
 308       flags |= DRM_ETNA_GEM_FORCE_MMU;
 309    struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
 310    if (unlikely(bo == NULL)) {
 311       BUG("Problem allocating video memory for resource");
 312       goto free_rsc;
 313    }
 314
 315    rsc->bo = bo;
 316    rsc->ts_bo = 0; /* TS is only created when first bound to surface */
 317
 318    if (DBG_ENABLED(ETNA_DBG_ZERO)) {
 319       void *map = etna_bo_map(bo);
 320       memset(map, 0, size);
 321    }
 322
 323    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 324                                        _mesa_key_pointer_equal);
 325    if (!rsc->pending_ctx)
 326       goto free_rsc;
 327
 328    return &rsc->base;
 329
 330 free_rsc:
 331    FREE(rsc);
 332    return NULL;
 333 }
 334
 335 static struct pipe_resource *
 336 etna_resource_create(struct pipe_screen *pscreen,
 337                      const struct pipe_resource *templat)
 338 {
 339    struct etna_screen *screen = etna_screen(pscreen);
 340
 341    /* Figure out what tiling to use -- we always use tiled layouts,
 342     * except for scanout/dmabuf (which don't go through this path)
 343     * Buffers always have LINEAR layout.
 344     */
 345    unsigned layout = ETNA_LAYOUT_LINEAR;
 346
 347    if (etna_resource_sampler_only(templat)) {
 348       /* The buffer is only used for texturing, so create something
 349        * directly compatible with the sampler.  Such a buffer can
 350        * never be rendered to. */
 351       layout = ETNA_LAYOUT_TILED;
 352
 353       if (util_format_is_compressed(templat->format))
 354          layout = ETNA_LAYOUT_LINEAR;
 355    } else if (templat->target != PIPE_BUFFER) {
 356       bool want_multitiled = false;
 357       bool want_supertiled = screen->specs.can_supertile;
 358
 359       /* When this GPU supports single-buffer rendering, don't ever enable
 360        * multi-tiling. This replicates the blob behavior on GC3000.
 361        */
 362       if (!screen->specs.single_buffer)
 363          want_multitiled = screen->specs.pixel_pipes > 1;
 364
 365       /* Keep single byte blocksized resources as tiled, since we
 366        * are unable to use the RS blit to de-tile them. However,
 367        * if they're used as a render target or depth/stencil, they
 368        * must be multi-tiled for GPUs with multiple pixel pipes.
 369        * Ignore depth/stencil here, but it is an error for a render
 370        * target.
 371        */
 372       if (util_format_get_blocksize(templat->format) == 1 &&
 373           !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
 374          assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
 375          want_multitiled = want_supertiled = false;
 376       }
 377
 378       layout = ETNA_LAYOUT_BIT_TILE;
 379       if (want_multitiled)
 380          layout |= ETNA_LAYOUT_BIT_MULTI;
 381       if (want_supertiled)
 382          layout |= ETNA_LAYOUT_BIT_SUPER;
 383    }
 384
 385    if (templat->target == PIPE_TEXTURE_3D)
 386       layout = ETNA_LAYOUT_LINEAR;
 387
 388    /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
 389    return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
 390 }
 391
 392 enum modifier_priority {
 393    MODIFIER_PRIORITY_INVALID = 0,
 394    MODIFIER_PRIORITY_LINEAR,
 395    MODIFIER_PRIORITY_SPLIT_TILED,
 396    MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
 397    MODIFIER_PRIORITY_TILED,
 398    MODIFIER_PRIORITY_SUPER_TILED,
 399 };
 400
 401 const uint64_t priority_to_modifier[] = {
 402    [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
 403    [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
 404    [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
 405    [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
 406    [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
 407    [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
 408 };
 409
 410 static uint64_t
 411 select_best_modifier(const struct etna_screen * screen,
 412                      const uint64_t *modifiers, const unsigned count)
 413 {
 414    enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
 415
 416    for (int i = 0; i < count; i++) {
 417       switch (modifiers[i]) {
 418       case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
 419          if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
 420              !screen->specs.can_supertile)
 421             break;
 422          prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
 423          break;
 424       case DRM_FORMAT_MOD_VIVANTE_TILED:
 425          if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
 426             break;
 427          prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
 428          break;
 429       case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
 430          if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
 431             break;
 432          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
 433          break;
 434       case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
 435          if (screen->specs.pixel_pipes < 2)
 436             break;
 437          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
 438          break;
 439       case DRM_FORMAT_MOD_LINEAR:
 440          prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
 441          break;
 442       case DRM_FORMAT_MOD_INVALID:
 443       default:
 444          break;
 445       }
 446    }
 447
 448    return priority_to_modifier[prio];
 449 }
 450
 451 static struct pipe_resource *
 452 etna_resource_create_modifiers(struct pipe_screen *pscreen,
 453                                const struct pipe_resource *templat,
 454                                const uint64_t *modifiers, int count)
 455 {
 456    struct etna_screen *screen = etna_screen(pscreen);
 457    struct pipe_resource tmpl = *templat;
 458    uint64_t modifier = select_best_modifier(screen, modifiers, count);
 459
 460    if (modifier == DRM_FORMAT_MOD_INVALID)
 461       return NULL;
 462
 463    /*
 464     * We currently assume that all buffers allocated through this interface
 465     * should be scanout enabled.
 466     */
 467    tmpl.bind |= PIPE_BIND_SCANOUT;
 468
 469    return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
 470 }
 471
 472 static void
 473 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 474 {
 475    struct etna_resource *res = etna_resource(prsc);
 476
 477    if (res->external)
 478       etna_resource(res->external)->seqno++;
 479    else
 480       res->seqno++;
 481 }
 482
 483 static void
 484 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 485 {
 486    struct etna_screen *screen = etna_screen(pscreen);
 487    struct etna_resource *rsc = etna_resource(prsc);
 488
 489    mtx_lock(&screen->lock);
 490    _mesa_set_remove_key(screen->used_resources, rsc);
 491    _mesa_set_destroy(rsc->pending_ctx, NULL);
 492    mtx_unlock(&screen->lock);
 493
 494    if (rsc->bo)
 495       etna_bo_del(rsc->bo);
 496
 497    if (rsc->ts_bo)
 498       etna_bo_del(rsc->ts_bo);
 499
 500    if (rsc->scanout)
 501       renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
 502
 503    pipe_resource_reference(&rsc->texture, NULL);
 504    pipe_resource_reference(&rsc->external, NULL);
 505
 506    for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
 507       FREE(rsc->levels[i].patch_offsets);
 508
 509    FREE(rsc);
 510 }
 511
 512 static struct pipe_resource *
 513 etna_resource_from_handle(struct pipe_screen *pscreen,
 514                           const struct pipe_resource *tmpl,
 515                           struct winsys_handle *handle, unsigned usage)
 516 {
 517    struct etna_screen *screen = etna_screen(pscreen);
 518    struct etna_resource *rsc;
 519    struct etna_resource_level *level;
 520    struct pipe_resource *prsc;
 521    struct pipe_resource *ptiled = NULL;
 522
 523    DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
 524        "nr_samples=%u, usage=%u, bind=%x, flags=%x",
 525        tmpl->target, util_format_name(tmpl->format), tmpl->width0,
 526        tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
 527        tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
 528
 529    rsc = CALLOC_STRUCT(etna_resource);
 530    if (!rsc)
 531       return NULL;
 532
 533    level = &rsc->levels[0];
 534    prsc = &rsc->base;
 535
 536    *prsc = *tmpl;
 537
 538    pipe_reference_init(&prsc->reference, 1);
 539    prsc->screen = pscreen;
 540
 541    rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
 542    if (!rsc->bo)
 543       goto fail;
 544
 545    rsc->seqno = 1;
 546    rsc->layout = modifier_to_layout(handle->modifier);
 547    rsc->halign = TEXTURE_HALIGN_FOUR;
 548
 549    level->width = tmpl->width0;
 550    level->height = tmpl->height0;
 551    level->depth = tmpl->depth0;
 552    level->offset = handle->offset;
 553
 554    /* Determine padding of the imported resource. */
 555    unsigned paddingX = 0, paddingY = 0;
 556    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
 557                         is_rs_align(screen, tmpl),
 558                         &paddingX, &paddingY, &rsc->halign);
 559
 560    if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
 561       paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
 562    level->padded_width = align(level->width, paddingX);
 563    level->padded_height = align(level->height, paddingY);
 564
 565    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
 566                                                                   level->padded_height);
 567    level->size = level->layer_stride;
 568
 569    /* The DDX must give us a BO which conforms to our padding size.
 570     * The stride of the BO must be greater or equal to our padded
 571     * stride. The size of the BO must accomodate the padded height. */
 572    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
 573       BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
 574           level->stride, util_format_get_stride(tmpl->format, level->padded_width),
 575           util_format_name(tmpl->format));
 576       goto fail;
 577    }
 578    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
 579       BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
 580           etna_bo_size(rsc->bo), level->stride * level->padded_height,
 581           util_format_name(tmpl->format));
 582       goto fail;
 583    }
 584
 585    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 586                                        _mesa_key_pointer_equal);
 587    if (!rsc->pending_ctx)
 588       goto fail;
 589
 590    if (rsc->layout == ETNA_LAYOUT_LINEAR) {
 591       /*
 592        * Both sampler and pixel pipes can't handle linear, create a compatible
 593        * base resource, where we can attach the imported buffer as an external
 594        * resource.
 595        */
 596       struct pipe_resource tiled_templat = *tmpl;
 597
 598       /*
 599        * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
 600        * this function to import the scanout buffer and get a tiled resource.
 601        */
 602       tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
 603
 604       ptiled = etna_resource_create(pscreen, &tiled_templat);
 605       if (!ptiled)
 606          goto fail;
 607
 608       etna_resource(ptiled)->external = prsc;
 609
 610       return ptiled;
 611    }
 612
 613    return prsc;
 614
 615 fail:
 616    etna_resource_destroy(pscreen, prsc);
 617    if (ptiled)
 618       etna_resource_destroy(pscreen, ptiled);
 619
 620    return NULL;
 621 }
 622
 623 static bool
 624 etna_resource_get_handle(struct pipe_screen *pscreen,
 625                          struct pipe_context *pctx,
 626                          struct pipe_resource *prsc,
 627                          struct winsys_handle *handle, unsigned usage)
 628 {
 629    struct etna_resource *rsc = etna_resource(prsc);
 630    /* Scanout is always attached to the base resource */
 631    struct renderonly_scanout *scanout = rsc->scanout;
 632
 633    /*
 634     * External resources are preferred, so a import->export chain of
 635     * render/sampler incompatible buffers yield the same handle.
 636     */
 637    if (rsc->external)
 638       rsc = etna_resource(rsc->external);
 639
 640    handle->stride = rsc->levels[0].stride;
 641    handle->offset = rsc->levels[0].offset;
 642    handle->modifier = layout_to_modifier(rsc->layout);
 643
 644    if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
 645       return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
 646    } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
 647       if (renderonly_get_handle(scanout, handle)) {
 648          return true;
 649       } else {
 650          handle->handle = etna_bo_handle(rsc->bo);
 651          return true;
 652       }
 653    } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
 654       handle->handle = etna_bo_dmabuf(rsc->bo);
 655       return true;
 656    } else {
 657       return false;
 658    }
 659 }
 660
 661 void
 662 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
 663                    enum etna_resource_status status)
 664 {
 665    struct etna_screen *screen = ctx->screen;
 666    struct etna_resource *rsc;
 667
 668    if (!prsc)
 669       return;
 670
 671    rsc = etna_resource(prsc);
 672
 673    mtx_lock(&screen->lock);
 674
 675    /*
 676     * if we are pending read or write by any other context or
 677     * if reading a resource pending a write, then
 678     * flush all the contexts to maintain coherency
 679     */
 680    if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
 681        ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
 682       set_foreach(rsc->pending_ctx, entry) {
 683          struct etna_context *extctx = (struct etna_context *)entry->key;
 684          struct pipe_context *pctx = &extctx->base;
 685
 686          if (extctx == ctx)
 687             continue;
 688
 689          pctx->flush(pctx, NULL, 0);
 690          /* It's safe to clear the status here. If we need to flush it means
 691           * either another context had the resource in exclusive (write) use,
 692           * or we transition the resource to exclusive use in our context.
 693           * In both cases the new status accurately reflects the resource use
 694           * after the flush.
 695           */
 696          rsc->status = 0;
 697       }
 698    }
 699
 700    rsc->status |= status;
 701
 702    _mesa_set_add(screen->used_resources, rsc);
 703    _mesa_set_add(rsc->pending_ctx, ctx);
 704
 705    mtx_unlock(&screen->lock);
 706 }
 707
 708 bool
 709 etna_resource_has_valid_ts(struct etna_resource *rsc)
 710 {
 711    if (!rsc->ts_bo)
 712       return false;
 713
 714    for (int level = 0; level <= rsc->base.last_level; level++)
 715       if (rsc->levels[level].ts_valid)
 716          return true;
 717
 718    return false;
 719 }
 720
 721 void
 722 etna_resource_screen_init(struct pipe_screen *pscreen)
 723 {
 724    pscreen->can_create_resource = etna_screen_can_create_resource;
 725    pscreen->resource_create = etna_resource_create;
 726    pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
 727    pscreen->resource_from_handle = etna_resource_from_handle;
 728    pscreen->resource_get_handle = etna_resource_get_handle;
 729    pscreen->resource_changed = etna_resource_changed;
 730    pscreen->resource_destroy = etna_resource_destroy;
 731 }