etnaviv: implement TS_MODE for GC7000L
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_texture.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_texture.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_context.h"
33 #include "etnaviv_emit.h"
34 #include "etnaviv_format.h"
35 #include "etnaviv_texture_state.h"
36 #include "etnaviv_translate.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39
40 #include "drm-uapi/drm_fourcc.h"
41
42 static void
43 etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader,
44 unsigned start_slot, unsigned num_samplers,
45 void **samplers)
46 {
47 /* bind fragment sampler */
48 struct etna_context *ctx = etna_context(pctx);
49 int offset;
50
51 switch (shader) {
52 case PIPE_SHADER_FRAGMENT:
53 offset = 0;
54 ctx->num_fragment_samplers = num_samplers;
55 break;
56 case PIPE_SHADER_VERTEX:
57 offset = ctx->specs.vertex_sampler_offset;
58 break;
59 default:
60 assert(!"Invalid shader");
61 return;
62 }
63
64 uint32_t mask = 1 << offset;
65 for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) {
66 ctx->sampler[offset + idx] = samplers[idx];
67 if (samplers[idx])
68 ctx->active_samplers |= mask;
69 else
70 ctx->active_samplers &= ~mask;
71 }
72
73 ctx->dirty |= ETNA_DIRTY_SAMPLERS;
74 }
75
76 static void
77 etna_configure_sampler_ts(struct etna_sampler_ts *sts, struct pipe_sampler_view *pview, bool enable)
78 {
79 assert(sts);
80 sts->enable = enable;
81 if (enable) {
82 struct etna_resource *rsc = etna_resource(pview->texture);
83 struct etna_resource_level *lev = &rsc->levels[0];
84 assert(rsc->ts_bo && lev->ts_valid);
85
86 sts->mode = lev->ts_mode;
87 sts->TS_SAMPLER_CONFIG =
88 VIVS_TS_SAMPLER_CONFIG_ENABLE |
89 VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT(translate_ts_sampler_format(rsc->base.format));
90 sts->TS_SAMPLER_CLEAR_VALUE = lev->clear_value;
91 sts->TS_SAMPLER_CLEAR_VALUE2 = lev->clear_value; /* To handle 64-bit formats this needs a different value */
92 sts->TS_SAMPLER_STATUS_BASE.bo = rsc->ts_bo;
93 sts->TS_SAMPLER_STATUS_BASE.offset = lev->ts_offset;
94 sts->TS_SAMPLER_STATUS_BASE.flags = ETNA_RELOC_READ;
95 } else {
96 sts->TS_SAMPLER_CONFIG = 0;
97 sts->TS_SAMPLER_STATUS_BASE.bo = NULL;
98 }
99 /* n.b.: relies on caller to mark ETNA_DIRTY_SAMPLER_VIEWS */
100 }
101
102 /* Return true if the GPU can use sampler TS with this sampler view.
103 * Sampler TS is an optimization used when rendering to textures, where
104 * a resolve-in-place can be avoided when rendering has left a (valid) TS.
105 */
106 static bool
107 etna_can_use_sampler_ts(struct pipe_sampler_view *view, int num)
108 {
109 /* Can use sampler TS when:
110 * - the hardware supports sampler TS.
111 * - the sampler view will be bound to sampler <VIVS_TS_SAMPLER__LEN.
112 * HALTI5 adds a mapping from sampler to sampler TS unit, but this is AFAIK
113 * absent on earlier models.
114 * - it is a texture, not a buffer.
115 * - the sampler view has a supported format for sampler TS.
116 * - the sampler will have one LOD, and it happens to be level 0.
117 * (it is not sure if the hw supports it for other levels, but available
118 * state strongly suggests only one at a time).
119 * - the resource TS is valid for level 0.
120 */
121 struct etna_resource *rsc = etna_resource(view->texture);
122 struct etna_screen *screen = etna_screen(rsc->base.screen);
123 return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
124 num < VIVS_TS_SAMPLER__LEN &&
125 rsc->base.target != PIPE_BUFFER &&
126 translate_ts_sampler_format(rsc->base.format) != ETNA_NO_MATCH &&
127 view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level, rsc->base.last_level) == 0 &&
128 rsc->levels[0].ts_valid;
129 }
130
131 static void
132 etna_update_sampler_source(struct pipe_sampler_view *view, int num)
133 {
134 struct etna_resource *base = etna_resource(view->texture);
135 struct etna_resource *to = base, *from = base;
136 struct etna_context *ctx = etna_context(view->context);
137 bool enable_sampler_ts = false;
138
139 if (base->external && etna_resource_newer(etna_resource(base->external), base))
140 from = etna_resource(base->external);
141
142 if (base->texture)
143 to = etna_resource(base->texture);
144
145 if ((to != from) && etna_resource_older(to, from)) {
146 etna_copy_resource(view->context, &to->base, &from->base, 0,
147 view->texture->last_level);
148 to->seqno = from->seqno;
149 } else if ((to == from) && etna_resource_needs_flush(to)) {
150 if (ctx->ts_for_sampler_view && etna_can_use_sampler_ts(view, num)) {
151 enable_sampler_ts = true;
152 /* Do not set flush_seqno because the resolve-to-self was bypassed */
153 } else {
154 /* Resolve TS if needed */
155 etna_copy_resource(view->context, &to->base, &from->base, 0,
156 view->texture->last_level);
157 to->flush_seqno = from->seqno;
158 }
159 }
160 if (ctx->ts_for_sampler_view) {
161 etna_configure_sampler_ts(ctx->ts_for_sampler_view(view), view, enable_sampler_ts);
162 }
163 }
164
165 static bool
166 etna_resource_sampler_compatible(struct etna_resource *res)
167 {
168 if (util_format_is_compressed(res->base.format))
169 return true;
170
171 struct etna_screen *screen = etna_screen(res->base.screen);
172 /* This GPU supports texturing from supertiled textures? */
173 if (res->layout == ETNA_LAYOUT_SUPER_TILED && VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE))
174 return true;
175
176 /* This GPU supports texturing from linear textures? */
177 if (res->layout == ETNA_LAYOUT_LINEAR && VIV_FEATURE(screen, chipMinorFeatures1, LINEAR_TEXTURE_SUPPORT))
178 return true;
179
180 /* Otherwise, only support tiled layouts */
181 if (res->layout != ETNA_LAYOUT_TILED)
182 return false;
183
184 /* If we have HALIGN support, we can allow for the RS padding */
185 if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN))
186 return true;
187
188 /* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */
189 if (res->halign != TEXTURE_HALIGN_FOUR)
190 return false;
191
192 return true;
193 }
194
195 struct etna_resource *
196 etna_texture_handle_incompatible(struct pipe_context *pctx, struct pipe_resource *prsc)
197 {
198 struct etna_resource *res = etna_resource(prsc);
199 if (!etna_resource_sampler_compatible(res)) {
200 /* The original resource is not compatible with the sampler.
201 * Allocate an appropriately tiled texture. */
202 if (!res->texture) {
203 struct pipe_resource templat = *prsc;
204
205 templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
206 PIPE_BIND_BLENDABLE);
207 res->texture =
208 etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED,
209 ETNA_ADDRESSING_MODE_TILED,
210 DRM_FORMAT_MOD_LINEAR, &templat);
211 }
212
213 if (!res->texture) {
214 return NULL;
215 }
216 res = etna_resource(res->texture);
217 }
218 return res;
219 }
220
221 static void
222 set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end,
223 unsigned nr, struct pipe_sampler_view **views)
224 {
225 unsigned i, j;
226 uint32_t mask = 1 << start;
227 uint32_t prev_active_sampler_views = ctx->active_sampler_views;
228
229 for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
230 pipe_sampler_view_reference(&ctx->sampler_view[i], views[j]);
231 if (views[j]) {
232 ctx->active_sampler_views |= mask;
233 ctx->dirty_sampler_views |= mask;
234 } else
235 ctx->active_sampler_views &= ~mask;
236 }
237
238 for (; i < end; i++, mask <<= 1) {
239 pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
240 ctx->active_sampler_views &= ~mask;
241 }
242
243 /* sampler views that changed state (even to inactive) are also dirty */
244 ctx->dirty_sampler_views |= ctx->active_sampler_views ^ prev_active_sampler_views;
245 }
246
247 static inline void
248 etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr,
249 struct pipe_sampler_view **views)
250 {
251 unsigned start = 0;
252 unsigned end = start + ctx->specs.fragment_sampler_count;
253
254 set_sampler_views(ctx, start, end, nr, views);
255 ctx->num_fragment_sampler_views = nr;
256 }
257
258
259 static inline void
260 etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr,
261 struct pipe_sampler_view **views)
262 {
263 unsigned start = ctx->specs.vertex_sampler_offset;
264 unsigned end = start + ctx->specs.vertex_sampler_count;
265
266 set_sampler_views(ctx, start, end, nr, views);
267 }
268
269 static void
270 etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
271 unsigned start_slot, unsigned num_views,
272 struct pipe_sampler_view **views)
273 {
274 struct etna_context *ctx = etna_context(pctx);
275 assert(start_slot == 0);
276
277 ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
278
279 for (unsigned idx = 0; idx < num_views; ++idx) {
280 if (views[idx])
281 etna_update_sampler_source(views[idx], idx);
282 }
283
284 switch (shader) {
285 case PIPE_SHADER_FRAGMENT:
286 etna_fragtex_set_sampler_views(ctx, num_views, views);
287 break;
288 case PIPE_SHADER_VERTEX:
289 etna_vertex_set_sampler_views(ctx, num_views, views);
290 break;
291 default:;
292 }
293 }
294
295 static void
296 etna_texture_barrier(struct pipe_context *pctx, unsigned flags)
297 {
298 struct etna_context *ctx = etna_context(pctx);
299 /* clear color and texture cache to make sure that texture unit reads
300 * what has been written */
301 etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE);
302 }
303
304 uint32_t
305 active_samplers_bits(struct etna_context *ctx)
306 {
307 return ctx->active_sampler_views & ctx->active_samplers;
308 }
309
310 void
311 etna_texture_init(struct pipe_context *pctx)
312 {
313 pctx->bind_sampler_states = etna_bind_sampler_states;
314 pctx->set_sampler_views = etna_set_sampler_views;
315 pctx->texture_barrier = etna_texture_barrier;
316 etna_texture_state_init(pctx);
317 }