etnaviv: add flags parameter to texture barrier
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_texture.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_texture.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_context.h"
33 #include "etnaviv_emit.h"
34 #include "etnaviv_format.h"
35 #include "etnaviv_translate.h"
36 #include "util/u_inlines.h"
37 #include "util/u_memory.h"
38
39 static void *
40 etna_create_sampler_state(struct pipe_context *pipe,
41 const struct pipe_sampler_state *ss)
42 {
43 struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
44
45 if (!cs)
46 return NULL;
47
48 cs->TE_SAMPLER_CONFIG0 =
49 VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) |
50 VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) |
51 VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) |
52 VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
53 VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) |
54 COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV);
55 cs->TE_SAMPLER_CONFIG1 = 0; /* VIVS_TE_SAMPLER_CONFIG1 (swizzle, extended
56 format) fully determined by sampler view */
57 cs->TE_SAMPLER_LOD_CONFIG =
58 COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
59 VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
60
61 if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
62 cs->min_lod = etna_float_to_fixp55(ss->min_lod);
63 cs->max_lod = etna_float_to_fixp55(ss->max_lod);
64 } else {
65 /* when not mipmapping, we need to set max/min lod so that always
66 * lowest LOD is selected */
67 cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod);
68 }
69
70 return cs;
71 }
72
73 static void
74 etna_bind_sampler_states(struct pipe_context *pctx, unsigned shader,
75 unsigned start_slot, unsigned num_samplers,
76 void **samplers)
77 {
78 /* bind fragment sampler */
79 struct etna_context *ctx = etna_context(pctx);
80 int offset;
81
82 switch (shader) {
83 case PIPE_SHADER_FRAGMENT:
84 offset = 0;
85 ctx->num_fragment_samplers = num_samplers;
86 break;
87 case PIPE_SHADER_VERTEX:
88 offset = ctx->specs.vertex_sampler_offset;
89 break;
90 default:
91 assert(!"Invalid shader");
92 return;
93 }
94
95 uint32_t mask = 1 << offset;
96 for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) {
97 ctx->sampler[offset + idx] = samplers[idx];
98 if (samplers[idx])
99 ctx->active_samplers |= mask;
100 else
101 ctx->active_samplers &= ~mask;
102 }
103
104 ctx->dirty |= ETNA_DIRTY_SAMPLERS;
105 }
106
107 static void
108 etna_delete_sampler_state(struct pipe_context *pctx, void *ss)
109 {
110 FREE(ss);
111 }
112
113 static void
114 etna_update_sampler_source(struct pipe_sampler_view *view)
115 {
116 struct etna_resource *res = etna_resource(view->texture);
117
118 if (res->texture && etna_resource_older(etna_resource(res->texture), res)) {
119 /* Texture is older than render buffer, copy the texture using RS */
120 etna_copy_resource(view->context, res->texture, view->texture, 0,
121 view->texture->last_level);
122 etna_resource(res->texture)->seqno = res->seqno;
123 }
124 }
125
126 static bool
127 etna_resource_sampler_compatible(struct etna_resource *res)
128 {
129 if (util_format_is_compressed(res->base.format))
130 return true;
131
132 /* The sampler (as we currently know it) only accepts tiled layouts */
133 if (res->layout != ETNA_LAYOUT_TILED)
134 return false;
135
136 /* If we have HALIGN support, we can allow for the RS padding */
137 struct etna_screen *screen = etna_screen(res->base.screen);
138 if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN))
139 return true;
140
141 /* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */
142 if (res->halign != TEXTURE_HALIGN_FOUR)
143 return false;
144
145 return true;
146 }
147
148 static struct pipe_sampler_view *
149 etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
150 const struct pipe_sampler_view *so)
151 {
152 struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
153 struct etna_resource *res = etna_resource(prsc);
154 struct etna_context *ctx = etna_context(pctx);
155
156 if (!sv)
157 return NULL;
158
159 if (!etna_resource_sampler_compatible(res)) {
160 /* The original resource is not compatible with the sampler.
161 * Allocate an appropriately tiled texture. */
162 if (!res->texture) {
163 struct pipe_resource templat = *prsc;
164
165 templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
166 PIPE_BIND_BLENDABLE);
167 res->texture =
168 etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED, &templat);
169 }
170
171 if (!res->texture) {
172 free(sv);
173 return NULL;
174 }
175 res = etna_resource(res->texture);
176 }
177
178 sv->base = *so;
179 pipe_reference(NULL, &prsc->reference);
180 sv->base.texture = prsc;
181 sv->base.reference.count = 1;
182 sv->base.context = pctx;
183
184 /* merged with sampler state */
185 sv->TE_SAMPLER_CONFIG0 =
186 VIVS_TE_SAMPLER_CONFIG0_FORMAT(translate_texture_format(sv->base.format));
187 sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff;
188
189 switch (sv->base.target) {
190 case PIPE_TEXTURE_1D:
191 /* For 1D textures, we will have a height of 1, so we can use 2D
192 * but set T wrap to repeat */
193 sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK;
194 sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT);
195 case PIPE_TEXTURE_2D:
196 case PIPE_TEXTURE_RECT:
197 sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D);
198 break;
199 case PIPE_TEXTURE_CUBE:
200 sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_CUBE_MAP);
201 break;
202 default:
203 BUG("Unhandled texture target");
204 free(sv);
205 return NULL;
206 }
207
208 sv->TE_SAMPLER_CONFIG1 = VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R(so->swizzle_r) |
209 VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G(so->swizzle_g) |
210 VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B(so->swizzle_b) |
211 VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(so->swizzle_a) |
212 VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign);
213 sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) |
214 VIVS_TE_SAMPLER_SIZE_HEIGHT(res->base.height0);
215 sv->TE_SAMPLER_LOG_SIZE =
216 VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) |
217 VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0));
218
219 /* Set up levels-of-detail */
220 for (int lod = 0; lod <= res->base.last_level; ++lod) {
221 sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo;
222 sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset;
223 sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ;
224 }
225 sv->min_lod = sv->base.u.tex.first_level << 5;
226 sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
227
228 /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
229 * supported when the appropriate capability is not set. */
230 if (!ctx->specs.npot_tex_any_wrap &&
231 (!util_is_power_of_two(res->base.width0) || !util_is_power_of_two(res->base.height0))) {
232 sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
233 VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);
234 sv->TE_SAMPLER_CONFIG0 |=
235 VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) |
236 VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE);
237 }
238
239 return &sv->base;
240 }
241
242 static void
243 etna_sampler_view_destroy(struct pipe_context *pctx,
244 struct pipe_sampler_view *view)
245 {
246 pipe_resource_reference(&view->texture, NULL);
247 FREE(view);
248 }
249
250 static void
251 set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end,
252 unsigned nr, struct pipe_sampler_view **views)
253 {
254 unsigned i, j;
255 uint32_t mask = 1 << start;
256
257 for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
258 pipe_sampler_view_reference(&ctx->sampler_view[i], views[j]);
259 if (views[j])
260 ctx->active_sampler_views |= mask;
261 else
262 ctx->active_sampler_views &= ~mask;
263 }
264
265 for (; i < end; i++, mask <<= 1) {
266 pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
267 ctx->active_sampler_views &= ~mask;
268 }
269 }
270
271 static inline void
272 etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr,
273 struct pipe_sampler_view **views)
274 {
275 unsigned start = 0;
276 unsigned end = start + ctx->specs.fragment_sampler_count;
277
278 set_sampler_views(ctx, start, end, nr, views);
279 ctx->num_fragment_sampler_views = nr;
280 }
281
282
283 static inline void
284 etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr,
285 struct pipe_sampler_view **views)
286 {
287 unsigned start = ctx->specs.vertex_sampler_offset;
288 unsigned end = start + ctx->specs.vertex_sampler_count;
289
290 set_sampler_views(ctx, start, end, nr, views);
291 }
292
293 static void
294 etna_set_sampler_views(struct pipe_context *pctx, unsigned shader,
295 unsigned start_slot, unsigned num_views,
296 struct pipe_sampler_view **views)
297 {
298 struct etna_context *ctx = etna_context(pctx);
299 assert(start_slot == 0);
300
301 ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
302
303 for (unsigned idx = 0; idx < num_views; ++idx) {
304 if (views[idx])
305 etna_update_sampler_source(views[idx]);
306 }
307
308 switch (shader) {
309 case PIPE_SHADER_FRAGMENT:
310 etna_fragtex_set_sampler_views(ctx, num_views, views);
311 break;
312 case PIPE_SHADER_VERTEX:
313 etna_vertex_set_sampler_views(ctx, num_views, views);
314 break;
315 default:;
316 }
317 }
318
319 static void
320 etna_texture_barrier(struct pipe_context *pctx, unsigned flags)
321 {
322 struct etna_context *ctx = etna_context(pctx);
323 /* clear color and texture cache to make sure that texture unit reads
324 * what has been written */
325 etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE);
326 }
327
328 void
329 etna_texture_init(struct pipe_context *pctx)
330 {
331 pctx->create_sampler_state = etna_create_sampler_state;
332 pctx->bind_sampler_states = etna_bind_sampler_states;
333 pctx->delete_sampler_state = etna_delete_sampler_state;
334 pctx->set_sampler_views = etna_set_sampler_views;
335 pctx->create_sampler_view = etna_create_sampler_view;
336 pctx->sampler_view_destroy = etna_sampler_view_destroy;
337 pctx->texture_barrier = etna_texture_barrier;
338 }