Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_texture.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_texture.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_context.h"
33 #include "etnaviv_emit.h"
34 #include "etnaviv_format.h"
35 #include "etnaviv_texture_desc.h"
36 #include "etnaviv_texture_state.h"
37 #include "etnaviv_translate.h"
38 #include "util/u_inlines.h"
39 #include "util/u_memory.h"
40
41 #include "drm-uapi/drm_fourcc.h"
42
43 static void
44 etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader,
45 unsigned start_slot, unsigned num_samplers,
46 void **samplers)
47 {
48 /* bind fragment sampler */
49 struct etna_context *ctx = etna_context(pctx);
50 struct etna_screen *screen = ctx->screen;
51 int offset;
52
53 switch (shader) {
54 case PIPE_SHADER_FRAGMENT:
55 offset = 0;
56 ctx->num_fragment_samplers = num_samplers;
57 break;
58 case PIPE_SHADER_VERTEX:
59 offset = screen->specs.vertex_sampler_offset;
60 break;
61 default:
62 assert(!"Invalid shader");
63 return;
64 }
65
66 uint32_t mask = 1 << offset;
67 for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) {
68 ctx->sampler[offset + idx] = samplers[idx];
69 if (samplers[idx])
70 ctx->active_samplers |= mask;
71 else
72 ctx->active_samplers &= ~mask;
73 }
74
75 ctx->dirty |= ETNA_DIRTY_SAMPLERS;
76 }
77
78 static bool
79 etna_configure_sampler_ts(struct etna_sampler_ts *sts, struct pipe_sampler_view *pview, bool enable)
80 {
81 bool dirty = (sts->enable != enable);
82
83 assert(sts);
84 sts->enable = enable;
85
86 if (!enable) {
87 sts->TS_SAMPLER_CONFIG = 0;
88 sts->TS_SAMPLER_STATUS_BASE.bo = NULL;
89 return dirty;
90 }
91
92 struct etna_resource *rsc = etna_resource(pview->texture);
93 struct etna_resource_level *lev = &rsc->levels[0];
94
95 if (lev->clear_value != sts->TS_SAMPLER_CLEAR_VALUE)
96 dirty = true;
97
98 assert(rsc->ts_bo && lev->ts_valid);
99
100 sts->mode = lev->ts_mode;
101 sts->TS_SAMPLER_CONFIG =
102 VIVS_TS_SAMPLER_CONFIG_ENABLE |
103 COND(lev->ts_compress_fmt >= 0, VIVS_TS_SAMPLER_CONFIG_COMPRESSION) |
104 VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT(lev->ts_compress_fmt);
105 sts->TS_SAMPLER_CLEAR_VALUE = lev->clear_value;
106 sts->TS_SAMPLER_CLEAR_VALUE2 = lev->clear_value >> 32;
107 sts->TS_SAMPLER_STATUS_BASE.bo = rsc->ts_bo;
108 sts->TS_SAMPLER_STATUS_BASE.offset = lev->ts_offset;
109 sts->TS_SAMPLER_STATUS_BASE.flags = ETNA_RELOC_READ;
110
111 return dirty;
112 }
113
114 /* Return true if the GPU can use sampler TS with this sampler view.
115 * Sampler TS is an optimization used when rendering to textures, where
116 * a resolve-in-place can be avoided when rendering has left a (valid) TS.
117 */
118 static bool
119 etna_can_use_sampler_ts(struct pipe_sampler_view *view, int num)
120 {
121 /* Can use sampler TS when:
122 * - the hardware supports sampler TS.
123 * - the sampler view will be bound to sampler <VIVS_TS_SAMPLER__LEN.
124 * HALTI5 adds a mapping from sampler to sampler TS unit, but this is AFAIK
125 * absent on earlier models.
126 * - it is a texture, not a buffer.
127 * - the sampler view has a supported format for sampler TS.
128 * - the sampler will have one LOD, and it happens to be level 0.
129 * (it is not sure if the hw supports it for other levels, but available
130 * state strongly suggests only one at a time).
131 * - the resource TS is valid for level 0.
132 */
133 struct etna_resource *rsc = etna_resource(view->texture);
134 struct etna_screen *screen = etna_screen(rsc->base.screen);
135
136 return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
137 num < VIVS_TS_SAMPLER__LEN &&
138 rsc->base.target != PIPE_BUFFER &&
139 (rsc->levels[0].ts_compress_fmt < 0 || screen->specs.v4_compression) &&
140 view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level, rsc->base.last_level) == 0 &&
141 rsc->levels[0].ts_valid;
142 }
143
144 void
145 etna_update_sampler_source(struct pipe_sampler_view *view, int num)
146 {
147 struct etna_resource *base = etna_resource(view->texture);
148 struct etna_resource *to = base, *from = base;
149 struct etna_context *ctx = etna_context(view->context);
150 bool enable_sampler_ts = false;
151
152 if (base->render && etna_resource_newer(etna_resource(base->render), base))
153 from = etna_resource(base->render);
154
155 if (base->texture)
156 to = etna_resource(base->texture);
157
158 if ((to != from) && etna_resource_older(to, from)) {
159 etna_copy_resource(view->context, &to->base, &from->base, 0,
160 view->texture->last_level);
161 to->seqno = from->seqno;
162 ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
163 } else if ((to == from) && etna_resource_needs_flush(to)) {
164 if (ctx->ts_for_sampler_view && etna_can_use_sampler_ts(view, num)) {
165 enable_sampler_ts = true;
166 /* Do not set flush_seqno because the resolve-to-self was bypassed */
167 } else {
168 /* Resolve TS if needed */
169 etna_copy_resource(view->context, &to->base, &from->base, 0,
170 view->texture->last_level);
171 to->flush_seqno = from->seqno;
172 ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
173 }
174 } else if ((to == from) && (to->flush_seqno < from->seqno)) {
175 to->flush_seqno = from->seqno;
176 ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
177 }
178 if (ctx->ts_for_sampler_view &&
179 etna_configure_sampler_ts(ctx->ts_for_sampler_view(view), view, enable_sampler_ts)) {
180 ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
181 ctx->dirty_sampler_views |= (1 << num);
182 }
183 }
184
185 static bool
186 etna_resource_sampler_compatible(struct etna_resource *res)
187 {
188 if (util_format_is_compressed(res->base.format))
189 return true;
190
191 struct etna_screen *screen = etna_screen(res->base.screen);
192 /* This GPU supports texturing from supertiled textures? */
193 if (res->layout == ETNA_LAYOUT_SUPER_TILED && VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE))
194 return true;
195
196 /* This GPU supports texturing from linear textures? */
197 if (res->layout == ETNA_LAYOUT_LINEAR && VIV_FEATURE(screen, chipMinorFeatures1, LINEAR_TEXTURE_SUPPORT))
198 return true;
199
200 /* Otherwise, only support tiled layouts */
201 if (res->layout != ETNA_LAYOUT_TILED)
202 return false;
203
204 /* If we have HALIGN support, we can allow for the RS padding */
205 if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN))
206 return true;
207
208 /* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */
209 if (res->halign != TEXTURE_HALIGN_FOUR)
210 return false;
211
212 return true;
213 }
214
215 struct etna_resource *
216 etna_texture_handle_incompatible(struct pipe_context *pctx, struct pipe_resource *prsc)
217 {
218 struct etna_resource *res = etna_resource(prsc);
219 if (!etna_resource_sampler_compatible(res)) {
220 /* The original resource is not compatible with the sampler.
221 * Allocate an appropriately tiled texture. */
222 if (!res->texture) {
223 struct pipe_resource templat = *prsc;
224
225 templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
226 PIPE_BIND_BLENDABLE);
227 res->texture =
228 etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED,
229 DRM_FORMAT_MOD_LINEAR, &templat);
230 }
231
232 if (!res->texture) {
233 return NULL;
234 }
235 res = etna_resource(res->texture);
236 }
237 return res;
238 }
239
240 static void
241 set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end,
242 unsigned nr, struct pipe_sampler_view **views)
243 {
244 unsigned i, j;
245 uint32_t mask = 1 << start;
246 uint32_t prev_active_sampler_views = ctx->active_sampler_views;
247
248 for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
249 pipe_sampler_view_reference(&ctx->sampler_view[i], views[j]);
250 if (views[j]) {
251 ctx->active_sampler_views |= mask;
252 ctx->dirty_sampler_views |= mask;
253 } else
254 ctx->active_sampler_views &= ~mask;
255 }
256
257 for (; i < end; i++, mask <<= 1) {
258 pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
259 ctx->active_sampler_views &= ~mask;
260 }
261
262 /* sampler views that changed state (even to inactive) are also dirty */
263 ctx->dirty_sampler_views |= ctx->active_sampler_views ^ prev_active_sampler_views;
264 }
265
266 static inline void
267 etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr,
268 struct pipe_sampler_view **views)
269 {
270 struct etna_screen *screen = ctx->screen;
271 unsigned start = 0;
272 unsigned end = start + screen->specs.fragment_sampler_count;
273
274 set_sampler_views(ctx, start, end, nr, views);
275 ctx->num_fragment_sampler_views = nr;
276 }
277
278
279 static inline void
280 etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr,
281 struct pipe_sampler_view **views)
282 {
283 struct etna_screen *screen = ctx->screen;
284 unsigned start = screen->specs.vertex_sampler_offset;
285 unsigned end = start + screen->specs.vertex_sampler_count;
286
287 set_sampler_views(ctx, start, end, nr, views);
288 }
289
290 static void
291 etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
292 unsigned start_slot, unsigned num_views,
293 struct pipe_sampler_view **views)
294 {
295 struct etna_context *ctx = etna_context(pctx);
296 assert(start_slot == 0);
297
298 ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
299
300 switch (shader) {
301 case PIPE_SHADER_FRAGMENT:
302 etna_fragtex_set_sampler_views(ctx, num_views, views);
303 break;
304 case PIPE_SHADER_VERTEX:
305 etna_vertex_set_sampler_views(ctx, num_views, views);
306 break;
307 default:;
308 }
309 }
310
311 static void
312 etna_texture_barrier(struct pipe_context *pctx, unsigned flags)
313 {
314 struct etna_context *ctx = etna_context(pctx);
315 /* clear color and texture cache to make sure that texture unit reads
316 * what has been written */
317 mtx_lock(&ctx->lock);
318 etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE);
319 mtx_unlock(&ctx->lock);
320 }
321
322 uint32_t
323 active_samplers_bits(struct etna_context *ctx)
324 {
325 return ctx->active_sampler_views & ctx->active_samplers;
326 }
327
328 void
329 etna_texture_init(struct pipe_context *pctx)
330 {
331 struct etna_context *ctx = etna_context(pctx);
332 struct etna_screen *screen = ctx->screen;
333
334 pctx->bind_sampler_states = etna_bind_sampler_states;
335 pctx->set_sampler_views = etna_set_sampler_views;
336 pctx->texture_barrier = etna_texture_barrier;
337
338 if (screen->specs.halti >= 5)
339 etna_texture_desc_init(pctx);
340 else
341 etna_texture_state_init(pctx);
342 }