src/gallium/drivers/etnaviv/etnaviv_texture_state.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_texture_state.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_context.h"
  33 #include "etnaviv_emit.h"
  34 #include "etnaviv_format.h"
  35 #include "etnaviv_texture.h"
  36 #include "etnaviv_translate.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static void *
  43 etna_create_sampler_state_state(struct pipe_context *pipe,
  44                           const struct pipe_sampler_state *ss)
  45 {
  46    struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
  47
  48    if (!cs)
  49       return NULL;
  50
  51    cs->TE_SAMPLER_CONFIG0 =
  52       VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) |
  53       VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) |
  54       VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) |
  55       VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
  56       VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter));
  57
  58    /* ROUND_UV improves precision - but not compatible with NEAREST filter */
  59    if (ss->min_img_filter != PIPE_TEX_FILTER_NEAREST &&
  60        ss->mag_img_filter != PIPE_TEX_FILTER_NEAREST) {
  61       cs->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ROUND_UV;
  62    }
  63
  64    cs->TE_SAMPLER_CONFIG1 =
  65       COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP);
  66
  67    cs->TE_SAMPLER_LOD_CONFIG =
  68       COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
  69       VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
  70
  71    cs->TE_SAMPLER_3D_CONFIG =
  72       VIVS_TE_SAMPLER_3D_CONFIG_WRAP(translate_texture_wrapmode(ss->wrap_r));
  73
  74    if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
  75       cs->min_lod = etna_float_to_fixp55(ss->min_lod);
  76       cs->max_lod = etna_float_to_fixp55(ss->max_lod);
  77    } else {
  78       /* when not mipmapping, we need to set max/min lod so that always
  79        * lowest LOD is selected */
  80       cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod);
  81    }
  82
  83    /* if max_lod is 0, MIN filter will never be used (GC3000)
  84     * when min filter is different from mag filter, we need HW to compute LOD
  85     * the workaround is to set max_lod to at least 1
  86     */
  87    cs->max_lod_min = (ss->min_img_filter != ss->mag_img_filter) ? 1 : 0;
  88
  89    return cs;
  90 }
  91
  92 static void
  93 etna_delete_sampler_state_state(struct pipe_context *pctx, void *ss)
  94 {
  95    FREE(ss);
  96 }
  97
  98 static struct pipe_sampler_view *
  99 etna_create_sampler_view_state(struct pipe_context *pctx, struct pipe_resource *prsc,
 100                          const struct pipe_sampler_view *so)
 101 {
 102    struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
 103    struct etna_context *ctx = etna_context(pctx);
 104    const uint32_t format = translate_texture_format(so->format);
 105    const bool ext = !!(format & EXT_FORMAT);
 106    const bool astc = !!(format & ASTC_FORMAT);
 107    const bool srgb = util_format_is_srgb(so->format);
 108    const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
 109                                           so->swizzle_g, so->swizzle_b,
 110                                           so->swizzle_a);
 111
 112    if (!sv)
 113       return NULL;
 114
 115    struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
 116    if (!res) {
 117       free(sv);
 118       return NULL;
 119    }
 120
 121    sv->base = *so;
 122    pipe_reference_init(&sv->base.reference, 1);
 123    sv->base.texture = NULL;
 124    pipe_resource_reference(&sv->base.texture, prsc);
 125    sv->base.context = pctx;
 126
 127    /* merged with sampler state */
 128    sv->TE_SAMPLER_CONFIG0 =
 129       VIVS_TE_SAMPLER_CONFIG0_TYPE(translate_texture_target(sv->base.target)) |
 130       COND(!ext && !astc, VIVS_TE_SAMPLER_CONFIG0_FORMAT(format));
 131    sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff;
 132
 133    uint32_t base_height = res->base.height0;
 134    uint32_t base_depth = res->base.depth0;
 135    bool is_array = false;
 136
 137    switch (sv->base.target) {
 138    case PIPE_TEXTURE_1D:
 139       /* use 2D texture with T wrap to repeat for 1D texture
 140        * TODO: check if old HW supports 1D texture
 141        */
 142       sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK;
 143       sv->TE_SAMPLER_CONFIG0 &= ~VIVS_TE_SAMPLER_CONFIG0_TYPE__MASK;
 144       sv->TE_SAMPLER_CONFIG0 |=
 145          VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D) |
 146          VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT);
 147       break;
 148    case PIPE_TEXTURE_1D_ARRAY:
 149       is_array = true;
 150       base_height = res->base.array_size;
 151       break;
 152    case PIPE_TEXTURE_2D_ARRAY:
 153       is_array = true;
 154       base_depth = res->base.array_size;
 155       break;
 156    default:
 157       break;
 158    }
 159
 160    if (res->addressing_mode == ETNA_ADDRESSING_MODE_LINEAR) {
 161       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_LINEAR);
 162
 163       for (int lod = 0; lod <= res->base.last_level; ++lod)
 164          sv->TE_SAMPLER_LINEAR_STRIDE[lod] = res->levels[lod].stride;
 165
 166    } else {
 167       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_TILED);
 168       memset(&sv->TE_SAMPLER_LINEAR_STRIDE, 0, sizeof(sv->TE_SAMPLER_LINEAR_STRIDE));
 169    }
 170
 171    sv->TE_SAMPLER_CONFIG1 |= COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) |
 172                              COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) |
 173                              COND(is_array, VIVS_TE_SAMPLER_CONFIG1_TEXTURE_ARRAY) |
 174                              VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz;
 175    sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) |
 176                           COND(astc && srgb, VIVS_NTE_SAMPLER_ASTC0_ASTC_SRGB) |
 177                           VIVS_NTE_SAMPLER_ASTC0_UNK8(0xc) |
 178                           VIVS_NTE_SAMPLER_ASTC0_UNK16(0xc) |
 179                           VIVS_NTE_SAMPLER_ASTC0_UNK24(0xc);
 180    sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) |
 181                          VIVS_TE_SAMPLER_SIZE_HEIGHT(base_height);
 182    sv->TE_SAMPLER_LOG_SIZE =
 183       VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) |
 184       VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(base_height)) |
 185       COND(util_format_is_srgb(so->format) && !astc, VIVS_TE_SAMPLER_LOG_SIZE_SRGB) |
 186       COND(astc, VIVS_TE_SAMPLER_LOG_SIZE_ASTC);
 187    sv->TE_SAMPLER_3D_CONFIG =
 188       VIVS_TE_SAMPLER_3D_CONFIG_DEPTH(base_depth) |
 189       VIVS_TE_SAMPLER_3D_CONFIG_LOG_DEPTH(etna_log2_fixp55(base_depth));
 190
 191    /* Set up levels-of-detail */
 192    for (int lod = 0; lod <= res->base.last_level; ++lod) {
 193       sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo;
 194       sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset;
 195       sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ;
 196    }
 197    sv->min_lod = sv->base.u.tex.first_level << 5;
 198    sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
 199
 200    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
 201     * supported when the appropriate capability is not set. */
 202    if (!ctx->specs.npot_tex_any_wrap &&
 203        (!util_is_power_of_two_or_zero(res->base.width0) ||
 204         !util_is_power_of_two_or_zero(res->base.height0))) {
 205       sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
 206                                       VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);
 207       sv->TE_SAMPLER_CONFIG0 |=
 208          VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) |
 209          VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE);
 210    }
 211
 212    return &sv->base;
 213 }
 214
 215 static void
 216 etna_sampler_view_state_destroy(struct pipe_context *pctx,
 217                           struct pipe_sampler_view *view)
 218 {
 219    pipe_resource_reference(&view->texture, NULL);
 220    FREE(view);
 221 }
 222
 223 #define EMIT_STATE(state_name, src_value) \
 224    etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value)
 225
 226 #define EMIT_STATE_FIXP(state_name, src_value) \
 227    etna_coalsence_emit_fixp(stream, &coalesce, VIVS_##state_name, src_value)
 228
 229 #define EMIT_STATE_RELOC(state_name, src_value) \
 230    etna_coalsence_emit_reloc(stream, &coalesce, VIVS_##state_name, src_value)
 231
 232 /* Emit plain (non-descriptor) texture state */
 233 static void
 234 etna_emit_texture_state(struct etna_context *ctx)
 235 {
 236    struct etna_cmd_stream *stream = ctx->stream;
 237    uint32_t active_samplers = active_samplers_bits(ctx);
 238    uint32_t dirty = ctx->dirty;
 239    struct etna_coalesce coalesce;
 240
 241    etna_coalesce_start(stream, &coalesce);
 242
 243    if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
 244       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 245          if ((1 << x) & active_samplers) {
 246             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 247             /*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->ts.TS_SAMPLER_CONFIG);
 248          }
 249       }
 250       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 251          if ((1 << x) & active_samplers) {
 252             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 253             /*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x), &sv->ts.TS_SAMPLER_STATUS_BASE);
 254          }
 255       }
 256       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 257          if ((1 << x) & active_samplers) {
 258             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 259             /*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x), sv->ts.TS_SAMPLER_CLEAR_VALUE);
 260          }
 261       }
 262       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 263          if ((1 << x) & active_samplers) {
 264             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 265             /*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x), sv->ts.TS_SAMPLER_CLEAR_VALUE2);
 266          }
 267       }
 268    }
 269    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 270       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 271          uint32_t val = 0; /* 0 == sampler inactive */
 272
 273          /* set active samplers to their configuration value (determined by both
 274           * the sampler state and sampler view) */
 275          if ((1 << x) & active_samplers) {
 276             struct etna_sampler_state *ss = etna_sampler_state(ctx->sampler[x]);
 277             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 278
 279             val = (ss->TE_SAMPLER_CONFIG0 & sv->TE_SAMPLER_CONFIG0_MASK) |
 280                   sv->TE_SAMPLER_CONFIG0;
 281          }
 282
 283          /*02000*/ EMIT_STATE(TE_SAMPLER_CONFIG0(x), val);
 284       }
 285    }
 286    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 287       struct etna_sampler_view *sv;
 288
 289       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 290          if ((1 << x) & active_samplers) {
 291             sv = etna_sampler_view(ctx->sampler_view[x]);
 292             /*02040*/ EMIT_STATE(TE_SAMPLER_SIZE(x), sv->TE_SAMPLER_SIZE);
 293          }
 294       }
 295       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 296          if ((1 << x) & active_samplers) {
 297             sv = etna_sampler_view(ctx->sampler_view[x]);
 298             /*02080*/ EMIT_STATE(TE_SAMPLER_LOG_SIZE(x), sv->TE_SAMPLER_LOG_SIZE);
 299          }
 300       }
 301    }
 302    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 303       struct etna_sampler_state *ss;
 304       struct etna_sampler_view *sv;
 305
 306       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 307          if ((1 << x) & active_samplers) {
 308             ss = etna_sampler_state(ctx->sampler[x]);
 309             sv = etna_sampler_view(ctx->sampler_view[x]);
 310
 311             unsigned max_lod = MAX2(MIN2(ss->max_lod, sv->max_lod), ss->max_lod_min);
 312
 313             /* min and max lod is determined both by the sampler and the view */
 314             /*020C0*/ EMIT_STATE(TE_SAMPLER_LOD_CONFIG(x),
 315                                  ss->TE_SAMPLER_LOD_CONFIG |
 316                                  VIVS_TE_SAMPLER_LOD_CONFIG_MAX(max_lod) |
 317                                  VIVS_TE_SAMPLER_LOD_CONFIG_MIN(MAX2(ss->min_lod, sv->min_lod)));
 318          }
 319       }
 320       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 321          if ((1 << x) & active_samplers) {
 322             ss = etna_sampler_state(ctx->sampler[x]);
 323             sv = etna_sampler_view(ctx->sampler_view[x]);
 324
 325             /*02180*/ EMIT_STATE(TE_SAMPLER_3D_CONFIG(x), ss->TE_SAMPLER_3D_CONFIG |
 326                                                           sv->TE_SAMPLER_3D_CONFIG);
 327          }
 328       }
 329       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 330          if ((1 << x) & active_samplers) {
 331             ss = etna_sampler_state(ctx->sampler[x]);
 332             sv = etna_sampler_view(ctx->sampler_view[x]);
 333
 334             /*021C0*/ EMIT_STATE(TE_SAMPLER_CONFIG1(x), ss->TE_SAMPLER_CONFIG1 |
 335                                                         sv->TE_SAMPLER_CONFIG1 |
 336                                                         COND(sv->ts.enable, VIVS_TE_SAMPLER_CONFIG1_USE_TS));
 337          }
 338       }
 339    }
 340    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 341       for (int y = 0; y < VIVS_TE_SAMPLER_LOD_ADDR__LEN; ++y) {
 342          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 343             if ((1 << x) & active_samplers) {
 344                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 345                /*02400*/ EMIT_STATE_RELOC(TE_SAMPLER_LOD_ADDR(x, y),&sv->TE_SAMPLER_LOD_ADDR[y]);
 346             }
 347          }
 348       }
 349    }
 350    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 351       for (int y = 0; y < VIVS_TE_SAMPLER_LINEAR_STRIDE__LEN; ++y) {
 352          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 353             if ((1 << x) & active_samplers) {
 354                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 355                /*02C00*/ EMIT_STATE(TE_SAMPLER_LINEAR_STRIDE(x, y), sv->TE_SAMPLER_LINEAR_STRIDE[y]);
 356             }
 357          }
 358       }
 359    }
 360    if (unlikely(ctx->specs.tex_astc && (dirty & (ETNA_DIRTY_SAMPLER_VIEWS)))) {
 361       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 362          if ((1 << x) & active_samplers) {
 363             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 364             /*10500*/ EMIT_STATE(NTE_SAMPLER_ASTC0(x), sv->TE_SAMPLER_ASTC0);
 365          }
 366       }
 367    }
 368    etna_coalesce_end(stream, &coalesce);
 369 }
 370
 371 #undef EMIT_STATE
 372 #undef EMIT_STATE_FIXP
 373 #undef EMIT_STATE_RELOC
 374
 375 static struct etna_sampler_ts*
 376 etna_ts_for_sampler_view_state(struct pipe_sampler_view *pview)
 377 {
 378    struct etna_sampler_view *sv = etna_sampler_view(pview);
 379    return &sv->ts;
 380 }
 381
 382 void
 383 etna_texture_state_init(struct pipe_context *pctx)
 384 {
 385    struct etna_context *ctx = etna_context(pctx);
 386    DBG("etnaviv: Using state-based texturing");
 387    ctx->base.create_sampler_state = etna_create_sampler_state_state;
 388    ctx->base.delete_sampler_state = etna_delete_sampler_state_state;
 389    ctx->base.create_sampler_view = etna_create_sampler_view_state;
 390    ctx->base.sampler_view_destroy = etna_sampler_view_state_destroy;
 391    ctx->emit_texture_state = etna_emit_texture_state;
 392    ctx->ts_for_sampler_view = etna_ts_for_sampler_view_state;
 393 }