src/gallium/drivers/etnaviv/etnaviv_texture_state.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_texture_state.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_context.h"
  33 #include "etnaviv_emit.h"
  34 #include "etnaviv_format.h"
  35 #include "etnaviv_texture.h"
  36 #include "etnaviv_translate.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static void *
  43 etna_create_sampler_state_state(struct pipe_context *pipe,
  44                           const struct pipe_sampler_state *ss)
  45 {
  46    struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
  47
  48    if (!cs)
  49       return NULL;
  50
  51    cs->TE_SAMPLER_CONFIG0 =
  52       VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) |
  53       VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) |
  54       VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) |
  55       VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
  56       VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) |
  57       COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV);
  58    cs->TE_SAMPLER_CONFIG1 = 0; /* VIVS_TE_SAMPLER_CONFIG1 (swizzle, extended
  59                                   format) fully determined by sampler view */
  60    cs->TE_SAMPLER_LOD_CONFIG =
  61       COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
  62       VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
  63
  64    if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
  65       cs->min_lod = etna_float_to_fixp55(ss->min_lod);
  66       cs->max_lod = etna_float_to_fixp55(ss->max_lod);
  67    } else {
  68       /* when not mipmapping, we need to set max/min lod so that always
  69        * lowest LOD is selected */
  70       cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod);
  71    }
  72
  73    return cs;
  74 }
  75
  76 static void
  77 etna_delete_sampler_state_state(struct pipe_context *pctx, void *ss)
  78 {
  79    FREE(ss);
  80 }
  81
  82 static struct pipe_sampler_view *
  83 etna_create_sampler_view_state(struct pipe_context *pctx, struct pipe_resource *prsc,
  84                          const struct pipe_sampler_view *so)
  85 {
  86    struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
  87    struct etna_context *ctx = etna_context(pctx);
  88    const uint32_t format = translate_texture_format(so->format);
  89    const bool ext = !!(format & EXT_FORMAT);
  90    const bool astc = !!(format & ASTC_FORMAT);
  91    const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
  92                                           so->swizzle_g, so->swizzle_b,
  93                                           so->swizzle_a);
  94
  95    if (!sv)
  96       return NULL;
  97
  98    struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
  99    if (!res) {
 100       free(sv);
 101       return NULL;
 102    }
 103
 104    sv->base = *so;
 105    pipe_reference_init(&sv->base.reference, 1);
 106    sv->base.texture = NULL;
 107    pipe_resource_reference(&sv->base.texture, prsc);
 108    sv->base.context = pctx;
 109
 110    /* merged with sampler state */
 111    sv->TE_SAMPLER_CONFIG0 = COND(!ext && !astc, VIVS_TE_SAMPLER_CONFIG0_FORMAT(format));
 112    sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff;
 113
 114    switch (sv->base.target) {
 115    case PIPE_TEXTURE_1D:
 116       /* For 1D textures, we will have a height of 1, so we can use 2D
 117        * but set T wrap to repeat */
 118       sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK;
 119       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT);
 120       /* fallthrough */
 121    case PIPE_TEXTURE_2D:
 122    case PIPE_TEXTURE_RECT:
 123       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D);
 124       break;
 125    case PIPE_TEXTURE_CUBE:
 126       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_CUBE_MAP);
 127       break;
 128    default:
 129       BUG("Unhandled texture target");
 130       free(sv);
 131       return NULL;
 132    }
 133
 134    if (res->addressing_mode == ETNA_ADDRESSING_MODE_LINEAR) {
 135       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_LINEAR);
 136
 137       for (int lod = 0; lod <= res->base.last_level; ++lod)
 138          sv->TE_SAMPLER_LINEAR_STRIDE[lod] = res->levels[lod].stride;
 139
 140    } else {
 141       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_TILED);
 142       memset(&sv->TE_SAMPLER_LINEAR_STRIDE, 0, sizeof(sv->TE_SAMPLER_LINEAR_STRIDE));
 143    }
 144
 145    sv->TE_SAMPLER_CONFIG1 = COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) |
 146                             COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) |
 147                             VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz;
 148    sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) |
 149                           VIVS_NTE_SAMPLER_ASTC0_UNK8(0xc) |
 150                           VIVS_NTE_SAMPLER_ASTC0_UNK16(0xc) |
 151                           VIVS_NTE_SAMPLER_ASTC0_UNK24(0xc);
 152    sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) |
 153                          VIVS_TE_SAMPLER_SIZE_HEIGHT(res->base.height0);
 154    sv->TE_SAMPLER_LOG_SIZE =
 155       VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) |
 156       VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0)) |
 157       COND(util_format_is_srgb(so->format) && !astc, VIVS_TE_SAMPLER_LOG_SIZE_SRGB) |
 158       COND(astc, VIVS_TE_SAMPLER_LOG_SIZE_ASTC);
 159
 160    /* Set up levels-of-detail */
 161    for (int lod = 0; lod <= res->base.last_level; ++lod) {
 162       sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo;
 163       sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset;
 164       sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ;
 165    }
 166    sv->min_lod = sv->base.u.tex.first_level << 5;
 167    sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
 168
 169    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
 170     * supported when the appropriate capability is not set. */
 171    if (!ctx->specs.npot_tex_any_wrap &&
 172        (!util_is_power_of_two_or_zero(res->base.width0) ||
 173         !util_is_power_of_two_or_zero(res->base.height0))) {
 174       sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
 175                                       VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);
 176       sv->TE_SAMPLER_CONFIG0 |=
 177          VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) |
 178          VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE);
 179    }
 180
 181    return &sv->base;
 182 }
 183
 184 static void
 185 etna_sampler_view_state_destroy(struct pipe_context *pctx,
 186                           struct pipe_sampler_view *view)
 187 {
 188    pipe_resource_reference(&view->texture, NULL);
 189    FREE(view);
 190 }
 191
 192 #define EMIT_STATE(state_name, src_value) \
 193    etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value)
 194
 195 #define EMIT_STATE_FIXP(state_name, src_value) \
 196    etna_coalsence_emit_fixp(stream, &coalesce, VIVS_##state_name, src_value)
 197
 198 #define EMIT_STATE_RELOC(state_name, src_value) \
 199    etna_coalsence_emit_reloc(stream, &coalesce, VIVS_##state_name, src_value)
 200
 201 /* Emit plain (non-descriptor) texture state */
 202 static void
 203 etna_emit_texture_state(struct etna_context *ctx)
 204 {
 205    struct etna_cmd_stream *stream = ctx->stream;
 206    uint32_t active_samplers = active_samplers_bits(ctx);
 207    uint32_t dirty = ctx->dirty;
 208    struct etna_coalesce coalesce;
 209
 210    etna_coalesce_start(stream, &coalesce);
 211
 212    if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
 213       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 214          if ((1 << x) & active_samplers) {
 215             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 216             /*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->ts.TS_SAMPLER_CONFIG);
 217          }
 218       }
 219       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 220          if ((1 << x) & active_samplers) {
 221             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 222             /*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x), &sv->ts.TS_SAMPLER_STATUS_BASE);
 223          }
 224       }
 225       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 226          if ((1 << x) & active_samplers) {
 227             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 228             /*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x), sv->ts.TS_SAMPLER_CLEAR_VALUE);
 229          }
 230       }
 231       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 232          if ((1 << x) & active_samplers) {
 233             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 234             /*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x), sv->ts.TS_SAMPLER_CLEAR_VALUE2);
 235          }
 236       }
 237    }
 238    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 239       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 240          uint32_t val = 0; /* 0 == sampler inactive */
 241
 242          /* set active samplers to their configuration value (determined by both
 243           * the sampler state and sampler view) */
 244          if ((1 << x) & active_samplers) {
 245             struct etna_sampler_state *ss = etna_sampler_state(ctx->sampler[x]);
 246             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 247
 248             val = (ss->TE_SAMPLER_CONFIG0 & sv->TE_SAMPLER_CONFIG0_MASK) |
 249                   sv->TE_SAMPLER_CONFIG0;
 250          }
 251
 252          /*02000*/ EMIT_STATE(TE_SAMPLER_CONFIG0(x), val);
 253       }
 254    }
 255    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 256       struct etna_sampler_view *sv;
 257
 258       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 259          if ((1 << x) & active_samplers) {
 260             sv = etna_sampler_view(ctx->sampler_view[x]);
 261             /*02040*/ EMIT_STATE(TE_SAMPLER_SIZE(x), sv->TE_SAMPLER_SIZE);
 262          }
 263       }
 264       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 265          if ((1 << x) & active_samplers) {
 266             sv = etna_sampler_view(ctx->sampler_view[x]);
 267             /*02080*/ EMIT_STATE(TE_SAMPLER_LOG_SIZE(x), sv->TE_SAMPLER_LOG_SIZE);
 268          }
 269       }
 270    }
 271    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 272       struct etna_sampler_state *ss;
 273       struct etna_sampler_view *sv;
 274
 275       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 276          if ((1 << x) & active_samplers) {
 277             ss = etna_sampler_state(ctx->sampler[x]);
 278             sv = etna_sampler_view(ctx->sampler_view[x]);
 279
 280             /* min and max lod is determined both by the sampler and the view */
 281             /*020C0*/ EMIT_STATE(TE_SAMPLER_LOD_CONFIG(x),
 282                                  ss->TE_SAMPLER_LOD_CONFIG |
 283                                  VIVS_TE_SAMPLER_LOD_CONFIG_MAX(MIN2(ss->max_lod, sv->max_lod)) |
 284                                  VIVS_TE_SAMPLER_LOD_CONFIG_MIN(MAX2(ss->min_lod, sv->min_lod)));
 285          }
 286       }
 287       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 288          if ((1 << x) & active_samplers) {
 289             ss = etna_sampler_state(ctx->sampler[x]);
 290             sv = etna_sampler_view(ctx->sampler_view[x]);
 291
 292             /*021C0*/ EMIT_STATE(TE_SAMPLER_CONFIG1(x), ss->TE_SAMPLER_CONFIG1 |
 293                                                         sv->TE_SAMPLER_CONFIG1 |
 294                                                         COND(sv->ts.enable, VIVS_TE_SAMPLER_CONFIG1_USE_TS));
 295          }
 296       }
 297    }
 298    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 299       for (int y = 0; y < VIVS_TE_SAMPLER_LOD_ADDR__LEN; ++y) {
 300          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 301             if ((1 << x) & active_samplers) {
 302                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 303                /*02400*/ EMIT_STATE_RELOC(TE_SAMPLER_LOD_ADDR(x, y),&sv->TE_SAMPLER_LOD_ADDR[y]);
 304             }
 305          }
 306       }
 307    }
 308    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 309       for (int y = 0; y < VIVS_TE_SAMPLER_LINEAR_STRIDE__LEN; ++y) {
 310          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 311             if ((1 << x) & active_samplers) {
 312                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 313                /*02C00*/ EMIT_STATE(TE_SAMPLER_LINEAR_STRIDE(x, y), sv->TE_SAMPLER_LINEAR_STRIDE[y]);
 314             }
 315          }
 316       }
 317    }
 318    if (unlikely(ctx->specs.tex_astc && (dirty & (ETNA_DIRTY_SAMPLER_VIEWS)))) {
 319       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 320          if ((1 << x) & active_samplers) {
 321             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 322             /*10500*/ EMIT_STATE(NTE_SAMPLER_ASTC0(x), sv->TE_SAMPLER_ASTC0);
 323          }
 324       }
 325    }
 326    etna_coalesce_end(stream, &coalesce);
 327 }
 328
 329 #undef EMIT_STATE
 330 #undef EMIT_STATE_FIXP
 331 #undef EMIT_STATE_RELOC
 332
 333 static struct etna_sampler_ts*
 334 etna_ts_for_sampler_view_state(struct pipe_sampler_view *pview)
 335 {
 336    struct etna_sampler_view *sv = etna_sampler_view(pview);
 337    return &sv->ts;
 338 }
 339
 340 void
 341 etna_texture_state_init(struct pipe_context *pctx)
 342 {
 343    struct etna_context *ctx = etna_context(pctx);
 344    DBG("etnaviv: Using state-based texturing");
 345    ctx->base.create_sampler_state = etna_create_sampler_state_state;
 346    ctx->base.delete_sampler_state = etna_delete_sampler_state_state;
 347    ctx->base.create_sampler_view = etna_create_sampler_view_state;
 348    ctx->base.sampler_view_destroy = etna_sampler_view_state_destroy;
 349    ctx->emit_texture_state = etna_emit_texture_state;
 350    ctx->ts_for_sampler_view = etna_ts_for_sampler_view_state;
 351 }