4ead6dff7f4cb97a4e8f5955205b8193ab4407ca
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_transfer.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_transfer.h"
28 #include "etnaviv_clear_blit.h"
29 #include "etnaviv_context.h"
30 #include "etnaviv_debug.h"
31
32 #include "pipe/p_defines.h"
33 #include "pipe/p_format.h"
34 #include "pipe/p_screen.h"
35 #include "pipe/p_state.h"
36 #include "util/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39 #include "util/u_surface.h"
40 #include "util/u_transfer.h"
41
42 /* Compute offset into a 1D/2D/3D buffer of a certain box.
43 * This box must be aligned to the block width and height of the
44 * underlying format. */
45 static inline size_t
46 etna_compute_offset(enum pipe_format format, const struct pipe_box *box,
47 size_t stride, size_t layer_stride)
48 {
49 return box->z * layer_stride +
50 box->y / util_format_get_blockheight(format) * stride +
51 box->x / util_format_get_blockwidth(format) *
52 util_format_get_blocksize(format);
53 }
54
55 static void
56 etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
57 {
58 struct etna_context *ctx = etna_context(pctx);
59 struct etna_transfer *trans = etna_transfer(ptrans);
60 struct etna_resource *rsc = etna_resource(ptrans->resource);
61
62 /* XXX
63 * When writing to a resource that is already in use, replace the resource
64 * with a completely new buffer
65 * and free the old one using a fenced free.
66 * The most tricky case to implement will be: tiled or supertiled surface,
67 * partial write, target not aligned to 4/64. */
68 assert(ptrans->level <= rsc->base.last_level);
69
70 if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture)))
71 rsc = etna_resource(rsc->texture); /* switch to using the texture resource */
72
73 /*
74 * Temporary resources are always pulled into the CPU domain, must push them
75 * back into GPU domain before the RS execs the blit to the base resource.
76 */
77 if (trans->rsc)
78 etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
79
80 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
81 if (trans->rsc) {
82 /* We have a temporary resource due to either tile status or
83 * tiling format. Write back the updated buffer contents.
84 * FIXME: we need to invalidate the tile status. */
85 etna_copy_resource(pctx, ptrans->resource, trans->rsc, ptrans->level,
86 trans->rsc->last_level);
87 } else if (trans->staging) {
88 /* map buffer object */
89 struct etna_resource_level *res_level = &rsc->levels[ptrans->level];
90 void *mapped = etna_bo_map(rsc->bo) + res_level->offset;
91
92 if (rsc->layout == ETNA_LAYOUT_LINEAR || rsc->layout == ETNA_LAYOUT_TILED) {
93 if (rsc->layout == ETNA_LAYOUT_TILED && !util_format_is_compressed(rsc->base.format)) {
94 etna_texture_tile(
95 mapped + ptrans->box.z * res_level->layer_stride,
96 trans->staging, ptrans->box.x, ptrans->box.y,
97 res_level->stride, ptrans->box.width, ptrans->box.height,
98 ptrans->stride, util_format_get_blocksize(rsc->base.format));
99 } else { /* non-tiled or compressed format */
100 util_copy_box(mapped, rsc->base.format, res_level->stride,
101 res_level->layer_stride, ptrans->box.x,
102 ptrans->box.y, ptrans->box.z, ptrans->box.width,
103 ptrans->box.height, ptrans->box.depth,
104 trans->staging, ptrans->stride,
105 ptrans->layer_stride, 0, 0, 0 /* src x,y,z */);
106 }
107 } else {
108 BUG("unsupported tiling %i", rsc->layout);
109 }
110
111 FREE(trans->staging);
112 }
113
114 rsc->seqno++;
115
116 if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
117 ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
118 }
119 }
120
121 /*
122 * Transfers without a temporary are only pulled into the CPU domain if they
123 * are not mapped unsynchronized. If they are, must push them back into GPU
124 * domain after CPU access is finished.
125 */
126 if (!trans->rsc && !(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED))
127 etna_bo_cpu_fini(rsc->bo);
128
129 pipe_resource_reference(&trans->rsc, NULL);
130 pipe_resource_reference(&ptrans->resource, NULL);
131 slab_free(&ctx->transfer_pool, trans);
132 }
133
134 static void *
135 etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
136 unsigned level,
137 unsigned usage,
138 const struct pipe_box *box,
139 struct pipe_transfer **out_transfer)
140 {
141 struct etna_context *ctx = etna_context(pctx);
142 struct etna_resource *rsc = etna_resource(prsc);
143 struct etna_transfer *trans;
144 struct pipe_transfer *ptrans;
145 enum pipe_format format = prsc->format;
146
147 trans = slab_alloc(&ctx->transfer_pool);
148 if (!trans)
149 return NULL;
150
151 /* slab_alloc() doesn't zero */
152 memset(trans, 0, sizeof(*trans));
153
154 ptrans = &trans->base;
155 pipe_resource_reference(&ptrans->resource, prsc);
156 ptrans->level = level;
157 ptrans->usage = usage;
158 ptrans->box = *box;
159
160 assert(level <= prsc->last_level);
161
162 if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture))) {
163 /* We have a texture resource which is the same age or newer than the
164 * render resource. Use the texture resource, which avoids bouncing
165 * pixels between the two resources, and we can de-tile it in s/w. */
166 rsc = etna_resource(rsc->texture);
167 } else if (rsc->ts_bo ||
168 (rsc->layout != ETNA_LAYOUT_LINEAR &&
169 util_format_get_blocksize(format) > 1 &&
170 /* HALIGN 4 resources are incompatible with the resolve engine,
171 * so fall back to using software to detile this resource. */
172 rsc->halign != TEXTURE_HALIGN_FOUR)) {
173 /* If the surface has tile status, we need to resolve it first.
174 * The strategy we implement here is to use the RS to copy the
175 * depth buffer, filling in the "holes" where the tile status
176 * indicates that it's clear. We also do this for tiled
177 * resources, but only if the RS can blit them. */
178 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
179 slab_free(&ctx->transfer_pool, trans);
180 BUG("unsupported transfer flags %#x with tile status/tiled layout", usage);
181 return NULL;
182 }
183
184 if (prsc->depth0 > 1) {
185 slab_free(&ctx->transfer_pool, trans);
186 BUG("resource has depth >1 with tile status");
187 return NULL;
188 }
189
190 struct pipe_resource templ = *prsc;
191 templ.nr_samples = 0;
192 templ.bind = PIPE_BIND_RENDER_TARGET;
193
194 trans->rsc = etna_resource_alloc(pctx->screen, ETNA_LAYOUT_LINEAR, &templ);
195 if (!trans->rsc) {
196 slab_free(&ctx->transfer_pool, trans);
197 return NULL;
198 }
199
200 etna_copy_resource(pctx, trans->rsc, prsc, level, trans->rsc->last_level);
201
202 /* Switch to using the temporary resource instead */
203 rsc = etna_resource(trans->rsc);
204 }
205
206 struct etna_resource_level *res_level = &rsc->levels[level];
207
208 /* Always sync if we have the temporary resource. The PIPE_TRANSFER_READ
209 * case could be optimised if we knew whether the resource has outstanding
210 * rendering. */
211 if ((usage & PIPE_TRANSFER_READ || trans->rsc) &&
212 rsc->status & ETNA_PENDING_WRITE)
213 pctx->flush(pctx, NULL, 0);
214
215 /* XXX we don't handle PIPE_TRANSFER_FLUSH_EXPLICIT; this flag can be ignored
216 * when mapping in-place,
217 * but when not in place we need to fire off the copy operation in
218 * transfer_flush_region (currently
219 * a no-op) instead of unmap. Need to handle this to support
220 * ARB_map_buffer_range extension at least.
221 */
222 /* XXX we don't take care of current operations on the resource; which can
223 be, at some point in the pipeline
224 which is not yet executed:
225
226 - bound as surface
227 - bound through vertex buffer
228 - bound through index buffer
229 - bound in sampler view
230 - used in clear_render_target / clear_depth_stencil operation
231 - used in blit
232 - used in resource_copy_region
233
234 How do other drivers record this information over course of the rendering
235 pipeline?
236 Is it necessary at all? Only in case we want to provide a fast path and
237 map the resource directly
238 (and for PIPE_TRANSFER_MAP_DIRECTLY) and we don't want to force a sync.
239 We also need to know whether the resource is in use to determine if a sync
240 is needed (or just do it
241 always, but that comes at the expense of performance).
242
243 A conservative approximation without too much overhead would be to mark
244 all resources that have
245 been bound at some point as busy. A drawback would be that accessing
246 resources that have
247 been bound but are no longer in use for a while still carry a performance
248 penalty. On the other hand,
249 the program could be using PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE or
250 PIPE_TRANSFER_UNSYNCHRONIZED to
251 avoid this in the first place...
252
253 A) We use an in-pipe copy engine, and queue the copy operation after unmap
254 so that the copy
255 will be performed when all current commands have been executed.
256 Using the RS is possible, not sure if always efficient. This can also
257 do any kind of tiling for us.
258 Only possible when PIPE_TRANSFER_DISCARD_RANGE is set.
259 B) We discard the entire resource (or at least, the mipmap level) and
260 allocate new memory for it.
261 Only possible when mapping the entire resource or
262 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is set.
263 */
264
265 /* No need to allocate a buffer for copying if the resource is not in use,
266 * and no tiling is needed, can just return a direct pointer.
267 */
268 bool in_place = rsc->layout == ETNA_LAYOUT_LINEAR ||
269 (rsc->layout == ETNA_LAYOUT_TILED &&
270 util_format_is_compressed(prsc->format));
271
272 /*
273 * Pull resources into the CPU domain. Only skipped for unsynchronized
274 * transfers without a temporary resource.
275 */
276 if (trans->rsc || !(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
277 uint32_t prep_flags = 0;
278
279 if (usage & PIPE_TRANSFER_READ)
280 prep_flags |= DRM_ETNA_PREP_READ;
281 if (usage & PIPE_TRANSFER_WRITE)
282 prep_flags |= DRM_ETNA_PREP_WRITE;
283
284 if (etna_bo_cpu_prep(rsc->bo, prep_flags))
285 goto fail_prep;
286 }
287
288 /* map buffer object */
289 void *mapped = etna_bo_map(rsc->bo);
290 if (!mapped)
291 goto fail;
292
293 *out_transfer = ptrans;
294
295 if (in_place) {
296 ptrans->stride = res_level->stride;
297 ptrans->layer_stride = res_level->layer_stride;
298
299 return mapped + res_level->offset +
300 etna_compute_offset(prsc->format, box, res_level->stride,
301 res_level->layer_stride);
302 } else {
303 unsigned divSizeX = util_format_get_blockwidth(format);
304 unsigned divSizeY = util_format_get_blockheight(format);
305
306 /* No direct mappings of tiled, since we need to manually
307 * tile/untile.
308 */
309 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
310 goto fail;
311
312 mapped += res_level->offset;
313 ptrans->stride = align(box->width, divSizeX) * util_format_get_blocksize(format); /* row stride in bytes */
314 ptrans->layer_stride = align(box->height, divSizeY) * ptrans->stride;
315 size_t size = ptrans->layer_stride * box->depth;
316
317 trans->staging = MALLOC(size);
318 if (!trans->staging)
319 goto fail;
320
321 if (usage & PIPE_TRANSFER_READ) {
322 /* untile or copy resource for reading */
323 if (rsc->layout == ETNA_LAYOUT_LINEAR || rsc->layout == ETNA_LAYOUT_TILED) {
324 if (rsc->layout == ETNA_LAYOUT_TILED && !util_format_is_compressed(rsc->base.format)) {
325 etna_texture_untile(trans->staging,
326 mapped + ptrans->box.z * res_level->layer_stride,
327 ptrans->box.x, ptrans->box.y, res_level->stride,
328 ptrans->box.width, ptrans->box.height, ptrans->stride,
329 util_format_get_blocksize(rsc->base.format));
330 } else { /* non-tiled or compressed format */
331 util_copy_box(trans->staging, rsc->base.format, ptrans->stride,
332 ptrans->layer_stride, 0, 0, 0, /* dst x,y,z */
333 ptrans->box.width, ptrans->box.height,
334 ptrans->box.depth, mapped, res_level->stride,
335 res_level->layer_stride, ptrans->box.x,
336 ptrans->box.y, ptrans->box.z);
337 }
338 } else /* TODO supertiling */
339 {
340 BUG("unsupported tiling %i for reading", rsc->layout);
341 }
342 }
343
344 return trans->staging;
345 }
346
347 fail:
348 etna_bo_cpu_fini(rsc->bo);
349 fail_prep:
350 etna_transfer_unmap(pctx, ptrans);
351 return NULL;
352 }
353
354 static void
355 etna_transfer_flush_region(struct pipe_context *pctx,
356 struct pipe_transfer *transfer,
357 const struct pipe_box *box)
358 {
359 /* NOOP for now */
360 }
361
362 void
363 etna_transfer_init(struct pipe_context *pctx)
364 {
365 pctx->transfer_map = etna_transfer_map;
366 pctx->transfer_flush_region = etna_transfer_flush_region;
367 pctx->transfer_unmap = etna_transfer_unmap;
368 pctx->buffer_subdata = u_default_buffer_subdata;
369 pctx->texture_subdata = u_default_texture_subdata;
370 }