8a18dbb8fc37e4cf3e03168dcbdec62d2f78dd34
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_transfer.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_transfer.h"
28 #include "etnaviv_clear_blit.h"
29 #include "etnaviv_context.h"
30 #include "etnaviv_debug.h"
31
32 #include "pipe/p_defines.h"
33 #include "pipe/p_format.h"
34 #include "pipe/p_screen.h"
35 #include "pipe/p_state.h"
36 #include "util/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39 #include "util/u_surface.h"
40 #include "util/u_transfer.h"
41
42 /* Compute offset into a 1D/2D/3D buffer of a certain box.
43 * This box must be aligned to the block width and height of the
44 * underlying format. */
45 static inline size_t
46 etna_compute_offset(enum pipe_format format, const struct pipe_box *box,
47 size_t stride, size_t layer_stride)
48 {
49 return box->z * layer_stride +
50 box->y / util_format_get_blockheight(format) * stride +
51 box->x / util_format_get_blockwidth(format) *
52 util_format_get_blocksize(format);
53 }
54
55 static void
56 etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
57 {
58 struct etna_context *ctx = etna_context(pctx);
59 struct etna_transfer *trans = etna_transfer(ptrans);
60 struct etna_resource *rsc = etna_resource(ptrans->resource);
61
62 /* XXX
63 * When writing to a resource that is already in use, replace the resource
64 * with a completely new buffer
65 * and free the old one using a fenced free.
66 * The most tricky case to implement will be: tiled or supertiled surface,
67 * partial write, target not aligned to 4/64. */
68 assert(ptrans->level <= rsc->base.last_level);
69
70 if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture)))
71 rsc = etna_resource(rsc->texture); /* switch to using the texture resource */
72
73 /*
74 * Temporary resources are always pulled into the CPU domain, must push them
75 * back into GPU domain before the RS execs the blit to the base resource.
76 */
77 if (trans->rsc)
78 etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
79
80 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
81 if (trans->rsc) {
82 /* We have a temporary resource due to either tile status or
83 * tiling format. Write back the updated buffer contents.
84 * FIXME: we need to invalidate the tile status. */
85 etna_copy_resource(pctx, ptrans->resource, trans->rsc, ptrans->level,
86 trans->rsc->last_level);
87 } else if (trans->staging) {
88 /* map buffer object */
89 struct etna_resource_level *res_level = &rsc->levels[ptrans->level];
90 void *mapped = etna_bo_map(rsc->bo) + res_level->offset;
91
92 if (rsc->layout == ETNA_LAYOUT_TILED) {
93 etna_texture_tile(
94 mapped + ptrans->box.z * res_level->layer_stride,
95 trans->staging, ptrans->box.x, ptrans->box.y,
96 res_level->stride, ptrans->box.width, ptrans->box.height,
97 ptrans->stride, util_format_get_blocksize(rsc->base.format));
98 } else if (rsc->layout == ETNA_LAYOUT_LINEAR) {
99 util_copy_box(mapped, rsc->base.format, res_level->stride,
100 res_level->layer_stride, ptrans->box.x,
101 ptrans->box.y, ptrans->box.z, ptrans->box.width,
102 ptrans->box.height, ptrans->box.depth,
103 trans->staging, ptrans->stride,
104 ptrans->layer_stride, 0, 0, 0 /* src x,y,z */);
105 } else {
106 BUG("unsupported tiling %i", rsc->layout);
107 }
108
109 FREE(trans->staging);
110 }
111
112 rsc->seqno++;
113
114 if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
115 ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
116 }
117 }
118
119 /*
120 * Transfers without a temporary are only pulled into the CPU domain if they
121 * are not mapped unsynchronized. If they are, must push them back into GPU
122 * domain after CPU access is finished.
123 */
124 if (!trans->rsc && !(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED))
125 etna_bo_cpu_fini(rsc->bo);
126
127 pipe_resource_reference(&trans->rsc, NULL);
128 pipe_resource_reference(&ptrans->resource, NULL);
129 slab_free(&ctx->transfer_pool, trans);
130 }
131
132 static void *
133 etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
134 unsigned level,
135 unsigned usage,
136 const struct pipe_box *box,
137 struct pipe_transfer **out_transfer)
138 {
139 struct etna_context *ctx = etna_context(pctx);
140 struct etna_resource *rsc = etna_resource(prsc);
141 struct etna_transfer *trans;
142 struct pipe_transfer *ptrans;
143 enum pipe_format format = prsc->format;
144
145 trans = slab_alloc(&ctx->transfer_pool);
146 if (!trans)
147 return NULL;
148
149 /* slab_alloc() doesn't zero */
150 memset(trans, 0, sizeof(*trans));
151
152 ptrans = &trans->base;
153 pipe_resource_reference(&ptrans->resource, prsc);
154 ptrans->level = level;
155 ptrans->usage = usage;
156 ptrans->box = *box;
157
158 assert(level <= prsc->last_level);
159
160 if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture))) {
161 /* We have a texture resource which is the same age or newer than the
162 * render resource. Use the texture resource, which avoids bouncing
163 * pixels between the two resources, and we can de-tile it in s/w. */
164 rsc = etna_resource(rsc->texture);
165 } else if (rsc->ts_bo ||
166 (rsc->layout != ETNA_LAYOUT_LINEAR &&
167 util_format_get_blocksize(format) > 1 &&
168 /* HALIGN 4 resources are incompatible with the resolve engine,
169 * so fall back to using software to detile this resource. */
170 rsc->halign != TEXTURE_HALIGN_FOUR)) {
171 /* If the surface has tile status, we need to resolve it first.
172 * The strategy we implement here is to use the RS to copy the
173 * depth buffer, filling in the "holes" where the tile status
174 * indicates that it's clear. We also do this for tiled
175 * resources, but only if the RS can blit them. */
176 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
177 slab_free(&ctx->transfer_pool, trans);
178 BUG("unsupported transfer flags %#x with tile status/tiled layout", usage);
179 return NULL;
180 }
181
182 if (prsc->depth0 > 1) {
183 slab_free(&ctx->transfer_pool, trans);
184 BUG("resource has depth >1 with tile status");
185 return NULL;
186 }
187
188 struct pipe_resource templ = *prsc;
189 templ.nr_samples = 0;
190 templ.bind = PIPE_BIND_RENDER_TARGET;
191
192 trans->rsc = etna_resource_alloc(pctx->screen, ETNA_LAYOUT_LINEAR, &templ);
193 if (!trans->rsc) {
194 slab_free(&ctx->transfer_pool, trans);
195 return NULL;
196 }
197
198 if (!(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))
199 etna_copy_resource(pctx, trans->rsc, prsc, level,
200 trans->rsc->last_level);
201
202 /* Switch to using the temporary resource instead */
203 rsc = etna_resource(trans->rsc);
204 }
205
206 struct etna_resource_level *res_level = &rsc->levels[level];
207
208 /* Always sync if we have the temporary resource. The PIPE_TRANSFER_READ
209 * case could be optimised if we knew whether the resource has outstanding
210 * rendering. */
211 if ((usage & PIPE_TRANSFER_READ || trans->rsc) &&
212 rsc->status & ETNA_PENDING_WRITE)
213 pctx->flush(pctx, NULL, 0);
214
215 /* XXX we don't handle PIPE_TRANSFER_FLUSH_EXPLICIT; this flag can be ignored
216 * when mapping in-place,
217 * but when not in place we need to fire off the copy operation in
218 * transfer_flush_region (currently
219 * a no-op) instead of unmap. Need to handle this to support
220 * ARB_map_buffer_range extension at least.
221 */
222 /* XXX we don't take care of current operations on the resource; which can
223 be, at some point in the pipeline
224 which is not yet executed:
225
226 - bound as surface
227 - bound through vertex buffer
228 - bound through index buffer
229 - bound in sampler view
230 - used in clear_render_target / clear_depth_stencil operation
231 - used in blit
232 - used in resource_copy_region
233
234 How do other drivers record this information over course of the rendering
235 pipeline?
236 Is it necessary at all? Only in case we want to provide a fast path and
237 map the resource directly
238 (and for PIPE_TRANSFER_MAP_DIRECTLY) and we don't want to force a sync.
239 We also need to know whether the resource is in use to determine if a sync
240 is needed (or just do it
241 always, but that comes at the expense of performance).
242
243 A conservative approximation without too much overhead would be to mark
244 all resources that have
245 been bound at some point as busy. A drawback would be that accessing
246 resources that have
247 been bound but are no longer in use for a while still carry a performance
248 penalty. On the other hand,
249 the program could be using PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE or
250 PIPE_TRANSFER_UNSYNCHRONIZED to
251 avoid this in the first place...
252
253 A) We use an in-pipe copy engine, and queue the copy operation after unmap
254 so that the copy
255 will be performed when all current commands have been executed.
256 Using the RS is possible, not sure if always efficient. This can also
257 do any kind of tiling for us.
258 Only possible when PIPE_TRANSFER_DISCARD_RANGE is set.
259 B) We discard the entire resource (or at least, the mipmap level) and
260 allocate new memory for it.
261 Only possible when mapping the entire resource or
262 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is set.
263 */
264
265 /*
266 * Pull resources into the CPU domain. Only skipped for unsynchronized
267 * transfers without a temporary resource.
268 */
269 if (trans->rsc || !(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
270 uint32_t prep_flags = 0;
271
272 if (usage & PIPE_TRANSFER_READ)
273 prep_flags |= DRM_ETNA_PREP_READ;
274 if (usage & PIPE_TRANSFER_WRITE)
275 prep_flags |= DRM_ETNA_PREP_WRITE;
276
277 if (etna_bo_cpu_prep(rsc->bo, prep_flags))
278 goto fail_prep;
279 }
280
281 /* map buffer object */
282 void *mapped = etna_bo_map(rsc->bo);
283 if (!mapped)
284 goto fail;
285
286 *out_transfer = ptrans;
287
288 if (rsc->layout == ETNA_LAYOUT_LINEAR) {
289 ptrans->stride = res_level->stride;
290 ptrans->layer_stride = res_level->layer_stride;
291
292 return mapped + res_level->offset +
293 etna_compute_offset(prsc->format, box, res_level->stride,
294 res_level->layer_stride);
295 } else {
296 unsigned divSizeX = util_format_get_blockwidth(format);
297 unsigned divSizeY = util_format_get_blockheight(format);
298
299 /* No direct mappings of tiled, since we need to manually
300 * tile/untile.
301 */
302 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
303 goto fail;
304
305 mapped += res_level->offset;
306 ptrans->stride = align(box->width, divSizeX) * util_format_get_blocksize(format); /* row stride in bytes */
307 ptrans->layer_stride = align(box->height, divSizeY) * ptrans->stride;
308 size_t size = ptrans->layer_stride * box->depth;
309
310 trans->staging = MALLOC(size);
311 if (!trans->staging)
312 goto fail;
313
314 if (usage & PIPE_TRANSFER_READ) {
315 if (rsc->layout == ETNA_LAYOUT_TILED) {
316 etna_texture_untile(trans->staging,
317 mapped + ptrans->box.z * res_level->layer_stride,
318 ptrans->box.x, ptrans->box.y, res_level->stride,
319 ptrans->box.width, ptrans->box.height, ptrans->stride,
320 util_format_get_blocksize(rsc->base.format));
321 } else if (rsc->layout == ETNA_LAYOUT_LINEAR) {
322 util_copy_box(trans->staging, rsc->base.format, ptrans->stride,
323 ptrans->layer_stride, 0, 0, 0, /* dst x,y,z */
324 ptrans->box.width, ptrans->box.height,
325 ptrans->box.depth, mapped, res_level->stride,
326 res_level->layer_stride, ptrans->box.x,
327 ptrans->box.y, ptrans->box.z);
328 } else {
329 /* TODO supertiling */
330 BUG("unsupported tiling %i for reading", rsc->layout);
331 }
332 }
333
334 return trans->staging;
335 }
336
337 fail:
338 etna_bo_cpu_fini(rsc->bo);
339 fail_prep:
340 etna_transfer_unmap(pctx, ptrans);
341 return NULL;
342 }
343
344 static void
345 etna_transfer_flush_region(struct pipe_context *pctx,
346 struct pipe_transfer *transfer,
347 const struct pipe_box *box)
348 {
349 /* NOOP for now */
350 }
351
352 void
353 etna_transfer_init(struct pipe_context *pctx)
354 {
355 pctx->transfer_map = etna_transfer_map;
356 pctx->transfer_flush_region = etna_transfer_flush_region;
357 pctx->transfer_unmap = etna_transfer_unmap;
358 pctx->buffer_subdata = u_default_buffer_subdata;
359 pctx->texture_subdata = u_default_texture_subdata;
360 }