src/gallium/drivers/freedreno/a5xx/fd5_resource.c

   1 /*
   2  * Copyright (C) 2018 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "fd5_resource.h"
  28
  29 /* indexed by cpp: */
  30 static const struct {
  31         unsigned pitchalign;
  32         unsigned heightalign;
  33 } tile_alignment[] = {
  34         [1]  = { 128, 32 },
  35         [2]  = { 128, 16 },
  36         [3]  = { 128, 16 },
  37         [4]  = {  64, 16 },
  38         [8]  = {  64, 16 },
  39         [12] = {  64, 16 },
  40         [16] = {  64, 16 },
  41 };
  42
  43 /* NOTE: good way to test this is:  (for example)
  44  *  piglit/bin/texelFetch fs sampler2D 100x100x1-100x300x1
  45  */
  46 static uint32_t
  47 setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
  48 {
  49         struct pipe_resource *prsc = &rsc->base;
  50         struct fd_screen *screen = fd_screen(prsc->screen);
  51         enum util_format_layout layout = util_format_description(format)->layout;
  52         uint32_t pitchalign = screen->gmem_alignw;
  53         uint32_t heightalign;
  54         uint32_t level, size = 0;
  55         uint32_t width = prsc->width0;
  56         uint32_t height = prsc->height0;
  57         uint32_t depth = prsc->depth0;
  58         /* in layer_first layout, the level (slice) contains just one
  59          * layer (since in fact the layer contains the slices)
  60          */
  61         uint32_t layers_in_level = rsc->layout.layer_first ? 1 : prsc->array_size;
  62
  63         heightalign = tile_alignment[rsc->layout.cpp].heightalign;
  64
  65         for (level = 0; level <= prsc->last_level; level++) {
  66                 struct fdl_slice *slice = fd_resource_slice(rsc, level);
  67                 uint32_t aligned_height = height;
  68                 uint32_t blocks;
  69
  70                 if (fd_resource_tile_mode(prsc, level)) {
  71                         pitchalign = tile_alignment[rsc->layout.cpp].pitchalign;
  72                         aligned_height = align(aligned_height, heightalign);
  73                 } else {
  74                         pitchalign = 64;
  75
  76                         /* The blits used for mem<->gmem work at a granularity of
  77                          * 32x32, which can cause faults due to over-fetch on the
  78                          * last level.  The simple solution is to over-allocate a
  79                          * bit the last level to ensure any over-fetch is harmless.
  80                          * The pitch is already sufficiently aligned, but height
  81                          * may not be:
  82                          */
  83                         if ((level == prsc->last_level) && (prsc->target != PIPE_BUFFER))
  84                                 aligned_height = align(aligned_height, 32);
  85                 }
  86
  87                 if (layout == UTIL_FORMAT_LAYOUT_ASTC)
  88                         slice->pitch =
  89                                 util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
  90                 else
  91                         slice->pitch = align(width, pitchalign);
  92
  93                 slice->offset = size;
  94                 blocks = util_format_get_nblocks(format, slice->pitch, aligned_height);
  95
  96                 /* 1d array and 2d array textures must all have the same layer size
  97                  * for each miplevel on a3xx. 3d textures can have different layer
  98                  * sizes for high levels, but the hw auto-sizer is buggy (or at least
  99                  * different than what this code does), so as soon as the layer size
 100                  * range gets into range, we stop reducing it.
 101                  */
 102                 if (prsc->target == PIPE_TEXTURE_3D && (
 103                                         level == 1 ||
 104                                         (level > 1 && fd_resource_slice(rsc, level - 1)->size0 > 0xf000)))
 105                         slice->size0 = align(blocks * rsc->layout.cpp, alignment);
 106                 else if (level == 0 || rsc->layout.layer_first || alignment == 1)
 107                         slice->size0 = align(blocks * rsc->layout.cpp, alignment);
 108                 else
 109                         slice->size0 = fd_resource_slice(rsc, level - 1)->size0;
 110
 111                 size += slice->size0 * depth * layers_in_level;
 112
 113                 width = u_minify(width, 1);
 114                 height = u_minify(height, 1);
 115                 depth = u_minify(depth, 1);
 116         }
 117
 118         return size;
 119 }
 120
 121 static void
 122 setup_lrz(struct fd_resource *rsc)
 123 {
 124         struct fd_screen *screen = fd_screen(rsc->base.screen);
 125         const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
 126                         DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
 127         unsigned lrz_pitch  = align(DIV_ROUND_UP(rsc->base.width0, 8), 64);
 128         unsigned lrz_height = DIV_ROUND_UP(rsc->base.height0, 8);
 129
 130         /* LRZ buffer is super-sampled: */
 131         switch (rsc->base.nr_samples) {
 132         case 4:
 133                 lrz_pitch *= 2;
 134                 /* fallthrough */
 135         case 2:
 136                 lrz_height *= 2;
 137         }
 138
 139         unsigned size = lrz_pitch * lrz_height * 2;
 140
 141         size += 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
 142
 143         rsc->lrz_height = lrz_height;
 144         rsc->lrz_width = lrz_pitch;
 145         rsc->lrz_pitch = lrz_pitch;
 146         rsc->lrz = fd_bo_new(screen->dev, size, flags, "lrz");
 147 }
 148
 149 uint32_t
 150 fd5_setup_slices(struct fd_resource *rsc)
 151 {
 152         uint32_t alignment;
 153
 154         if ((fd_mesa_debug & FD_DBG_LRZ) && has_depth(rsc->base.format))
 155                 setup_lrz(rsc);
 156
 157         switch (rsc->base.target) {
 158         case PIPE_TEXTURE_3D:
 159                 rsc->layout.layer_first = false;
 160                 alignment = 4096;
 161                 break;
 162         default:
 163                 rsc->layout.layer_first = true;
 164                 alignment = 1;
 165                 break;
 166         }
 167
 168         return setup_slices(rsc, alignment, rsc->base.format);
 169 }