6119f564400c51de3499e8225e489d582ec38920
[mesa.git] / src / gallium / drivers / freedreno / freedreno_gmem.c
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "pipe/p_state.h"
28 #include "util/hash_table.h"
29 #include "util/u_dump.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/format/u_format.h"
34
35 #include "freedreno_gmem.h"
36 #include "freedreno_context.h"
37 #include "freedreno_fence.h"
38 #include "freedreno_log.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_query_hw.h"
41 #include "freedreno_util.h"
42
43 /*
44 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
45 * inside the GPU. All rendering happens to GMEM. Larger render targets
46 * are split into tiles that are small enough for the color (and depth and/or
47 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
48 * if there was not a clear invalidating the previous tile contents, we need
49 * to restore the previous tiles contents (system mem -> GMEM), and after all
50 * the draw calls, before moving to the next tile, we need to save the tile
51 * contents (GMEM -> system mem).
52 *
53 * The code in this file handles dealing with GMEM and tiling.
54 *
55 * The structure of the ringbuffer ends up being:
56 *
57 * +--<---<-- IB ---<---+---<---+---<---<---<--+
58 * | | | |
59 * v ^ ^ ^
60 * ------------------------------------------------------
61 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
62 * ------------------------------------------------------
63 * ^
64 * |
65 * address submitted in issueibcmds
66 *
67 * Where the per-tile section handles scissor setup, mem2gmem restore (if
68 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
69 * resolve.
70 */
71
72 #ifndef BIN_DEBUG
73 # define BIN_DEBUG 0
74 #endif
75
76 /*
77 * GMEM Cache:
78 *
79 * Caches GMEM state based on a given framebuffer state. The key is
80 * meant to be the minimal set of data that results in a unique gmem
81 * configuration, avoiding multiple keys arriving at the same gmem
82 * state. For example, the render target format is not part of the
83 * key, only the size per pixel. And the max_scissor bounds is not
84 * part of they key, only the minx/miny (after clamping to tile
85 * alignment) and width/height. This ensures that slightly different
86 * max_scissor which would result in the same gmem state, do not
87 * become different keys that map to the same state.
88 */
89
90 struct gmem_key {
91 uint16_t minx, miny;
92 uint16_t width, height;
93 uint8_t gmem_page_align; /* alignment in multiples of 0x1000 to reduce key size */
94 uint8_t nr_cbufs;
95 uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
96 uint8_t zsbuf_cpp[2];
97 };
98
99 static uint32_t
100 gmem_key_hash(const void *_key)
101 {
102 const struct gmem_key *key = _key;
103 return _mesa_hash_data(key, sizeof(*key));
104 }
105
106 static bool
107 gmem_key_equals(const void *_a, const void *_b)
108 {
109 const struct gmem_key *a = _a;
110 const struct gmem_key *b = _b;
111 return memcmp(a, b, sizeof(*a)) == 0;
112 }
113
114 static void
115 dump_gmem_key(const struct gmem_key *key)
116 {
117 printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u",
118 key->minx, key->miny, key->width, key->height);
119 printf(", .gmem_page_align=%u, .nr_cbufs=%u",
120 key->gmem_page_align, key->nr_cbufs);
121 printf(", .cbuf_cpp = {");
122 for (unsigned i = 0; i < ARRAY_SIZE(key->cbuf_cpp); i++)
123 printf("%u,", key->cbuf_cpp[i]);
124 printf("}, .zsbuf_cpp = {");
125 for (unsigned i = 0; i < ARRAY_SIZE(key->zsbuf_cpp); i++)
126 printf("%u,", key->zsbuf_cpp[i]);
127 printf("}},\n");
128 }
129
130 static void
131 dump_gmem_state(const struct fd_gmem_stateobj *gmem)
132 {
133 unsigned total = 0;
134 printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n",
135 gmem->bin_w, gmem->bin_h, gmem->nbins_x, gmem->nbins_y);
136 for (int i = 0; i < ARRAY_SIZE(gmem->cbuf_base); i++) {
137 if (!gmem->cbuf_cpp[i])
138 continue;
139
140 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
141 printf(" cbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
142 gmem->cbuf_base[i], size, gmem->cbuf_cpp[i]);
143
144 total = gmem->cbuf_base[i] + size;
145 }
146
147 for (int i = 0; i < ARRAY_SIZE(gmem->zsbuf_base); i++) {
148 if (!gmem->zsbuf_cpp[i])
149 continue;
150
151 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
152 printf(" zsbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
153 gmem->zsbuf_base[i], size, gmem->zsbuf_cpp[i]);
154
155 total = gmem->zsbuf_base[i] + size;
156 }
157
158 printf("total: 0x%06x (of 0x%06x)\n", total,
159 gmem->screen->gmemsize_bytes);
160 }
161
162 static uint32_t bin_width(struct fd_screen *screen)
163 {
164 if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
165 return 1024;
166 if (is_a3xx(screen))
167 return 992;
168 return 512;
169 }
170
171 static unsigned
172 div_align(unsigned num, unsigned denom, unsigned al)
173 {
174 return util_align_npot(DIV_ROUND_UP(num, denom), al);
175 }
176
177 static bool
178 layout_gmem(struct gmem_key *key, uint32_t nbins_x, uint32_t nbins_y,
179 struct fd_gmem_stateobj *gmem)
180 {
181 struct fd_screen *screen = gmem->screen;
182 uint32_t gmem_align = key->gmem_page_align * 0x1000;
183 uint32_t total = 0, i;
184
185 if ((nbins_x == 0) || (nbins_y == 0))
186 return false;
187
188 uint32_t bin_w, bin_h;
189 bin_w = div_align(key->width, nbins_x, screen->tile_alignw);
190 bin_h = div_align(key->height, nbins_y, screen->tile_alignh);
191
192 gmem->bin_w = bin_w;
193 gmem->bin_h = bin_h;
194
195 /* due to aligning bin_w/h, we could end up with one too
196 * many bins in either dimension, so recalculate:
197 */
198 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w);
199 gmem->nbins_y = DIV_ROUND_UP(key->height, bin_h);
200
201 for (i = 0; i < MAX_RENDER_TARGETS; i++) {
202 if (key->cbuf_cpp[i]) {
203 gmem->cbuf_base[i] = util_align_npot(total, gmem_align);
204 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h;
205 }
206 }
207
208 if (key->zsbuf_cpp[0]) {
209 gmem->zsbuf_base[0] = util_align_npot(total, gmem_align);
210 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h;
211 }
212
213 if (key->zsbuf_cpp[1]) {
214 gmem->zsbuf_base[1] = util_align_npot(total, gmem_align);
215 total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h;
216 }
217
218 return total <= screen->gmemsize_bytes;
219 }
220
221 static void
222 calc_nbins(struct gmem_key *key, struct fd_gmem_stateobj *gmem)
223 {
224 struct fd_screen *screen = gmem->screen;
225 uint32_t nbins_x = 1, nbins_y = 1;
226 uint32_t max_width = bin_width(screen);
227
228 if (fd_mesa_debug & FD_DBG_MSGS) {
229 debug_printf("binning input: cbuf cpp:");
230 for (unsigned i = 0; i < key->nr_cbufs; i++)
231 debug_printf(" %d", key->cbuf_cpp[i]);
232 debug_printf(", zsbuf cpp: %d; %dx%d\n",
233 key->zsbuf_cpp[0], key->width, key->height);
234 }
235
236 /* first, find a bin width that satisfies the maximum width
237 * restrictions:
238 */
239 while (div_align(key->width, nbins_x, screen->tile_alignw) > max_width) {
240 nbins_x++;
241 }
242
243 /* then find a bin width/height that satisfies the memory
244 * constraints:
245 */
246 while (!layout_gmem(key, nbins_x, nbins_y, gmem)) {
247 if (nbins_y > nbins_x) {
248 nbins_x++;
249 } else {
250 nbins_y++;
251 }
252 }
253
254 /* Lets see if we can tweak the layout a bit and come up with
255 * something better:
256 */
257 if ((((nbins_x - 1) * (nbins_y + 1)) < (nbins_x * nbins_y)) &&
258 layout_gmem(key, nbins_x - 1, nbins_y + 1, gmem)) {
259 nbins_x--;
260 nbins_y++;
261 } else if ((((nbins_x + 1) * (nbins_y - 1)) < (nbins_x * nbins_y)) &&
262 layout_gmem(key, nbins_x + 1, nbins_y - 1, gmem)) {
263 nbins_x++;
264 nbins_y--;
265 }
266
267 layout_gmem(key, nbins_x, nbins_y, gmem);
268
269 }
270
271 static struct fd_gmem_stateobj *
272 gmem_stateobj_init(struct fd_screen *screen, struct gmem_key *key)
273 {
274 struct fd_gmem_stateobj *gmem =
275 rzalloc(screen->gmem_cache.ht, struct fd_gmem_stateobj);
276 pipe_reference_init(&gmem->reference, 1);
277 gmem->screen = screen;
278 gmem->key = key;
279 list_inithead(&gmem->node);
280
281 const unsigned npipes = screen->num_vsc_pipes;
282 uint32_t i, j, t, xoff, yoff;
283 uint32_t tpp_x, tpp_y;
284 int tile_n[npipes];
285
286 calc_nbins(key, gmem);
287
288 DBG("using %d bins of size %dx%d", gmem->nbins_x * gmem->nbins_y,
289 gmem->bin_w, gmem->bin_h);
290
291 memcpy(gmem->cbuf_cpp, key->cbuf_cpp, sizeof(key->cbuf_cpp));
292 memcpy(gmem->zsbuf_cpp, key->zsbuf_cpp, sizeof(key->zsbuf_cpp));
293 gmem->minx = key->minx;
294 gmem->miny = key->miny;
295 gmem->width = key->width;
296 gmem->height = key->height;
297
298 if (BIN_DEBUG) {
299 dump_gmem_state(gmem);
300 dump_gmem_key(key);
301 }
302
303 /*
304 * Assign tiles and pipes:
305 *
306 * At some point it might be worth playing with different
307 * strategies and seeing if that makes much impact on
308 * performance.
309 */
310
311 #define div_round_up(v, a) (((v) + (a) - 1) / (a))
312 /* figure out number of tiles per pipe: */
313 if (is_a20x(screen)) {
314 /* for a20x we want to minimize the number of "pipes"
315 * binning data has 3 bits for x/y (8x8) but the edges are used to
316 * cull off-screen vertices with hw binning, so we have 6x6 pipes
317 */
318 tpp_x = 6;
319 tpp_y = 6;
320 } else {
321 tpp_x = tpp_y = 1;
322 while (div_round_up(gmem->nbins_y, tpp_y) > npipes)
323 tpp_y += 2;
324 while ((div_round_up(gmem->nbins_y, tpp_y) *
325 div_round_up(gmem->nbins_x, tpp_x)) > npipes)
326 tpp_x += 1;
327 }
328
329 gmem->maxpw = tpp_x;
330 gmem->maxph = tpp_y;
331
332 /* configure pipes: */
333 xoff = yoff = 0;
334 for (i = 0; i < npipes; i++) {
335 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
336
337 if (xoff >= gmem->nbins_x) {
338 xoff = 0;
339 yoff += tpp_y;
340 }
341
342 if (yoff >= gmem->nbins_y) {
343 break;
344 }
345
346 pipe->x = xoff;
347 pipe->y = yoff;
348 pipe->w = MIN2(tpp_x, gmem->nbins_x - xoff);
349 pipe->h = MIN2(tpp_y, gmem->nbins_y - yoff);
350
351 xoff += tpp_x;
352 }
353
354 /* number of pipes to use for a20x */
355 gmem->num_vsc_pipes = MAX2(1, i);
356
357 for (; i < npipes; i++) {
358 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
359 pipe->x = pipe->y = pipe->w = pipe->h = 0;
360 }
361
362 if (BIN_DEBUG) {
363 printf("%dx%d ... tpp=%dx%d\n", gmem->nbins_x, gmem->nbins_y, tpp_x, tpp_y);
364 for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) {
365 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
366 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
367 pipe->w, pipe->h, pipe->x, pipe->y);
368 }
369 }
370
371 /* configure tiles: */
372 t = 0;
373 yoff = key->miny;
374 memset(tile_n, 0, sizeof(tile_n));
375 for (i = 0; i < gmem->nbins_y; i++) {
376 int bw, bh;
377
378 xoff = key->minx;
379
380 /* clip bin height: */
381 bh = MIN2(gmem->bin_h, key->miny + key->height - yoff);
382 assert(bh > 0);
383
384 for (j = 0; j < gmem->nbins_x; j++) {
385 struct fd_tile *tile = &gmem->tile[t];
386 uint32_t p;
387
388 assert(t < ARRAY_SIZE(gmem->tile));
389
390 /* pipe number: */
391 p = ((i / tpp_y) * div_round_up(gmem->nbins_x, tpp_x)) + (j / tpp_x);
392 assert(p < gmem->num_vsc_pipes);
393
394 /* clip bin width: */
395 bw = MIN2(gmem->bin_w, key->minx + key->width - xoff);
396 assert(bw > 0);
397
398 tile->n = !is_a20x(screen) ? tile_n[p]++ :
399 ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
400 tile->p = p;
401 tile->bin_w = bw;
402 tile->bin_h = bh;
403 tile->xoff = xoff;
404 tile->yoff = yoff;
405
406 if (BIN_DEBUG) {
407 printf("tile[%d]: p=%u, bin=%ux%u+%u+%u\n", t,
408 p, bw, bh, xoff, yoff);
409 }
410
411 t++;
412
413 xoff += bw;
414 }
415
416 yoff += bh;
417 }
418
419 if (BIN_DEBUG) {
420 t = 0;
421 for (i = 0; i < gmem->nbins_y; i++) {
422 for (j = 0; j < gmem->nbins_x; j++) {
423 struct fd_tile *tile = &gmem->tile[t++];
424 printf("|p:%u n:%u|", tile->p, tile->n);
425 }
426 printf("\n");
427 }
428 }
429
430 return gmem;
431 }
432
433 void
434 __fd_gmem_destroy(struct fd_gmem_stateobj *gmem)
435 {
436 struct fd_gmem_cache *cache = &gmem->screen->gmem_cache;
437
438 fd_screen_assert_locked(gmem->screen);
439
440 _mesa_hash_table_remove_key(cache->ht, gmem->key);
441 list_del(&gmem->node);
442
443 ralloc_free(gmem->key);
444 ralloc_free(gmem);
445 }
446
447 static struct gmem_key *
448 gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
449 {
450 struct fd_screen *screen = batch->ctx->screen;
451 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
452 bool has_zs = pfb->zsbuf && !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED |
453 FD_GMEM_STENCIL_ENABLED | FD_GMEM_CLEARS_DEPTH_STENCIL));
454 struct gmem_key *key = rzalloc(screen->gmem_cache.ht, struct gmem_key);
455
456 if (has_zs || assume_zs) {
457 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
458 key->zsbuf_cpp[0] = rsc->layout.cpp;
459 if (rsc->stencil)
460 key->zsbuf_cpp[1] = rsc->stencil->layout.cpp;
461 } else {
462 /* we might have a zsbuf, but it isn't used */
463 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
464 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
465 }
466
467 key->nr_cbufs = pfb->nr_cbufs;
468 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
469 if (pfb->cbufs[i])
470 key->cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
471 else
472 key->cbuf_cpp[i] = 4;
473 /* if MSAA, color buffers are super-sampled in GMEM: */
474 key->cbuf_cpp[i] *= pfb->samples;
475 }
476
477 /* NOTE: on a6xx, the max-scissor-rect is handled in fd6_gmem, and
478 * we just rely on CP_COND_EXEC to skip bins with no geometry.
479 */
480 if (no_scis_opt || is_a6xx(screen)) {
481 key->minx = 0;
482 key->miny = 0;
483 key->width = pfb->width;
484 key->height = pfb->height;
485 } else {
486 struct pipe_scissor_state *scissor = &batch->max_scissor;
487
488 if (fd_mesa_debug & FD_DBG_NOSCIS) {
489 scissor->minx = 0;
490 scissor->miny = 0;
491 scissor->maxx = pfb->width;
492 scissor->maxy = pfb->height;
493 }
494
495 /* round down to multiple of alignment: */
496 key->minx = scissor->minx & ~(screen->gmem_alignw - 1);
497 key->miny = scissor->miny & ~(screen->gmem_alignh - 1);
498 key->width = scissor->maxx - key->minx;
499 key->height = scissor->maxy - key->miny;
500 }
501
502 if (is_a20x(screen) && batch->cleared) {
503 /* under normal circumstances the requirement would be 4K
504 * but the fast clear path requires an alignment of 32K
505 */
506 key->gmem_page_align = 8;
507 } else if (is_a6xx(screen)) {
508 key->gmem_page_align = is_a650(screen) ? 3 : 1;
509 } else {
510 // TODO re-check this across gens.. maybe it should only
511 // be a single page in some cases:
512 key->gmem_page_align = 4;
513 }
514
515 return key;
516 }
517
518 static struct fd_gmem_stateobj *
519 lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
520 {
521 struct fd_screen *screen = batch->ctx->screen;
522 struct fd_gmem_cache *cache = &screen->gmem_cache;
523 struct fd_gmem_stateobj *gmem = NULL;
524 struct gmem_key *key = gmem_key_init(batch, assume_zs, no_scis_opt);
525 uint32_t hash = gmem_key_hash(key);
526
527 fd_screen_lock(screen);
528
529 struct hash_entry *entry =
530 _mesa_hash_table_search_pre_hashed(cache->ht, hash, key);
531 if (entry) {
532 ralloc_free(key);
533 goto found;
534 }
535
536 /* limit the # of cached gmem states, discarding the least
537 * recently used state if needed:
538 */
539 if (cache->ht->entries >= 20) {
540 struct fd_gmem_stateobj *last =
541 list_last_entry(&cache->lru, struct fd_gmem_stateobj, node);
542 fd_gmem_reference(&last, NULL);
543 }
544
545 entry = _mesa_hash_table_insert_pre_hashed(cache->ht,
546 hash, key, gmem_stateobj_init(screen, key));
547
548 found:
549 fd_gmem_reference(&gmem, entry->data);
550 /* Move to the head of the LRU: */
551 list_delinit(&gmem->node);
552 list_add(&gmem->node, &cache->lru);
553
554 fd_screen_unlock(screen);
555
556 return gmem;
557 }
558
559 /*
560 * GMEM render pass
561 */
562
563 static void
564 render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem)
565 {
566 struct fd_context *ctx = batch->ctx;
567 int i;
568
569 mtx_lock(&ctx->gmem_lock);
570
571 ctx->emit_tile_init(batch);
572
573 if (batch->restore)
574 ctx->stats.batch_restore++;
575
576 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
577 struct fd_tile *tile = &gmem->tile[i];
578
579 fd_log(batch, "bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
580 tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
581
582 ctx->emit_tile_prep(batch, tile);
583
584 if (batch->restore) {
585 ctx->emit_tile_mem2gmem(batch, tile);
586 }
587
588 ctx->emit_tile_renderprep(batch, tile);
589
590 if (ctx->query_prepare_tile)
591 ctx->query_prepare_tile(batch, i, batch->gmem);
592
593 /* emit IB to drawcmds: */
594 fd_log(batch, "TILE[%d]: START DRAW IB", i);
595 if (ctx->emit_tile) {
596 ctx->emit_tile(batch, tile);
597 } else {
598 ctx->screen->emit_ib(batch->gmem, batch->draw);
599 }
600 fd_log(batch, "TILE[%d]: END DRAW IB", i);
601 fd_reset_wfi(batch);
602
603 /* emit gmem2mem to transfer tile back to system memory: */
604 ctx->emit_tile_gmem2mem(batch, tile);
605 }
606
607 if (ctx->emit_tile_fini)
608 ctx->emit_tile_fini(batch);
609
610 mtx_unlock(&ctx->gmem_lock);
611 }
612
613 static void
614 render_sysmem(struct fd_batch *batch)
615 {
616 struct fd_context *ctx = batch->ctx;
617
618 ctx->emit_sysmem_prep(batch);
619
620 if (ctx->query_prepare_tile)
621 ctx->query_prepare_tile(batch, 0, batch->gmem);
622
623 /* emit IB to drawcmds: */
624 fd_log(batch, "SYSMEM: START DRAW IB");
625 ctx->screen->emit_ib(batch->gmem, batch->draw);
626 fd_log(batch, "SYSMEM: END DRAW IB");
627 fd_reset_wfi(batch);
628
629 if (ctx->emit_sysmem_fini)
630 ctx->emit_sysmem_fini(batch);
631 }
632
633 static void
634 flush_ring(struct fd_batch *batch)
635 {
636 uint32_t timestamp;
637 int out_fence_fd = -1;
638
639 if (unlikely(fd_mesa_debug & FD_DBG_NOHW))
640 return;
641
642 fd_submit_flush(batch->submit, batch->in_fence_fd,
643 batch->needs_out_fence_fd ? &out_fence_fd : NULL,
644 &timestamp);
645
646 fd_fence_populate(batch->fence, timestamp, out_fence_fd);
647 fd_log_flush(batch);
648 }
649
650 void
651 fd_gmem_render_tiles(struct fd_batch *batch)
652 {
653 struct fd_context *ctx = batch->ctx;
654 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
655 bool sysmem = false;
656
657 if (ctx->emit_sysmem_prep && !batch->nondraw) {
658 if (batch->cleared || batch->gmem_reason ||
659 ((batch->num_draws > 5) && !batch->blit) ||
660 (pfb->samples > 1)) {
661 fd_log(batch, "GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
662 batch->cleared, batch->gmem_reason, batch->num_draws,
663 pfb->samples);
664 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
665 sysmem = true;
666 }
667
668 /* For ARB_framebuffer_no_attachments: */
669 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
670 sysmem = true;
671 }
672 }
673
674 if (fd_mesa_debug & FD_DBG_NOGMEM)
675 sysmem = true;
676
677 /* Layered rendering always needs bypass. */
678 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
679 struct pipe_surface *psurf = pfb->cbufs[i];
680 if (!psurf)
681 continue;
682 if (psurf->u.tex.first_layer < psurf->u.tex.last_layer)
683 sysmem = true;
684 }
685
686 /* Tessellation doesn't seem to support tiled rendering so fall back to
687 * bypass.
688 */
689 if (batch->tessellation) {
690 debug_assert(ctx->emit_sysmem_prep);
691 sysmem = true;
692 }
693
694 fd_reset_wfi(batch);
695
696 ctx->stats.batch_total++;
697
698 if (unlikely(fd_mesa_debug & FD_DBG_LOG) && !batch->nondraw) {
699 fd_log_stream(batch, stream, util_dump_framebuffer_state(stream, pfb));
700 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
701 fd_log_stream(batch, stream, util_dump_surface(stream, pfb->cbufs[i]));
702 }
703 fd_log_stream(batch, stream, util_dump_surface(stream, pfb->zsbuf));
704 }
705
706 if (batch->nondraw) {
707 DBG("%p: rendering non-draw", batch);
708 ctx->stats.batch_nondraw++;
709 } else if (sysmem) {
710 fd_log(batch, "%p: rendering sysmem %ux%u (%s/%s), num_draws=%u",
711 batch, pfb->width, pfb->height,
712 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
713 util_format_short_name(pipe_surface_format(pfb->zsbuf)),
714 batch->num_draws);
715 if (ctx->query_prepare)
716 ctx->query_prepare(batch, 1);
717 render_sysmem(batch);
718 ctx->stats.batch_sysmem++;
719 } else {
720 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, false, false);
721 batch->gmem_state = gmem;
722 fd_log(batch, "%p: rendering %dx%d tiles %ux%u (%s/%s)",
723 batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
724 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
725 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
726 if (ctx->query_prepare)
727 ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
728 render_tiles(batch, gmem);
729 batch->gmem_state = NULL;
730
731 fd_screen_lock(ctx->screen);
732 fd_gmem_reference(&gmem, NULL);
733 fd_screen_unlock(ctx->screen);
734
735 ctx->stats.batch_gmem++;
736 }
737
738 flush_ring(batch);
739 }
740
741 /* Determine a worst-case estimate (ie. assuming we don't eliminate an
742 * unused depth/stencil) number of bins per vsc pipe.
743 */
744 unsigned
745 fd_gmem_estimate_bins_per_pipe(struct fd_batch *batch)
746 {
747 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
748 struct fd_screen *screen = batch->ctx->screen;
749 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, !!pfb->zsbuf, true);
750 unsigned nbins = gmem->maxpw * gmem->maxph;
751
752 fd_screen_lock(screen);
753 fd_gmem_reference(&gmem, NULL);
754 fd_screen_unlock(screen);
755
756 return nbins;
757 }
758
759 /* When deciding whether a tile needs mem2gmem, we need to take into
760 * account the scissor rect(s) that were cleared. To simplify we only
761 * consider the last scissor rect for each buffer, since the common
762 * case would be a single clear.
763 */
764 bool
765 fd_gmem_needs_restore(struct fd_batch *batch, const struct fd_tile *tile,
766 uint32_t buffers)
767 {
768 if (!(batch->restore & buffers))
769 return false;
770
771 return true;
772 }
773
774 void
775 fd_gmem_screen_init(struct pipe_screen *pscreen)
776 {
777 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
778
779 cache->ht = _mesa_hash_table_create(NULL, gmem_key_hash, gmem_key_equals);
780 list_inithead(&cache->lru);
781 }
782
783 void
784 fd_gmem_screen_fini(struct pipe_screen *pscreen)
785 {
786 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
787
788 _mesa_hash_table_destroy(cache->ht, NULL);
789 }