freedreno/a5xx+a6xx: use sysmem path for nondraw batches
[mesa.git] / src / gallium / drivers / freedreno / freedreno_gmem.c
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "util/debug.h"
28 #include "pipe/p_state.h"
29 #include "util/hash_table.h"
30 #include "util/u_dump.h"
31 #include "util/u_string.h"
32 #include "util/u_memory.h"
33 #include "util/u_inlines.h"
34 #include "util/format/u_format.h"
35
36 #include "freedreno_gmem.h"
37 #include "freedreno_context.h"
38 #include "freedreno_fence.h"
39 #include "freedreno_log.h"
40 #include "freedreno_resource.h"
41 #include "freedreno_query_hw.h"
42 #include "freedreno_util.h"
43
44 /*
45 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
46 * inside the GPU. All rendering happens to GMEM. Larger render targets
47 * are split into tiles that are small enough for the color (and depth and/or
48 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
49 * if there was not a clear invalidating the previous tile contents, we need
50 * to restore the previous tiles contents (system mem -> GMEM), and after all
51 * the draw calls, before moving to the next tile, we need to save the tile
52 * contents (GMEM -> system mem).
53 *
54 * The code in this file handles dealing with GMEM and tiling.
55 *
56 * The structure of the ringbuffer ends up being:
57 *
58 * +--<---<-- IB ---<---+---<---+---<---<---<--+
59 * | | | |
60 * v ^ ^ ^
61 * ------------------------------------------------------
62 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
63 * ------------------------------------------------------
64 * ^
65 * |
66 * address submitted in issueibcmds
67 *
68 * Where the per-tile section handles scissor setup, mem2gmem restore (if
69 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
70 * resolve.
71 */
72
73 #ifndef BIN_DEBUG
74 # define BIN_DEBUG 0
75 #endif
76
77 /*
78 * GMEM Cache:
79 *
80 * Caches GMEM state based on a given framebuffer state. The key is
81 * meant to be the minimal set of data that results in a unique gmem
82 * configuration, avoiding multiple keys arriving at the same gmem
83 * state. For example, the render target format is not part of the
84 * key, only the size per pixel. And the max_scissor bounds is not
85 * part of they key, only the minx/miny (after clamping to tile
86 * alignment) and width/height. This ensures that slightly different
87 * max_scissor which would result in the same gmem state, do not
88 * become different keys that map to the same state.
89 */
90
91 struct gmem_key {
92 uint16_t minx, miny;
93 uint16_t width, height;
94 uint8_t gmem_page_align; /* alignment in multiples of 0x1000 to reduce key size */
95 uint8_t nr_cbufs;
96 uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
97 uint8_t zsbuf_cpp[2];
98 };
99
100 static uint32_t
101 gmem_key_hash(const void *_key)
102 {
103 const struct gmem_key *key = _key;
104 return _mesa_hash_data(key, sizeof(*key));
105 }
106
107 static bool
108 gmem_key_equals(const void *_a, const void *_b)
109 {
110 const struct gmem_key *a = _a;
111 const struct gmem_key *b = _b;
112 return memcmp(a, b, sizeof(*a)) == 0;
113 }
114
115 static void
116 dump_gmem_key(const struct gmem_key *key)
117 {
118 printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u",
119 key->minx, key->miny, key->width, key->height);
120 printf(", .gmem_page_align=%u, .nr_cbufs=%u",
121 key->gmem_page_align, key->nr_cbufs);
122 printf(", .cbuf_cpp = {");
123 for (unsigned i = 0; i < ARRAY_SIZE(key->cbuf_cpp); i++)
124 printf("%u,", key->cbuf_cpp[i]);
125 printf("}, .zsbuf_cpp = {");
126 for (unsigned i = 0; i < ARRAY_SIZE(key->zsbuf_cpp); i++)
127 printf("%u,", key->zsbuf_cpp[i]);
128 printf("}},\n");
129 }
130
131 static void
132 dump_gmem_state(const struct fd_gmem_stateobj *gmem)
133 {
134 unsigned total = 0;
135 printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n",
136 gmem->bin_w, gmem->bin_h, gmem->nbins_x, gmem->nbins_y);
137 for (int i = 0; i < ARRAY_SIZE(gmem->cbuf_base); i++) {
138 if (!gmem->cbuf_cpp[i])
139 continue;
140
141 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
142 printf(" cbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
143 gmem->cbuf_base[i], size, gmem->cbuf_cpp[i]);
144
145 total = gmem->cbuf_base[i] + size;
146 }
147
148 for (int i = 0; i < ARRAY_SIZE(gmem->zsbuf_base); i++) {
149 if (!gmem->zsbuf_cpp[i])
150 continue;
151
152 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
153 printf(" zsbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
154 gmem->zsbuf_base[i], size, gmem->zsbuf_cpp[i]);
155
156 total = gmem->zsbuf_base[i] + size;
157 }
158
159 printf("total: 0x%06x (of 0x%06x)\n", total,
160 gmem->screen->gmemsize_bytes);
161 }
162
163 static uint32_t bin_width(struct fd_screen *screen)
164 {
165 if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
166 return 1024;
167 if (is_a3xx(screen))
168 return 992;
169 return 512;
170 }
171
172 static unsigned
173 div_align(unsigned num, unsigned denom, unsigned al)
174 {
175 return util_align_npot(DIV_ROUND_UP(num, denom), al);
176 }
177
178 static bool
179 layout_gmem(struct gmem_key *key, uint32_t nbins_x, uint32_t nbins_y,
180 struct fd_gmem_stateobj *gmem)
181 {
182 struct fd_screen *screen = gmem->screen;
183 uint32_t gmem_align = key->gmem_page_align * 0x1000;
184 uint32_t total = 0, i;
185
186 if ((nbins_x == 0) || (nbins_y == 0))
187 return false;
188
189 uint32_t bin_w, bin_h;
190 bin_w = div_align(key->width, nbins_x, screen->tile_alignw);
191 bin_h = div_align(key->height, nbins_y, screen->tile_alignh);
192
193 gmem->bin_w = bin_w;
194 gmem->bin_h = bin_h;
195
196 /* due to aligning bin_w/h, we could end up with one too
197 * many bins in either dimension, so recalculate:
198 */
199 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w);
200 gmem->nbins_y = DIV_ROUND_UP(key->height, bin_h);
201
202 for (i = 0; i < MAX_RENDER_TARGETS; i++) {
203 if (key->cbuf_cpp[i]) {
204 gmem->cbuf_base[i] = util_align_npot(total, gmem_align);
205 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h;
206 }
207 }
208
209 if (key->zsbuf_cpp[0]) {
210 gmem->zsbuf_base[0] = util_align_npot(total, gmem_align);
211 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h;
212 }
213
214 if (key->zsbuf_cpp[1]) {
215 gmem->zsbuf_base[1] = util_align_npot(total, gmem_align);
216 total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h;
217 }
218
219 return total <= screen->gmemsize_bytes;
220 }
221
222 static void
223 calc_nbins(struct gmem_key *key, struct fd_gmem_stateobj *gmem)
224 {
225 struct fd_screen *screen = gmem->screen;
226 uint32_t nbins_x = 1, nbins_y = 1;
227 uint32_t max_width = bin_width(screen);
228
229 if (fd_mesa_debug & FD_DBG_MSGS) {
230 debug_printf("binning input: cbuf cpp:");
231 for (unsigned i = 0; i < key->nr_cbufs; i++)
232 debug_printf(" %d", key->cbuf_cpp[i]);
233 debug_printf(", zsbuf cpp: %d; %dx%d\n",
234 key->zsbuf_cpp[0], key->width, key->height);
235 }
236
237 /* first, find a bin width that satisfies the maximum width
238 * restrictions:
239 */
240 while (div_align(key->width, nbins_x, screen->tile_alignw) > max_width) {
241 nbins_x++;
242 }
243
244 /* then find a bin width/height that satisfies the memory
245 * constraints:
246 */
247 while (!layout_gmem(key, nbins_x, nbins_y, gmem)) {
248 if (nbins_y > nbins_x) {
249 nbins_x++;
250 } else {
251 nbins_y++;
252 }
253 }
254
255 /* Lets see if we can tweak the layout a bit and come up with
256 * something better:
257 */
258 if ((((nbins_x - 1) * (nbins_y + 1)) < (nbins_x * nbins_y)) &&
259 layout_gmem(key, nbins_x - 1, nbins_y + 1, gmem)) {
260 nbins_x--;
261 nbins_y++;
262 } else if ((((nbins_x + 1) * (nbins_y - 1)) < (nbins_x * nbins_y)) &&
263 layout_gmem(key, nbins_x + 1, nbins_y - 1, gmem)) {
264 nbins_x++;
265 nbins_y--;
266 }
267
268 layout_gmem(key, nbins_x, nbins_y, gmem);
269
270 }
271
272 static struct fd_gmem_stateobj *
273 gmem_stateobj_init(struct fd_screen *screen, struct gmem_key *key)
274 {
275 struct fd_gmem_stateobj *gmem =
276 rzalloc(screen->gmem_cache.ht, struct fd_gmem_stateobj);
277 pipe_reference_init(&gmem->reference, 1);
278 gmem->screen = screen;
279 gmem->key = key;
280 list_inithead(&gmem->node);
281
282 const unsigned npipes = screen->num_vsc_pipes;
283 uint32_t i, j, t, xoff, yoff;
284 uint32_t tpp_x, tpp_y;
285 int tile_n[npipes];
286
287 calc_nbins(key, gmem);
288
289 DBG("using %d bins of size %dx%d", gmem->nbins_x * gmem->nbins_y,
290 gmem->bin_w, gmem->bin_h);
291
292 memcpy(gmem->cbuf_cpp, key->cbuf_cpp, sizeof(key->cbuf_cpp));
293 memcpy(gmem->zsbuf_cpp, key->zsbuf_cpp, sizeof(key->zsbuf_cpp));
294 gmem->minx = key->minx;
295 gmem->miny = key->miny;
296 gmem->width = key->width;
297 gmem->height = key->height;
298
299 if (BIN_DEBUG) {
300 dump_gmem_state(gmem);
301 dump_gmem_key(key);
302 }
303
304 /*
305 * Assign tiles and pipes:
306 *
307 * At some point it might be worth playing with different
308 * strategies and seeing if that makes much impact on
309 * performance.
310 */
311
312 #define div_round_up(v, a) (((v) + (a) - 1) / (a))
313 /* figure out number of tiles per pipe: */
314 if (is_a20x(screen)) {
315 /* for a20x we want to minimize the number of "pipes"
316 * binning data has 3 bits for x/y (8x8) but the edges are used to
317 * cull off-screen vertices with hw binning, so we have 6x6 pipes
318 */
319 tpp_x = 6;
320 tpp_y = 6;
321 } else {
322 tpp_x = tpp_y = 1;
323 while (div_round_up(gmem->nbins_y, tpp_y) > npipes)
324 tpp_y += 2;
325 while ((div_round_up(gmem->nbins_y, tpp_y) *
326 div_round_up(gmem->nbins_x, tpp_x)) > npipes)
327 tpp_x += 1;
328 }
329
330 #ifdef DEBUG
331 tpp_x = env_var_as_unsigned("TPP_X", tpp_x);
332 tpp_y = env_var_as_unsigned("TPP_Y", tpp_x);
333 #endif
334
335 gmem->maxpw = tpp_x;
336 gmem->maxph = tpp_y;
337
338 /* configure pipes: */
339 xoff = yoff = 0;
340 for (i = 0; i < npipes; i++) {
341 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
342
343 if (xoff >= gmem->nbins_x) {
344 xoff = 0;
345 yoff += tpp_y;
346 }
347
348 if (yoff >= gmem->nbins_y) {
349 break;
350 }
351
352 pipe->x = xoff;
353 pipe->y = yoff;
354 pipe->w = MIN2(tpp_x, gmem->nbins_x - xoff);
355 pipe->h = MIN2(tpp_y, gmem->nbins_y - yoff);
356
357 xoff += tpp_x;
358 }
359
360 /* number of pipes to use for a20x */
361 gmem->num_vsc_pipes = MAX2(1, i);
362
363 for (; i < npipes; i++) {
364 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
365 pipe->x = pipe->y = pipe->w = pipe->h = 0;
366 }
367
368 if (BIN_DEBUG) {
369 printf("%dx%d ... tpp=%dx%d\n", gmem->nbins_x, gmem->nbins_y, tpp_x, tpp_y);
370 for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) {
371 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
372 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
373 pipe->w, pipe->h, pipe->x, pipe->y);
374 }
375 }
376
377 /* configure tiles: */
378 t = 0;
379 yoff = key->miny;
380 memset(tile_n, 0, sizeof(tile_n));
381 for (i = 0; i < gmem->nbins_y; i++) {
382 int bw, bh;
383
384 xoff = key->minx;
385
386 /* clip bin height: */
387 bh = MIN2(gmem->bin_h, key->miny + key->height - yoff);
388 assert(bh > 0);
389
390 for (j = 0; j < gmem->nbins_x; j++) {
391 struct fd_tile *tile = &gmem->tile[t];
392 uint32_t p;
393
394 assert(t < ARRAY_SIZE(gmem->tile));
395
396 /* pipe number: */
397 p = ((i / tpp_y) * div_round_up(gmem->nbins_x, tpp_x)) + (j / tpp_x);
398 assert(p < gmem->num_vsc_pipes);
399
400 /* clip bin width: */
401 bw = MIN2(gmem->bin_w, key->minx + key->width - xoff);
402 assert(bw > 0);
403
404 tile->n = !is_a20x(screen) ? tile_n[p]++ :
405 ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
406 tile->p = p;
407 tile->bin_w = bw;
408 tile->bin_h = bh;
409 tile->xoff = xoff;
410 tile->yoff = yoff;
411
412 if (BIN_DEBUG) {
413 printf("tile[%d]: p=%u, bin=%ux%u+%u+%u\n", t,
414 p, bw, bh, xoff, yoff);
415 }
416
417 t++;
418
419 xoff += bw;
420 }
421
422 yoff += bh;
423 }
424
425 if (BIN_DEBUG) {
426 t = 0;
427 for (i = 0; i < gmem->nbins_y; i++) {
428 for (j = 0; j < gmem->nbins_x; j++) {
429 struct fd_tile *tile = &gmem->tile[t++];
430 printf("|p:%u n:%u|", tile->p, tile->n);
431 }
432 printf("\n");
433 }
434 }
435
436 return gmem;
437 }
438
439 void
440 __fd_gmem_destroy(struct fd_gmem_stateobj *gmem)
441 {
442 struct fd_gmem_cache *cache = &gmem->screen->gmem_cache;
443
444 fd_screen_assert_locked(gmem->screen);
445
446 _mesa_hash_table_remove_key(cache->ht, gmem->key);
447 list_del(&gmem->node);
448
449 ralloc_free(gmem->key);
450 ralloc_free(gmem);
451 }
452
453 static struct gmem_key *
454 gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
455 {
456 struct fd_screen *screen = batch->ctx->screen;
457 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
458 bool has_zs = pfb->zsbuf && !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED |
459 FD_GMEM_STENCIL_ENABLED | FD_GMEM_CLEARS_DEPTH_STENCIL));
460 struct gmem_key *key = rzalloc(screen->gmem_cache.ht, struct gmem_key);
461
462 if (has_zs || assume_zs) {
463 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
464 key->zsbuf_cpp[0] = rsc->layout.cpp;
465 if (rsc->stencil)
466 key->zsbuf_cpp[1] = rsc->stencil->layout.cpp;
467 } else {
468 /* we might have a zsbuf, but it isn't used */
469 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
470 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
471 }
472
473 key->nr_cbufs = pfb->nr_cbufs;
474 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
475 if (pfb->cbufs[i])
476 key->cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
477 else
478 key->cbuf_cpp[i] = 4;
479 /* if MSAA, color buffers are super-sampled in GMEM: */
480 key->cbuf_cpp[i] *= pfb->samples;
481 }
482
483 /* NOTE: on a6xx, the max-scissor-rect is handled in fd6_gmem, and
484 * we just rely on CP_COND_EXEC to skip bins with no geometry.
485 */
486 if (no_scis_opt || is_a6xx(screen)) {
487 key->minx = 0;
488 key->miny = 0;
489 key->width = pfb->width;
490 key->height = pfb->height;
491 } else {
492 struct pipe_scissor_state *scissor = &batch->max_scissor;
493
494 if (fd_mesa_debug & FD_DBG_NOSCIS) {
495 scissor->minx = 0;
496 scissor->miny = 0;
497 scissor->maxx = pfb->width;
498 scissor->maxy = pfb->height;
499 }
500
501 /* round down to multiple of alignment: */
502 key->minx = scissor->minx & ~(screen->gmem_alignw - 1);
503 key->miny = scissor->miny & ~(screen->gmem_alignh - 1);
504 key->width = scissor->maxx - key->minx;
505 key->height = scissor->maxy - key->miny;
506 }
507
508 if (is_a20x(screen) && batch->cleared) {
509 /* under normal circumstances the requirement would be 4K
510 * but the fast clear path requires an alignment of 32K
511 */
512 key->gmem_page_align = 8;
513 } else if (is_a6xx(screen)) {
514 key->gmem_page_align = is_a650(screen) ? 3 : 1;
515 } else {
516 // TODO re-check this across gens.. maybe it should only
517 // be a single page in some cases:
518 key->gmem_page_align = 4;
519 }
520
521 return key;
522 }
523
524 static struct fd_gmem_stateobj *
525 lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
526 {
527 struct fd_screen *screen = batch->ctx->screen;
528 struct fd_gmem_cache *cache = &screen->gmem_cache;
529 struct fd_gmem_stateobj *gmem = NULL;
530 struct gmem_key *key = gmem_key_init(batch, assume_zs, no_scis_opt);
531 uint32_t hash = gmem_key_hash(key);
532
533 fd_screen_lock(screen);
534
535 struct hash_entry *entry =
536 _mesa_hash_table_search_pre_hashed(cache->ht, hash, key);
537 if (entry) {
538 ralloc_free(key);
539 goto found;
540 }
541
542 /* limit the # of cached gmem states, discarding the least
543 * recently used state if needed:
544 */
545 if (cache->ht->entries >= 20) {
546 struct fd_gmem_stateobj *last =
547 list_last_entry(&cache->lru, struct fd_gmem_stateobj, node);
548 fd_gmem_reference(&last, NULL);
549 }
550
551 entry = _mesa_hash_table_insert_pre_hashed(cache->ht,
552 hash, key, gmem_stateobj_init(screen, key));
553
554 found:
555 fd_gmem_reference(&gmem, entry->data);
556 /* Move to the head of the LRU: */
557 list_delinit(&gmem->node);
558 list_add(&gmem->node, &cache->lru);
559
560 fd_screen_unlock(screen);
561
562 return gmem;
563 }
564
565 /*
566 * GMEM render pass
567 */
568
569 static void
570 render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem)
571 {
572 struct fd_context *ctx = batch->ctx;
573 int i;
574
575 mtx_lock(&ctx->gmem_lock);
576
577 ctx->emit_tile_init(batch);
578
579 if (batch->restore)
580 ctx->stats.batch_restore++;
581
582 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
583 struct fd_tile *tile = &gmem->tile[i];
584
585 fd_log(batch, "bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
586 tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
587
588 ctx->emit_tile_prep(batch, tile);
589
590 if (batch->restore) {
591 ctx->emit_tile_mem2gmem(batch, tile);
592 }
593
594 ctx->emit_tile_renderprep(batch, tile);
595
596 if (ctx->query_prepare_tile)
597 ctx->query_prepare_tile(batch, i, batch->gmem);
598
599 /* emit IB to drawcmds: */
600 fd_log(batch, "TILE[%d]: START DRAW IB", i);
601 if (ctx->emit_tile) {
602 ctx->emit_tile(batch, tile);
603 } else {
604 ctx->screen->emit_ib(batch->gmem, batch->draw);
605 }
606
607 fd_log(batch, "TILE[%d]: END DRAW IB", i);
608 fd_reset_wfi(batch);
609
610 /* emit gmem2mem to transfer tile back to system memory: */
611 ctx->emit_tile_gmem2mem(batch, tile);
612 }
613
614 if (ctx->emit_tile_fini)
615 ctx->emit_tile_fini(batch);
616
617 mtx_unlock(&ctx->gmem_lock);
618 }
619
620 static void
621 render_sysmem(struct fd_batch *batch)
622 {
623 struct fd_context *ctx = batch->ctx;
624
625 ctx->emit_sysmem_prep(batch);
626
627 if (ctx->query_prepare_tile)
628 ctx->query_prepare_tile(batch, 0, batch->gmem);
629
630 /* emit IB to drawcmds: */
631 fd_log(batch, "SYSMEM: START DRAW IB");
632 ctx->screen->emit_ib(batch->gmem, batch->draw);
633 fd_log(batch, "SYSMEM: END DRAW IB");
634 fd_reset_wfi(batch);
635
636 if (ctx->emit_sysmem_fini)
637 ctx->emit_sysmem_fini(batch);
638 }
639
640 static void
641 flush_ring(struct fd_batch *batch)
642 {
643 uint32_t timestamp;
644 int out_fence_fd = -1;
645
646 if (unlikely(fd_mesa_debug & FD_DBG_NOHW))
647 return;
648
649 fd_submit_flush(batch->submit, batch->in_fence_fd,
650 batch->needs_out_fence_fd ? &out_fence_fd : NULL,
651 &timestamp);
652
653 fd_fence_populate(batch->fence, timestamp, out_fence_fd);
654 fd_log_flush(batch);
655 }
656
657 void
658 fd_gmem_render_tiles(struct fd_batch *batch)
659 {
660 struct fd_context *ctx = batch->ctx;
661 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
662 bool sysmem = false;
663
664 if (ctx->emit_sysmem_prep && !batch->nondraw) {
665 if (batch->cleared || batch->gmem_reason ||
666 ((batch->num_draws > 5) && !batch->blit) ||
667 (pfb->samples > 1)) {
668 fd_log(batch, "GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
669 batch->cleared, batch->gmem_reason, batch->num_draws,
670 pfb->samples);
671 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
672 sysmem = true;
673 }
674
675 /* For ARB_framebuffer_no_attachments: */
676 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
677 sysmem = true;
678 }
679 }
680
681 if (fd_mesa_debug & FD_DBG_NOGMEM)
682 sysmem = true;
683
684 /* Layered rendering always needs bypass. */
685 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
686 struct pipe_surface *psurf = pfb->cbufs[i];
687 if (!psurf)
688 continue;
689 if (psurf->u.tex.first_layer < psurf->u.tex.last_layer)
690 sysmem = true;
691 }
692
693 /* Tessellation doesn't seem to support tiled rendering so fall back to
694 * bypass.
695 */
696 if (batch->tessellation) {
697 debug_assert(ctx->emit_sysmem_prep);
698 sysmem = true;
699 }
700
701 fd_reset_wfi(batch);
702
703 ctx->stats.batch_total++;
704
705 if (unlikely(fd_mesa_debug & FD_DBG_LOG) && !batch->nondraw) {
706 fd_log_stream(batch, stream, util_dump_framebuffer_state(stream, pfb));
707 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
708 fd_log_stream(batch, stream, util_dump_surface(stream, pfb->cbufs[i]));
709 }
710 fd_log_stream(batch, stream, util_dump_surface(stream, pfb->zsbuf));
711 }
712
713 if (batch->nondraw) {
714 DBG("%p: rendering non-draw", batch);
715 render_sysmem(batch);
716 ctx->stats.batch_nondraw++;
717 } else if (sysmem) {
718 fd_log(batch, "%p: rendering sysmem %ux%u (%s/%s), num_draws=%u",
719 batch, pfb->width, pfb->height,
720 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
721 util_format_short_name(pipe_surface_format(pfb->zsbuf)),
722 batch->num_draws);
723 if (ctx->query_prepare)
724 ctx->query_prepare(batch, 1);
725 render_sysmem(batch);
726 ctx->stats.batch_sysmem++;
727 } else {
728 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, false, false);
729 batch->gmem_state = gmem;
730 fd_log(batch, "%p: rendering %dx%d tiles %ux%u (%s/%s)",
731 batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
732 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
733 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
734 if (ctx->query_prepare)
735 ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
736 render_tiles(batch, gmem);
737 batch->gmem_state = NULL;
738
739 fd_screen_lock(ctx->screen);
740 fd_gmem_reference(&gmem, NULL);
741 fd_screen_unlock(ctx->screen);
742
743 ctx->stats.batch_gmem++;
744 }
745
746 flush_ring(batch);
747 }
748
749 /* Determine a worst-case estimate (ie. assuming we don't eliminate an
750 * unused depth/stencil) number of bins per vsc pipe.
751 */
752 unsigned
753 fd_gmem_estimate_bins_per_pipe(struct fd_batch *batch)
754 {
755 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
756 struct fd_screen *screen = batch->ctx->screen;
757 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, !!pfb->zsbuf, true);
758 unsigned nbins = gmem->maxpw * gmem->maxph;
759
760 fd_screen_lock(screen);
761 fd_gmem_reference(&gmem, NULL);
762 fd_screen_unlock(screen);
763
764 return nbins;
765 }
766
767 /* When deciding whether a tile needs mem2gmem, we need to take into
768 * account the scissor rect(s) that were cleared. To simplify we only
769 * consider the last scissor rect for each buffer, since the common
770 * case would be a single clear.
771 */
772 bool
773 fd_gmem_needs_restore(struct fd_batch *batch, const struct fd_tile *tile,
774 uint32_t buffers)
775 {
776 if (!(batch->restore & buffers))
777 return false;
778
779 return true;
780 }
781
782 void
783 fd_gmem_screen_init(struct pipe_screen *pscreen)
784 {
785 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
786
787 cache->ht = _mesa_hash_table_create(NULL, gmem_key_hash, gmem_key_equals);
788 list_inithead(&cache->lru);
789 }
790
791 void
792 fd_gmem_screen_fini(struct pipe_screen *pscreen)
793 {
794 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
795
796 _mesa_hash_table_destroy(cache->ht, NULL);
797 }