2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/format/u_format.h"
28 #include "util/format/u_format_rgtc.h"
29 #include "util/format/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
35 #include "util/u_drm.h"
37 #include "decode/util.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_batch_cache.h"
41 #include "freedreno_blitter.h"
42 #include "freedreno_fence.h"
43 #include "freedreno_screen.h"
44 #include "freedreno_surface.h"
45 #include "freedreno_context.h"
46 #include "freedreno_query_hw.h"
47 #include "freedreno_util.h"
49 #include "drm-uapi/drm_fourcc.h"
52 /* XXX this should go away, needed for 'struct winsys_handle' */
53 #include "frontend/drm_driver.h"
55 /* A private modifier for now, so we have a way to request tiled but not
56 * compressed. It would perhaps be good to get real modifiers for the
57 * tiled formats, but would probably need to do some work to figure out
58 * the layout(s) of the tiled modes, and whether they are the same
61 #define FD_FORMAT_MOD_QCOM_TILED fourcc_mod_code(QCOM, 0xffffffff)
64 * Go through the entire state and see if the resource is bound
65 * anywhere. If it is, mark the relevant state as dirty. This is
66 * called on realloc_bo to ensure the necessary state is re-
67 * emitted so the GPU looks at the new backing bo.
70 rebind_resource_in_ctx(struct fd_context
*ctx
, struct fd_resource
*rsc
)
72 struct pipe_resource
*prsc
= &rsc
->base
;
74 if (ctx
->rebind_resource
)
75 ctx
->rebind_resource(ctx
, rsc
);
78 if (rsc
->dirty
& FD_DIRTY_VTXBUF
) {
79 struct fd_vertexbuf_stateobj
*vb
= &ctx
->vtx
.vertexbuf
;
80 for (unsigned i
= 0; i
< vb
->count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
81 if (vb
->vb
[i
].buffer
.resource
== prsc
)
82 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
86 const enum fd_dirty_3d_state per_stage_dirty
=
87 FD_DIRTY_CONST
| FD_DIRTY_TEX
| FD_DIRTY_IMAGE
| FD_DIRTY_SSBO
;
89 if (!(rsc
->dirty
& per_stage_dirty
))
92 /* per-shader-stage resources: */
93 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
94 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
95 * cmdstream rather than by pointer..
97 if ((rsc
->dirty
& FD_DIRTY_CONST
) &&
98 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_CONST
)) {
99 struct fd_constbuf_stateobj
*cb
= &ctx
->constbuf
[stage
];
100 const unsigned num_ubos
= util_last_bit(cb
->enabled_mask
);
101 for (unsigned i
= 1; i
< num_ubos
; i
++) {
102 if (cb
->cb
[i
].buffer
== prsc
) {
103 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
104 ctx
->dirty
|= FD_DIRTY_CONST
;
111 if ((rsc
->dirty
& FD_DIRTY_TEX
) &&
112 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_TEX
)) {
113 struct fd_texture_stateobj
*tex
= &ctx
->tex
[stage
];
114 for (unsigned i
= 0; i
< tex
->num_textures
; i
++) {
115 if (tex
->textures
[i
] && (tex
->textures
[i
]->texture
== prsc
)) {
116 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
117 ctx
->dirty
|= FD_DIRTY_TEX
;
124 if ((rsc
->dirty
& FD_DIRTY_IMAGE
) &&
125 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_IMAGE
)) {
126 struct fd_shaderimg_stateobj
*si
= &ctx
->shaderimg
[stage
];
127 const unsigned num_images
= util_last_bit(si
->enabled_mask
);
128 for (unsigned i
= 0; i
< num_images
; i
++) {
129 if (si
->si
[i
].resource
== prsc
) {
130 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_IMAGE
;
131 ctx
->dirty
|= FD_DIRTY_IMAGE
;
138 if ((rsc
->dirty
& FD_DIRTY_SSBO
) &&
139 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_SSBO
)) {
140 struct fd_shaderbuf_stateobj
*sb
= &ctx
->shaderbuf
[stage
];
141 const unsigned num_ssbos
= util_last_bit(sb
->enabled_mask
);
142 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
143 if (sb
->sb
[i
].buffer
== prsc
) {
144 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
145 ctx
->dirty
|= FD_DIRTY_SSBO
;
154 rebind_resource(struct fd_resource
*rsc
)
156 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
158 fd_screen_lock(screen
);
159 fd_resource_lock(rsc
);
162 list_for_each_entry (struct fd_context
, ctx
, &screen
->context_list
, node
)
163 rebind_resource_in_ctx(ctx
, rsc
);
165 fd_resource_unlock(rsc
);
166 fd_screen_unlock(screen
);
170 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
172 struct pipe_resource
*prsc
= &rsc
->base
;
173 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
174 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
175 DRM_FREEDRENO_GEM_TYPE_KMEM
|
176 COND(prsc
->bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
177 /* TODO other flags? */
179 /* if we start using things other than write-combine,
180 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
186 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
, "%ux%ux%u@%u:%x",
187 prsc
->width0
, prsc
->height0
, prsc
->depth0
, rsc
->layout
.cpp
, prsc
->bind
);
189 /* Zero out the UBWC area on allocation. This fixes intermittent failures
190 * with UBWC, which I suspect are due to the HW having a hard time
191 * interpreting arbitrary values populating the flags buffer when the BO
192 * was recycled through the bo cache (instead of fresh allocations from
193 * the kernel, which are zeroed). sleep(1) in this spot didn't work
194 * around the issue, but any memset value seems to.
196 if (rsc
->layout
.ubwc
) {
197 rsc
->needs_ubwc_clear
= true;
200 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
201 util_range_set_empty(&rsc
->valid_buffer_range
);
202 fd_bc_invalidate_resource(rsc
, true);
206 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
208 struct pipe_context
*pctx
= &ctx
->base
;
210 /* TODO size threshold too?? */
211 if (fallback
|| !fd_blit(pctx
, blit
)) {
212 /* do blit on cpu: */
213 util_resource_copy_region(pctx
,
214 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
215 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
216 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
221 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
);
224 * @rsc: the resource to shadow
225 * @level: the level to discard (if box != NULL, otherwise ignored)
226 * @box: the box to discard (or NULL if none)
227 * @modifier: the modifier for the new buffer state
230 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
231 unsigned level
, const struct pipe_box
*box
, uint64_t modifier
)
233 struct pipe_context
*pctx
= &ctx
->base
;
234 struct pipe_resource
*prsc
= &rsc
->base
;
235 bool fallback
= false;
240 /* If you have a sequence where there is a single rsc associated
241 * with the current render target, and then you end up shadowing
242 * that same rsc on the 3d pipe (u_blitter), because of how we
243 * swap the new shadow and rsc before the back-blit, you could end
244 * up confusing things into thinking that u_blitter's framebuffer
245 * state is the same as the current framebuffer state, which has
246 * the result of blitting to rsc rather than shadow.
248 * Normally we wouldn't want to unconditionally trigger a flush,
249 * since that defeats the purpose of shadowing, but this is a
250 * case where we'd have to flush anyways.
252 if (rsc
->write_batch
== ctx
->batch
)
253 flush_resource(ctx
, rsc
, 0);
255 /* TODO: somehow munge dimensions and format to copy unsupported
256 * render target format to something that is supported?
258 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
259 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
260 prsc
->nr_storage_samples
,
261 PIPE_BIND_RENDER_TARGET
))
264 /* do shadowing back-blits on the cpu for buffers: */
265 if (prsc
->target
== PIPE_BUFFER
)
268 bool discard_whole_level
= box
&& util_texrange_covers_whole_level(prsc
, level
,
269 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
271 /* TODO need to be more clever about current level */
272 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && box
&& !discard_whole_level
)
275 struct pipe_resource
*pshadow
=
276 pctx
->screen
->resource_create_with_modifiers(pctx
->screen
,
282 assert(!ctx
->in_shadow
);
283 ctx
->in_shadow
= true;
285 /* get rid of any references that batch-cache might have to us (which
286 * should empty/destroy rsc->batches hashset)
288 fd_bc_invalidate_resource(rsc
, false);
289 rebind_resource(rsc
);
291 fd_screen_lock(ctx
->screen
);
293 /* Swap the backing bo's, so shadow becomes the old buffer,
294 * blit from shadow to new buffer. From here on out, we
297 * Note that we need to do it in this order, otherwise if
298 * we go down cpu blit path, the recursive transfer_map()
299 * sees the wrong status..
301 struct fd_resource
*shadow
= fd_resource(pshadow
);
303 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
304 shadow
, shadow
->base
.reference
.count
);
306 /* TODO valid_buffer_range?? */
307 swap(rsc
->bo
, shadow
->bo
);
308 swap(rsc
->write_batch
, shadow
->write_batch
);
309 swap(rsc
->layout
, shadow
->layout
);
310 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
312 /* at this point, the newly created shadow buffer is not referenced
313 * by any batches, but the existing rsc (probably) is. We need to
314 * transfer those references over:
316 debug_assert(shadow
->batch_mask
== 0);
317 struct fd_batch
*batch
;
318 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
319 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
320 _mesa_set_remove(batch
->resources
, entry
);
321 _mesa_set_add(batch
->resources
, shadow
);
323 swap(rsc
->batch_mask
, shadow
->batch_mask
);
325 fd_screen_unlock(ctx
->screen
);
327 struct pipe_blit_info blit
= {};
328 blit
.dst
.resource
= prsc
;
329 blit
.dst
.format
= prsc
->format
;
330 blit
.src
.resource
= pshadow
;
331 blit
.src
.format
= pshadow
->format
;
332 blit
.mask
= util_format_get_mask(prsc
->format
);
333 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
335 #define set_box(field, val) do { \
336 blit.dst.field = (val); \
337 blit.src.field = (val); \
340 /* blit the other levels in their entirety: */
341 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
342 if (box
&& l
== level
)
345 /* just blit whole level: */
347 set_box(box
.width
, u_minify(prsc
->width0
, l
));
348 set_box(box
.height
, u_minify(prsc
->height0
, l
));
349 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
351 for (int i
= 0; i
< prsc
->array_size
; i
++) {
353 do_blit(ctx
, &blit
, fallback
);
357 /* deal w/ current level specially, since we might need to split
358 * it up into a couple blits:
360 if (box
&& !discard_whole_level
) {
361 set_box(level
, level
);
363 switch (prsc
->target
) {
365 case PIPE_TEXTURE_1D
:
368 set_box(box
.height
, 1);
369 set_box(box
.depth
, 1);
373 set_box(box
.width
, box
->x
);
375 do_blit(ctx
, &blit
, fallback
);
377 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
378 set_box(box
.x
, box
->x
+ box
->width
);
379 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
381 do_blit(ctx
, &blit
, fallback
);
384 case PIPE_TEXTURE_2D
:
391 ctx
->in_shadow
= false;
393 pipe_resource_reference(&pshadow
, NULL
);
399 * Uncompress an UBWC compressed buffer "in place". This works basically
400 * like resource shadowing, creating a new resource, and doing an uncompress
401 * blit, and swapping the state between shadow and original resource so it
402 * appears to the gallium frontends as if nothing changed.
405 fd_resource_uncompress(struct fd_context
*ctx
, struct fd_resource
*rsc
)
408 fd_try_shadow_resource(ctx
, rsc
, 0, NULL
, FD_FORMAT_MOD_QCOM_TILED
);
410 /* shadow should not fail in any cases where we need to uncompress: */
411 debug_assert(success
);
415 * Debug helper to hexdump a resource.
418 fd_resource_dump(struct fd_resource
*rsc
, const char *name
)
420 fd_bo_cpu_prep(rsc
->bo
, NULL
, DRM_FREEDRENO_PREP_READ
);
421 printf("%s: \n", name
);
422 dump_hex(fd_bo_map(rsc
->bo
), fd_bo_size(rsc
->bo
));
425 static struct fd_resource
*
426 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
427 unsigned level
, const struct pipe_box
*box
)
429 struct pipe_context
*pctx
= &ctx
->base
;
430 struct pipe_resource tmpl
= rsc
->base
;
432 tmpl
.width0
= box
->width
;
433 tmpl
.height0
= box
->height
;
434 /* for array textures, box->depth is the array_size, otherwise
435 * for 3d textures, it is the depth:
437 if (tmpl
.array_size
> 1) {
438 if (tmpl
.target
== PIPE_TEXTURE_CUBE
)
439 tmpl
.target
= PIPE_TEXTURE_2D_ARRAY
;
440 tmpl
.array_size
= box
->depth
;
444 tmpl
.depth0
= box
->depth
;
447 tmpl
.bind
|= PIPE_BIND_LINEAR
;
449 struct pipe_resource
*pstaging
=
450 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
454 return fd_resource(pstaging
);
458 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
460 struct pipe_resource
*dst
= trans
->base
.resource
;
461 struct pipe_blit_info blit
= {};
463 blit
.dst
.resource
= dst
;
464 blit
.dst
.format
= dst
->format
;
465 blit
.dst
.level
= trans
->base
.level
;
466 blit
.dst
.box
= trans
->base
.box
;
467 blit
.src
.resource
= trans
->staging_prsc
;
468 blit
.src
.format
= trans
->staging_prsc
->format
;
470 blit
.src
.box
= trans
->staging_box
;
471 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
472 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
474 do_blit(ctx
, &blit
, false);
478 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
480 struct pipe_resource
*src
= trans
->base
.resource
;
481 struct pipe_blit_info blit
= {};
483 blit
.src
.resource
= src
;
484 blit
.src
.format
= src
->format
;
485 blit
.src
.level
= trans
->base
.level
;
486 blit
.src
.box
= trans
->base
.box
;
487 blit
.dst
.resource
= trans
->staging_prsc
;
488 blit
.dst
.format
= trans
->staging_prsc
->format
;
490 blit
.dst
.box
= trans
->staging_box
;
491 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
492 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
494 do_blit(ctx
, &blit
, false);
497 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
498 struct pipe_transfer
*ptrans
,
499 const struct pipe_box
*box
)
501 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
503 if (ptrans
->resource
->target
== PIPE_BUFFER
)
504 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
505 ptrans
->box
.x
+ box
->x
,
506 ptrans
->box
.x
+ box
->x
+ box
->width
);
510 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
512 struct fd_batch
*write_batch
= NULL
;
514 fd_screen_lock(ctx
->screen
);
515 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
516 fd_screen_unlock(ctx
->screen
);
518 if (usage
& PIPE_TRANSFER_WRITE
) {
519 struct fd_batch
*batch
, *batches
[32] = {};
522 /* This is a bit awkward, probably a fd_batch_flush_locked()
523 * would make things simpler.. but we need to hold the lock
524 * to iterate the batches which reference this resource. So
525 * we must first grab references under a lock, then flush.
527 fd_screen_lock(ctx
->screen
);
528 batch_mask
= rsc
->batch_mask
;
529 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
530 fd_batch_reference_locked(&batches
[batch
->idx
], batch
);
531 fd_screen_unlock(ctx
->screen
);
533 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
534 fd_batch_flush(batch
);
536 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
537 fd_batch_reference(&batches
[batch
->idx
], NULL
);
539 assert(rsc
->batch_mask
== 0);
540 } else if (write_batch
) {
541 fd_batch_flush(write_batch
);
544 fd_batch_reference(&write_batch
, NULL
);
546 assert(!rsc
->write_batch
);
550 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
552 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
556 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
557 struct pipe_transfer
*ptrans
)
559 struct fd_context
*ctx
= fd_context(pctx
);
560 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
561 struct fd_transfer
*trans
= fd_transfer(ptrans
);
563 if (trans
->staging_prsc
) {
564 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
565 fd_blit_from_staging(ctx
, trans
);
566 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
569 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
570 fd_bo_cpu_fini(rsc
->bo
);
573 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
575 ptrans
->box
.x
+ ptrans
->box
.width
);
577 pipe_resource_reference(&ptrans
->resource
, NULL
);
578 slab_free(&ctx
->transfer_pool
, ptrans
);
582 fd_resource_transfer_map(struct pipe_context
*pctx
,
583 struct pipe_resource
*prsc
,
584 unsigned level
, unsigned usage
,
585 const struct pipe_box
*box
,
586 struct pipe_transfer
**pptrans
)
588 struct fd_context
*ctx
= fd_context(pctx
);
589 struct fd_resource
*rsc
= fd_resource(prsc
);
590 struct fd_transfer
*trans
;
591 struct pipe_transfer
*ptrans
;
592 enum pipe_format format
= prsc
->format
;
598 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
599 box
->width
, box
->height
, box
->x
, box
->y
);
601 if ((usage
& PIPE_TRANSFER_MAP_DIRECTLY
) && rsc
->layout
.tile_mode
) {
602 DBG("CANNOT MAP DIRECTLY!\n");
606 ptrans
= slab_alloc(&ctx
->transfer_pool
);
610 /* slab_alloc_st() doesn't zero: */
611 trans
= fd_transfer(ptrans
);
612 memset(trans
, 0, sizeof(*trans
));
614 pipe_resource_reference(&ptrans
->resource
, prsc
);
615 ptrans
->level
= level
;
616 ptrans
->usage
= usage
;
618 ptrans
->stride
= fd_resource_pitch(rsc
, level
);
619 ptrans
->layer_stride
= fd_resource_layer_stride(rsc
, level
);
621 /* we always need a staging texture for tiled buffers:
623 * TODO we might sometimes want to *also* shadow the resource to avoid
624 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
627 if (rsc
->layout
.tile_mode
) {
628 struct fd_resource
*staging_rsc
;
630 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
632 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
633 trans
->staging_prsc
= &staging_rsc
->base
;
634 trans
->base
.stride
= fd_resource_pitch(staging_rsc
, 0);
635 trans
->base
.layer_stride
= fd_resource_layer_stride(staging_rsc
, 0);
636 trans
->staging_box
= *box
;
637 trans
->staging_box
.x
= 0;
638 trans
->staging_box
.y
= 0;
639 trans
->staging_box
.z
= 0;
641 if (usage
& PIPE_TRANSFER_READ
) {
642 fd_blit_to_staging(ctx
, trans
);
644 fd_bo_cpu_prep(staging_rsc
->bo
, ctx
->pipe
,
645 DRM_FREEDRENO_PREP_READ
);
648 buf
= fd_bo_map(staging_rsc
->bo
);
653 ctx
->stats
.staging_uploads
++;
659 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
660 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
662 if (usage
& PIPE_TRANSFER_READ
)
663 op
|= DRM_FREEDRENO_PREP_READ
;
665 if (usage
& PIPE_TRANSFER_WRITE
)
666 op
|= DRM_FREEDRENO_PREP_WRITE
;
668 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
670 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
671 if (needs_flush
|| fd_resource_busy(rsc
, op
)) {
672 rebind_resource(rsc
);
673 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
675 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
676 prsc
->target
== PIPE_BUFFER
&&
677 !util_ranges_intersect(&rsc
->valid_buffer_range
,
678 box
->x
, box
->x
+ box
->width
)) {
679 /* We are trying to write to a previously uninitialized range. No need
682 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
683 struct fd_batch
*write_batch
= NULL
;
685 /* hold a reference, so it doesn't disappear under us: */
686 fd_context_lock(ctx
);
687 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
688 fd_context_unlock(ctx
);
690 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
691 write_batch
->back_blit
) {
692 /* if only thing pending is a back-blit, we can discard it: */
693 fd_batch_reset(write_batch
);
696 /* If the GPU is writing to the resource, or if it is reading from the
697 * resource and we're trying to write to it, flush the renders.
699 bool busy
= needs_flush
|| fd_resource_busy(rsc
, op
);
701 /* if we need to flush/stall, see if we can make a shadow buffer
704 * TODO we could go down this path !reorder && !busy_for_read
705 * ie. we only *don't* want to go down this path if the blit
706 * will trigger a flush!
708 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
709 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
710 /* try shadowing only if it avoids a flush, otherwise staging would
713 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
,
714 box
, DRM_FORMAT_MOD_LINEAR
)) {
715 needs_flush
= busy
= false;
716 ctx
->stats
.shadow_uploads
++;
718 struct fd_resource
*staging_rsc
;
721 flush_resource(ctx
, rsc
, usage
);
725 /* in this case, we don't need to shadow the whole resource,
726 * since any draw that references the previous contents has
727 * already had rendering flushed for all tiles. So we can
728 * use a staging buffer to do the upload.
730 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
732 trans
->staging_prsc
= &staging_rsc
->base
;
733 trans
->base
.stride
= fd_resource_pitch(staging_rsc
, 0);
734 trans
->base
.layer_stride
=
735 fd_resource_layer_stride(staging_rsc
, 0);
736 trans
->staging_box
= *box
;
737 trans
->staging_box
.x
= 0;
738 trans
->staging_box
.y
= 0;
739 trans
->staging_box
.z
= 0;
740 buf
= fd_bo_map(staging_rsc
->bo
);
745 fd_batch_reference(&write_batch
, NULL
);
747 ctx
->stats
.staging_uploads
++;
755 flush_resource(ctx
, rsc
, usage
);
759 fd_batch_reference(&write_batch
, NULL
);
761 /* The GPU keeps track of how the various bo's are being used, and
762 * will wait if necessary for the proper operation to have
766 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
772 buf
= fd_bo_map(rsc
->bo
);
774 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
775 box
->x
/ util_format_get_blockwidth(format
) * rsc
->layout
.cpp
+
776 fd_resource_offset(rsc
, level
, box
->z
);
778 if (usage
& PIPE_TRANSFER_WRITE
)
786 fd_resource_transfer_unmap(pctx
, ptrans
);
791 fd_resource_destroy(struct pipe_screen
*pscreen
,
792 struct pipe_resource
*prsc
)
794 struct fd_resource
*rsc
= fd_resource(prsc
);
795 fd_bc_invalidate_resource(rsc
, true);
799 renderonly_scanout_destroy(rsc
->scanout
, fd_screen(pscreen
)->ro
);
801 util_range_destroy(&rsc
->valid_buffer_range
);
802 simple_mtx_destroy(&rsc
->lock
);
807 fd_resource_modifier(struct fd_resource
*rsc
)
809 if (!rsc
->layout
.tile_mode
)
810 return DRM_FORMAT_MOD_LINEAR
;
812 if (rsc
->layout
.ubwc_layer_size
)
813 return DRM_FORMAT_MOD_QCOM_COMPRESSED
;
815 /* TODO invent a modifier for tiled but not UBWC buffers: */
816 return DRM_FORMAT_MOD_INVALID
;
820 fd_resource_get_handle(struct pipe_screen
*pscreen
,
821 struct pipe_context
*pctx
,
822 struct pipe_resource
*prsc
,
823 struct winsys_handle
*handle
,
826 struct fd_resource
*rsc
= fd_resource(prsc
);
828 handle
->modifier
= fd_resource_modifier(rsc
);
830 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->scanout
,
831 fd_resource_pitch(rsc
, 0), handle
);
834 /* special case to resize query buf after allocated.. */
836 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
838 struct fd_resource
*rsc
= fd_resource(prsc
);
840 debug_assert(prsc
->width0
== 0);
841 debug_assert(prsc
->target
== PIPE_BUFFER
);
842 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
845 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
849 fd_resource_layout_init(struct pipe_resource
*prsc
)
851 struct fd_resource
*rsc
= fd_resource(prsc
);
852 struct fdl_layout
*layout
= &rsc
->layout
;
854 layout
->format
= prsc
->format
;
856 layout
->width0
= prsc
->width0
;
857 layout
->height0
= prsc
->height0
;
858 layout
->depth0
= prsc
->depth0
;
860 layout
->cpp
= util_format_get_blocksize(prsc
->format
);
861 layout
->cpp
*= fd_resource_nr_samples(prsc
);
862 layout
->cpp_shift
= ffs(layout
->cpp
) - 1;
866 * Helper that allocates a resource and resolves its layout (but doesn't
869 * It returns a pipe_resource (as fd_resource_create_with_modifiers()
870 * would do), and also bo's minimum required size as an output argument.
872 static struct pipe_resource
*
873 fd_resource_allocate_and_resolve(struct pipe_screen
*pscreen
,
874 const struct pipe_resource
*tmpl
,
875 const uint64_t *modifiers
, int count
, uint32_t *psize
)
877 struct fd_screen
*screen
= fd_screen(pscreen
);
878 struct fd_resource
*rsc
;
879 struct pipe_resource
*prsc
;
880 enum pipe_format format
= tmpl
->format
;
883 rsc
= CALLOC_STRUCT(fd_resource
);
886 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
887 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
888 tmpl
->target
, util_format_name(format
),
889 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
890 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
891 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
897 fd_resource_layout_init(prsc
);
900 (PIPE_BIND_SCANOUT | \
902 PIPE_BIND_DISPLAY_TARGET)
904 bool linear
= drm_find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
905 if (tmpl
->bind
& LINEAR
)
908 if (fd_mesa_debug
& FD_DBG_NOTILE
)
911 /* Normally, for non-shared buffers, allow buffer compression if
912 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
915 * TODO we should probably also limit tiled in a similar way,
916 * except we don't have a format modifier for tiled. (We probably
919 bool allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_INVALID
, modifiers
, count
);
920 if (tmpl
->bind
& PIPE_BIND_SHARED
)
921 allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED
, modifiers
, count
);
923 allow_ubwc
&= !(fd_mesa_debug
& FD_DBG_NOUBWC
);
925 pipe_reference_init(&prsc
->reference
, 1);
927 prsc
->screen
= pscreen
;
929 if (screen
->tile_mode
&&
930 (tmpl
->target
!= PIPE_BUFFER
) &&
932 rsc
->layout
.tile_mode
= screen
->tile_mode(prsc
);
935 util_range_init(&rsc
->valid_buffer_range
);
937 simple_mtx_init(&rsc
->lock
, mtx_plain
);
939 rsc
->internal_format
= format
;
941 rsc
->layout
.ubwc
= rsc
->layout
.tile_mode
&& is_a6xx(screen
) && allow_ubwc
;
943 if (prsc
->target
== PIPE_BUFFER
) {
944 assert(prsc
->format
== PIPE_FORMAT_R8_UNORM
);
946 fdl_layout_buffer(&rsc
->layout
, size
);
948 size
= screen
->setup_slices(rsc
);
951 /* special case for hw-query buffer, which we need to allocate before we
955 /* note, semi-intention == instead of & */
956 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
960 /* Set the layer size if the (non-a6xx) backend hasn't done so. */
961 if (rsc
->layout
.layer_first
&& !rsc
->layout
.layer_size
) {
962 rsc
->layout
.layer_size
= align(size
, 4096);
963 size
= rsc
->layout
.layer_size
* prsc
->array_size
;
966 if (fd_mesa_debug
& FD_DBG_LAYOUT
)
967 fdl_dump_layout(&rsc
->layout
);
969 /* Hand out the resolved size. */
977 * Create a new texture object, using the given template info.
979 static struct pipe_resource
*
980 fd_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
981 const struct pipe_resource
*tmpl
,
982 const uint64_t *modifiers
, int count
)
984 struct fd_screen
*screen
= fd_screen(pscreen
);
985 struct fd_resource
*rsc
;
986 struct pipe_resource
*prsc
;
989 /* when using kmsro, scanout buffers are allocated on the display device
990 * create_with_modifiers() doesn't give us usage flags, so we have to
991 * assume that all calls with modifiers are scanout-possible
994 ((tmpl
->bind
& PIPE_BIND_SCANOUT
) ||
995 !(count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
))) {
996 struct pipe_resource scanout_templat
= *tmpl
;
997 struct renderonly_scanout
*scanout
;
998 struct winsys_handle handle
;
1000 /* note: alignment is wrong for a6xx */
1001 scanout_templat
.width0
= align(tmpl
->width0
, screen
->gmem_alignw
);
1003 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
1004 screen
->ro
, &handle
);
1008 renderonly_scanout_destroy(scanout
, screen
->ro
);
1010 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
1011 rsc
= fd_resource(pscreen
->resource_from_handle(pscreen
, tmpl
,
1013 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
1014 close(handle
.handle
);
1021 prsc
= fd_resource_allocate_and_resolve(pscreen
, tmpl
, modifiers
, count
, &size
);
1024 rsc
= fd_resource(prsc
);
1026 realloc_bo(rsc
, size
);
1032 fd_resource_destroy(pscreen
, prsc
);
1036 static struct pipe_resource
*
1037 fd_resource_create(struct pipe_screen
*pscreen
,
1038 const struct pipe_resource
*tmpl
)
1040 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
1041 return fd_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
1045 * Create a texture from a winsys_handle. The handle is often created in
1046 * another process by first creating a pipe texture and then calling
1047 * resource_get_handle.
1049 static struct pipe_resource
*
1050 fd_resource_from_handle(struct pipe_screen
*pscreen
,
1051 const struct pipe_resource
*tmpl
,
1052 struct winsys_handle
*handle
, unsigned usage
)
1054 struct fd_screen
*screen
= fd_screen(pscreen
);
1055 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
1056 struct fdl_slice
*slice
= fd_resource_slice(rsc
, 0);
1057 struct pipe_resource
*prsc
= &rsc
->base
;
1059 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1060 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1061 tmpl
->target
, util_format_name(tmpl
->format
),
1062 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
1063 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
1064 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
1070 fd_resource_layout_init(prsc
);
1072 pipe_reference_init(&prsc
->reference
, 1);
1074 prsc
->screen
= pscreen
;
1076 util_range_init(&rsc
->valid_buffer_range
);
1078 simple_mtx_init(&rsc
->lock
, mtx_plain
);
1080 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
1084 rsc
->internal_format
= tmpl
->format
;
1085 rsc
->layout
.pitch0
= handle
->stride
;
1086 slice
->offset
= handle
->offset
;
1087 slice
->size0
= handle
->stride
* prsc
->height0
;
1089 /* use a pitchalign of gmem_alignw pixels, because GMEM resolve for
1090 * lower alignments is not implemented (but possible for a6xx at least)
1092 * for UBWC-enabled resources, layout_resource_for_modifier will further
1093 * validate the pitch and set the right pitchalign
1095 rsc
->layout
.pitchalign
=
1096 fdl_cpp_shift(&rsc
->layout
) + util_logbase2(screen
->gmem_alignw
);
1098 /* apply the minimum pitchalign (note: actually 4 for a3xx but doesn't matter) */
1099 if (is_a6xx(screen
) || is_a5xx(screen
))
1100 rsc
->layout
.pitchalign
= MAX2(rsc
->layout
.pitchalign
, 6);
1102 rsc
->layout
.pitchalign
= MAX2(rsc
->layout
.pitchalign
, 5);
1104 if (rsc
->layout
.pitch0
< (prsc
->width0
* rsc
->layout
.cpp
) ||
1105 fd_resource_pitch(rsc
, 0) != rsc
->layout
.pitch0
)
1108 assert(rsc
->layout
.cpp
);
1110 if (screen
->layout_resource_for_modifier(rsc
, handle
->modifier
) < 0)
1115 renderonly_create_gpu_import_for_resource(prsc
, screen
->ro
, NULL
);
1116 /* failure is expected in some cases.. */
1124 fd_resource_destroy(pscreen
, prsc
);
1129 fd_render_condition_check(struct pipe_context
*pctx
)
1131 struct fd_context
*ctx
= fd_context(pctx
);
1133 if (!ctx
->cond_query
)
1136 union pipe_query_result res
= { 0 };
1138 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1139 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1141 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1142 return (bool)res
.u64
!= ctx
->cond_cond
;
1148 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1150 struct fd_context
*ctx
= fd_context(pctx
);
1151 struct fd_resource
*rsc
= fd_resource(prsc
);
1154 * TODO I guess we could track that the resource is invalidated and
1155 * use that as a hint to realloc rather than stall in _transfer_map(),
1156 * even in the non-DISCARD_WHOLE_RESOURCE case?
1158 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1161 if (rsc
->write_batch
) {
1162 struct fd_batch
*batch
= rsc
->write_batch
;
1163 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1165 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
) {
1166 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1167 ctx
->dirty
|= FD_DIRTY_ZSA
;
1170 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1171 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1172 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1173 ctx
->dirty
|= FD_DIRTY_FRAMEBUFFER
;
1181 static enum pipe_format
1182 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1184 return fd_resource(prsc
)->internal_format
;
1188 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1189 struct pipe_resource
*stencil
)
1191 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1194 static struct pipe_resource
*
1195 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1197 struct fd_resource
*rsc
= fd_resource(prsc
);
1199 return &rsc
->stencil
->base
;
1203 static const struct u_transfer_vtbl transfer_vtbl
= {
1204 .resource_create
= fd_resource_create
,
1205 .resource_destroy
= fd_resource_destroy
,
1206 .transfer_map
= fd_resource_transfer_map
,
1207 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1208 .transfer_unmap
= fd_resource_transfer_unmap
,
1209 .get_internal_format
= fd_resource_get_internal_format
,
1210 .set_stencil
= fd_resource_set_stencil
,
1211 .get_stencil
= fd_resource_get_stencil
,
1214 static const uint64_t supported_modifiers
[] = {
1215 DRM_FORMAT_MOD_LINEAR
,
1219 fd_layout_resource_for_modifier(struct fd_resource
*rsc
, uint64_t modifier
)
1222 case DRM_FORMAT_MOD_LINEAR
:
1223 /* The dri gallium frontend will pass DRM_FORMAT_MOD_INVALID to us
1224 * when it's called through any of the non-modifier BO create entry
1225 * points. Other drivers will determine tiling from the kernel or
1226 * other legacy backchannels, but for freedreno it just means
1228 case DRM_FORMAT_MOD_INVALID
:
1235 static struct pipe_resource
*
1236 fd_resource_from_memobj(struct pipe_screen
*pscreen
,
1237 const struct pipe_resource
*tmpl
,
1238 struct pipe_memory_object
*pmemobj
,
1241 struct fd_screen
*screen
= fd_screen(pscreen
);
1242 struct fd_memory_object
*memobj
= fd_memory_object(pmemobj
);
1243 struct pipe_resource
*prsc
;
1244 struct fd_resource
*rsc
;
1248 /* We shouldn't get a scanout buffer here. */
1249 assert(!(tmpl
->bind
& PIPE_BIND_SCANOUT
));
1251 uint64_t modifiers
= DRM_FORMAT_MOD_INVALID
;
1252 if (tmpl
->bind
& PIPE_BIND_LINEAR
) {
1253 modifiers
= DRM_FORMAT_MOD_LINEAR
;
1254 } else if (is_a6xx(screen
) && tmpl
->width0
>= FDL_MIN_UBWC_WIDTH
) {
1255 modifiers
= DRM_FORMAT_MOD_QCOM_COMPRESSED
;
1258 /* Allocate new pipe resource. */
1259 prsc
= fd_resource_allocate_and_resolve(pscreen
, tmpl
, &modifiers
, 1, &size
);
1262 rsc
= fd_resource(prsc
);
1264 /* bo's size has to be large enough, otherwise cleanup resource and fail
1267 if (fd_bo_size(memobj
->bo
) < size
) {
1268 fd_resource_destroy(pscreen
, prsc
);
1272 /* Share the bo with the memory object. */
1273 rsc
->bo
= fd_bo_ref(memobj
->bo
);
1278 static struct pipe_memory_object
*
1279 fd_memobj_create_from_handle(struct pipe_screen
*pscreen
,
1280 struct winsys_handle
*whandle
,
1283 struct fd_memory_object
*memobj
= CALLOC_STRUCT(fd_memory_object
);
1287 struct fd_bo
*bo
= fd_screen_bo_from_handle(pscreen
, whandle
);
1293 memobj
->b
.dedicated
= dedicated
;
1300 fd_memobj_destroy(struct pipe_screen
*pscreen
,
1301 struct pipe_memory_object
*pmemobj
)
1303 struct fd_memory_object
*memobj
= fd_memory_object(pmemobj
);
1306 fd_bo_del(memobj
->bo
);
1312 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1314 struct fd_screen
*screen
= fd_screen(pscreen
);
1315 bool fake_rgtc
= screen
->gpu_id
< 400;
1317 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1318 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1321 pscreen
->resource_create_with_modifiers
= fd_resource_create_with_modifiers
;
1322 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1323 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1324 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1326 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1327 true, false, fake_rgtc
, true);
1329 if (!screen
->layout_resource_for_modifier
)
1330 screen
->layout_resource_for_modifier
= fd_layout_resource_for_modifier
;
1331 if (!screen
->supported_modifiers
) {
1332 screen
->supported_modifiers
= supported_modifiers
;
1333 screen
->num_supported_modifiers
= ARRAY_SIZE(supported_modifiers
);
1336 /* GL_EXT_memory_object */
1337 pscreen
->memobj_create_from_handle
= fd_memobj_create_from_handle
;
1338 pscreen
->memobj_destroy
= fd_memobj_destroy
;
1339 pscreen
->resource_from_memobj
= fd_resource_from_memobj
;
1343 fd_get_sample_position(struct pipe_context
*context
,
1344 unsigned sample_count
, unsigned sample_index
,
1347 /* The following is copied from nouveau/nv50 except for position
1348 * values, which are taken from blob driver */
1349 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1350 static const uint8_t pos2
[2][2] = {
1351 { 0xc, 0xc }, { 0x4, 0x4 } };
1352 static const uint8_t pos4
[4][2] = {
1353 { 0x6, 0x2 }, { 0xe, 0x6 },
1354 { 0x2, 0xa }, { 0xa, 0xe } };
1355 /* TODO needs to be verified on supported hw */
1356 static const uint8_t pos8
[8][2] = {
1357 { 0x9, 0x5 }, { 0x7, 0xb },
1358 { 0xd, 0x9 }, { 0x5, 0x3 },
1359 { 0x3, 0xd }, { 0x1, 0x7 },
1360 { 0xb, 0xf }, { 0xf, 0x1 } };
1362 const uint8_t (*ptr
)[2];
1364 switch (sample_count
) {
1382 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1383 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1387 fd_blit_pipe(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1389 /* wrap fd_blit to return void */
1390 fd_blit(pctx
, blit_info
);
1394 fd_resource_context_init(struct pipe_context
*pctx
)
1396 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1397 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1398 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1399 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1400 pctx
->texture_subdata
= u_default_texture_subdata
;
1401 pctx
->create_surface
= fd_create_surface
;
1402 pctx
->surface_destroy
= fd_surface_destroy
;
1403 pctx
->resource_copy_region
= fd_resource_copy_region
;
1404 pctx
->blit
= fd_blit_pipe
;
1405 pctx
->flush_resource
= fd_flush_resource
;
1406 pctx
->invalidate_resource
= fd_invalidate_resource
;
1407 pctx
->get_sample_position
= fd_get_sample_position
;