2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/format/u_format.h"
28 #include "util/format/u_format_rgtc.h"
29 #include "util/format/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
35 #include "util/u_drm.h"
37 #include "freedreno_resource.h"
38 #include "freedreno_batch_cache.h"
39 #include "freedreno_blitter.h"
40 #include "freedreno_fence.h"
41 #include "freedreno_screen.h"
42 #include "freedreno_surface.h"
43 #include "freedreno_context.h"
44 #include "freedreno_query_hw.h"
45 #include "freedreno_util.h"
47 #include "drm-uapi/drm_fourcc.h"
50 /* XXX this should go away, needed for 'struct winsys_handle' */
51 #include "state_tracker/drm_driver.h"
53 /* A private modifier for now, so we have a way to request tiled but not
54 * compressed. It would perhaps be good to get real modifiers for the
55 * tiled formats, but would probably need to do some work to figure out
56 * the layout(s) of the tiled modes, and whether they are the same
59 #define FD_FORMAT_MOD_QCOM_TILED fourcc_mod_code(QCOM, 0xffffffff)
62 * Go through the entire state and see if the resource is bound
63 * anywhere. If it is, mark the relevant state as dirty. This is
64 * called on realloc_bo to ensure the neccessary state is re-
65 * emitted so the GPU looks at the new backing bo.
68 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
71 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
72 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
73 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
76 /* per-shader-stage resources: */
77 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
78 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
79 * cmdstream rather than by pointer..
81 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
82 for (unsigned i
= 1; i
< num_ubos
; i
++) {
83 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
85 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
86 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
90 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
91 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
93 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
94 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
98 const unsigned num_images
= util_last_bit(ctx
->shaderimg
[stage
].enabled_mask
);
99 for (unsigned i
= 0; i
< num_images
; i
++) {
100 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_IMAGE
)
102 if (ctx
->shaderimg
[stage
].si
[i
].resource
== prsc
)
103 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_IMAGE
;
107 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
108 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
109 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
111 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
112 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
118 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
120 struct pipe_resource
*prsc
= &rsc
->base
;
121 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
122 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
123 DRM_FREEDRENO_GEM_TYPE_KMEM
|
124 COND(prsc
->bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
125 /* TODO other flags? */
127 /* if we start using things other than write-combine,
128 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
134 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
, "%ux%ux%u@%u:%x",
135 prsc
->width0
, prsc
->height0
, prsc
->depth0
, rsc
->layout
.cpp
, prsc
->bind
);
136 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
137 util_range_set_empty(&rsc
->valid_buffer_range
);
138 fd_bc_invalidate_resource(rsc
, true);
142 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
144 struct pipe_context
*pctx
= &ctx
->base
;
146 /* TODO size threshold too?? */
147 if (fallback
|| !fd_blit(pctx
, blit
)) {
148 /* do blit on cpu: */
149 util_resource_copy_region(pctx
,
150 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
151 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
152 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
157 * @rsc: the resource to shadow
158 * @level: the level to discard (if box != NULL, otherwise ignored)
159 * @box: the box to discard (or NULL if none)
160 * @modifier: the modifier for the new buffer state
163 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
164 unsigned level
, const struct pipe_box
*box
, uint64_t modifier
)
166 struct pipe_context
*pctx
= &ctx
->base
;
167 struct pipe_resource
*prsc
= &rsc
->base
;
168 bool fallback
= false;
173 /* TODO: somehow munge dimensions and format to copy unsupported
174 * render target format to something that is supported?
176 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
177 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
178 prsc
->nr_storage_samples
,
179 PIPE_BIND_RENDER_TARGET
))
182 /* do shadowing back-blits on the cpu for buffers: */
183 if (prsc
->target
== PIPE_BUFFER
)
186 bool discard_whole_level
= box
&& util_texrange_covers_whole_level(prsc
, level
,
187 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
189 /* TODO need to be more clever about current level */
190 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && box
&& !discard_whole_level
)
193 struct pipe_resource
*pshadow
=
194 pctx
->screen
->resource_create_with_modifiers(pctx
->screen
,
200 assert(!ctx
->in_shadow
);
201 ctx
->in_shadow
= true;
203 /* get rid of any references that batch-cache might have to us (which
204 * should empty/destroy rsc->batches hashset)
206 fd_bc_invalidate_resource(rsc
, false);
208 mtx_lock(&ctx
->screen
->lock
);
210 /* Swap the backing bo's, so shadow becomes the old buffer,
211 * blit from shadow to new buffer. From here on out, we
214 * Note that we need to do it in this order, otherwise if
215 * we go down cpu blit path, the recursive transfer_map()
216 * sees the wrong status..
218 struct fd_resource
*shadow
= fd_resource(pshadow
);
220 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
221 shadow
, shadow
->base
.reference
.count
);
223 /* TODO valid_buffer_range?? */
224 swap(rsc
->bo
, shadow
->bo
);
225 swap(rsc
->write_batch
, shadow
->write_batch
);
226 for (int level
= 0; level
<= prsc
->last_level
; level
++) {
227 swap(rsc
->layout
.slices
[level
], shadow
->layout
.slices
[level
]);
228 swap(rsc
->layout
.ubwc_slices
[level
], shadow
->layout
.ubwc_slices
[level
]);
230 swap(rsc
->layout
.ubwc_size
, shadow
->layout
.ubwc_size
);
231 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
233 /* at this point, the newly created shadow buffer is not referenced
234 * by any batches, but the existing rsc (probably) is. We need to
235 * transfer those references over:
237 debug_assert(shadow
->batch_mask
== 0);
238 struct fd_batch
*batch
;
239 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
240 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
241 _mesa_set_remove(batch
->resources
, entry
);
242 _mesa_set_add(batch
->resources
, shadow
);
244 swap(rsc
->batch_mask
, shadow
->batch_mask
);
246 mtx_unlock(&ctx
->screen
->lock
);
248 struct pipe_blit_info blit
= {};
249 blit
.dst
.resource
= prsc
;
250 blit
.dst
.format
= prsc
->format
;
251 blit
.src
.resource
= pshadow
;
252 blit
.src
.format
= pshadow
->format
;
253 blit
.mask
= util_format_get_mask(prsc
->format
);
254 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
256 #define set_box(field, val) do { \
257 blit.dst.field = (val); \
258 blit.src.field = (val); \
261 /* blit the other levels in their entirety: */
262 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
263 if (box
&& l
== level
)
266 /* just blit whole level: */
268 set_box(box
.width
, u_minify(prsc
->width0
, l
));
269 set_box(box
.height
, u_minify(prsc
->height0
, l
));
270 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
272 do_blit(ctx
, &blit
, fallback
);
275 /* deal w/ current level specially, since we might need to split
276 * it up into a couple blits:
278 if (box
&& !discard_whole_level
) {
279 set_box(level
, level
);
281 switch (prsc
->target
) {
283 case PIPE_TEXTURE_1D
:
286 set_box(box
.height
, 1);
287 set_box(box
.depth
, 1);
291 set_box(box
.width
, box
->x
);
293 do_blit(ctx
, &blit
, fallback
);
295 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
296 set_box(box
.x
, box
->x
+ box
->width
);
297 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
299 do_blit(ctx
, &blit
, fallback
);
302 case PIPE_TEXTURE_2D
:
309 ctx
->in_shadow
= false;
311 pipe_resource_reference(&pshadow
, NULL
);
317 * Uncompress an UBWC compressed buffer "in place". This works basically
318 * like resource shadowing, creating a new resource, and doing an uncompress
319 * blit, and swapping the state between shadow and original resource so it
320 * appears to the state tracker as if nothing changed.
323 fd_resource_uncompress(struct fd_context
*ctx
, struct fd_resource
*rsc
)
326 fd_try_shadow_resource(ctx
, rsc
, 0, NULL
, FD_FORMAT_MOD_QCOM_TILED
);
328 /* shadow should not fail in any cases where we need to uncompress: */
329 debug_assert(success
);
332 * TODO what if rsc is used in other contexts, we don't currently
333 * have a good way to rebind_resource() in other contexts. And an
334 * app that is reading one resource in multiple contexts, isn't
335 * going to expect that the resource is modified.
337 * Hopefully the edge cases where we need to uncompress are rare
338 * enough that they mostly only show up in deqp.
341 rebind_resource(ctx
, &rsc
->base
);
344 static struct fd_resource
*
345 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
346 unsigned level
, const struct pipe_box
*box
)
348 struct pipe_context
*pctx
= &ctx
->base
;
349 struct pipe_resource tmpl
= rsc
->base
;
351 tmpl
.width0
= box
->width
;
352 tmpl
.height0
= box
->height
;
353 /* for array textures, box->depth is the array_size, otherwise
354 * for 3d textures, it is the depth:
356 if (tmpl
.array_size
> 1) {
357 if (tmpl
.target
== PIPE_TEXTURE_CUBE
)
358 tmpl
.target
= PIPE_TEXTURE_2D_ARRAY
;
359 tmpl
.array_size
= box
->depth
;
363 tmpl
.depth0
= box
->depth
;
366 tmpl
.bind
|= PIPE_BIND_LINEAR
;
368 struct pipe_resource
*pstaging
=
369 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
373 return fd_resource(pstaging
);
377 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
379 struct pipe_resource
*dst
= trans
->base
.resource
;
380 struct pipe_blit_info blit
= {};
382 blit
.dst
.resource
= dst
;
383 blit
.dst
.format
= dst
->format
;
384 blit
.dst
.level
= trans
->base
.level
;
385 blit
.dst
.box
= trans
->base
.box
;
386 blit
.src
.resource
= trans
->staging_prsc
;
387 blit
.src
.format
= trans
->staging_prsc
->format
;
389 blit
.src
.box
= trans
->staging_box
;
390 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
391 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
393 do_blit(ctx
, &blit
, false);
397 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
399 struct pipe_resource
*src
= trans
->base
.resource
;
400 struct pipe_blit_info blit
= {};
402 blit
.src
.resource
= src
;
403 blit
.src
.format
= src
->format
;
404 blit
.src
.level
= trans
->base
.level
;
405 blit
.src
.box
= trans
->base
.box
;
406 blit
.dst
.resource
= trans
->staging_prsc
;
407 blit
.dst
.format
= trans
->staging_prsc
->format
;
409 blit
.dst
.box
= trans
->staging_box
;
410 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
411 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
413 do_blit(ctx
, &blit
, false);
416 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
417 struct pipe_transfer
*ptrans
,
418 const struct pipe_box
*box
)
420 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
422 if (ptrans
->resource
->target
== PIPE_BUFFER
)
423 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
424 ptrans
->box
.x
+ box
->x
,
425 ptrans
->box
.x
+ box
->x
+ box
->width
);
429 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
431 struct fd_batch
*write_batch
= NULL
;
433 mtx_lock(&ctx
->screen
->lock
);
434 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
435 mtx_unlock(&ctx
->screen
->lock
);
437 if (usage
& PIPE_TRANSFER_WRITE
) {
438 struct fd_batch
*batch
, *batches
[32] = {};
441 /* This is a bit awkward, probably a fd_batch_flush_locked()
442 * would make things simpler.. but we need to hold the lock
443 * to iterate the batches which reference this resource. So
444 * we must first grab references under a lock, then flush.
446 mtx_lock(&ctx
->screen
->lock
);
447 batch_mask
= rsc
->batch_mask
;
448 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
449 fd_batch_reference_locked(&batches
[batch
->idx
], batch
);
450 mtx_unlock(&ctx
->screen
->lock
);
452 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
453 fd_batch_flush(batch
, false);
455 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
456 fd_batch_sync(batch
);
457 fd_batch_reference(&batches
[batch
->idx
], NULL
);
459 assert(rsc
->batch_mask
== 0);
460 } else if (write_batch
) {
461 fd_batch_flush(write_batch
, true);
464 fd_batch_reference(&write_batch
, NULL
);
466 assert(!rsc
->write_batch
);
470 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
472 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
476 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
477 struct pipe_transfer
*ptrans
)
479 struct fd_context
*ctx
= fd_context(pctx
);
480 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
481 struct fd_transfer
*trans
= fd_transfer(ptrans
);
483 if (trans
->staging_prsc
) {
484 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
485 fd_blit_from_staging(ctx
, trans
);
486 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
489 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
490 fd_bo_cpu_fini(rsc
->bo
);
493 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
495 ptrans
->box
.x
+ ptrans
->box
.width
);
497 pipe_resource_reference(&ptrans
->resource
, NULL
);
498 slab_free(&ctx
->transfer_pool
, ptrans
);
502 fd_resource_transfer_map(struct pipe_context
*pctx
,
503 struct pipe_resource
*prsc
,
504 unsigned level
, unsigned usage
,
505 const struct pipe_box
*box
,
506 struct pipe_transfer
**pptrans
)
508 struct fd_context
*ctx
= fd_context(pctx
);
509 struct fd_resource
*rsc
= fd_resource(prsc
);
510 struct fdl_slice
*slice
= fd_resource_slice(rsc
, level
);
511 struct fd_transfer
*trans
;
512 struct pipe_transfer
*ptrans
;
513 enum pipe_format format
= prsc
->format
;
519 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
520 box
->width
, box
->height
, box
->x
, box
->y
);
522 ptrans
= slab_alloc(&ctx
->transfer_pool
);
526 /* slab_alloc_st() doesn't zero: */
527 trans
= fd_transfer(ptrans
);
528 memset(trans
, 0, sizeof(*trans
));
530 pipe_resource_reference(&ptrans
->resource
, prsc
);
531 ptrans
->level
= level
;
532 ptrans
->usage
= usage
;
534 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->layout
.cpp
;
535 ptrans
->layer_stride
= fd_resource_layer_stride(rsc
, level
);
537 /* we always need a staging texture for tiled buffers:
539 * TODO we might sometimes want to *also* shadow the resource to avoid
540 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
543 if (rsc
->layout
.tile_mode
) {
544 struct fd_resource
*staging_rsc
;
546 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
548 struct fdl_slice
*staging_slice
=
549 fd_resource_slice(staging_rsc
, 0);
550 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
551 trans
->staging_prsc
= &staging_rsc
->base
;
552 trans
->base
.stride
= util_format_get_nblocksx(format
,
553 staging_slice
->pitch
) * staging_rsc
->layout
.cpp
;
554 trans
->base
.layer_stride
= fd_resource_layer_stride(staging_rsc
, 0);
555 trans
->staging_box
= *box
;
556 trans
->staging_box
.x
= 0;
557 trans
->staging_box
.y
= 0;
558 trans
->staging_box
.z
= 0;
560 if (usage
& PIPE_TRANSFER_READ
) {
561 fd_blit_to_staging(ctx
, trans
);
563 struct fd_batch
*batch
= NULL
;
565 fd_context_lock(ctx
);
566 fd_batch_reference_locked(&batch
, staging_rsc
->write_batch
);
567 fd_context_unlock(ctx
);
569 /* we can't fd_bo_cpu_prep() until the blit to staging
570 * is submitted to kernel.. in that case write_batch
571 * wouldn't be NULL yet:
574 fd_batch_sync(batch
);
575 fd_batch_reference(&batch
, NULL
);
578 fd_bo_cpu_prep(staging_rsc
->bo
, ctx
->pipe
,
579 DRM_FREEDRENO_PREP_READ
);
582 buf
= fd_bo_map(staging_rsc
->bo
);
587 ctx
->stats
.staging_uploads
++;
593 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
594 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
596 if (usage
& PIPE_TRANSFER_READ
)
597 op
|= DRM_FREEDRENO_PREP_READ
;
599 if (usage
& PIPE_TRANSFER_WRITE
)
600 op
|= DRM_FREEDRENO_PREP_WRITE
;
602 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
603 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
604 rebind_resource(ctx
, prsc
);
605 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
606 prsc
->target
== PIPE_BUFFER
&&
607 !util_ranges_intersect(&rsc
->valid_buffer_range
,
608 box
->x
, box
->x
+ box
->width
)) {
609 /* We are trying to write to a previously uninitialized range. No need
612 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
613 struct fd_batch
*write_batch
= NULL
;
615 /* hold a reference, so it doesn't disappear under us: */
616 fd_context_lock(ctx
);
617 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
618 fd_context_unlock(ctx
);
620 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
621 write_batch
->back_blit
) {
622 /* if only thing pending is a back-blit, we can discard it: */
623 fd_batch_reset(write_batch
);
626 /* If the GPU is writing to the resource, or if it is reading from the
627 * resource and we're trying to write to it, flush the renders.
629 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
630 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
631 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
633 /* if we need to flush/stall, see if we can make a shadow buffer
636 * TODO we could go down this path !reorder && !busy_for_read
637 * ie. we only *don't* want to go down this path if the blit
638 * will trigger a flush!
640 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
641 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
642 /* try shadowing only if it avoids a flush, otherwise staging would
645 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
,
646 box
, DRM_FORMAT_MOD_LINEAR
)) {
647 needs_flush
= busy
= false;
648 rebind_resource(ctx
, prsc
);
649 ctx
->stats
.shadow_uploads
++;
651 struct fd_resource
*staging_rsc
;
654 flush_resource(ctx
, rsc
, usage
);
658 /* in this case, we don't need to shadow the whole resource,
659 * since any draw that references the previous contents has
660 * already had rendering flushed for all tiles. So we can
661 * use a staging buffer to do the upload.
663 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
665 struct fdl_slice
*staging_slice
=
666 fd_resource_slice(staging_rsc
, 0);
667 trans
->staging_prsc
= &staging_rsc
->base
;
668 trans
->base
.stride
= util_format_get_nblocksx(format
,
669 staging_slice
->pitch
) * staging_rsc
->layout
.cpp
;
670 trans
->base
.layer_stride
=
671 fd_resource_layer_stride(staging_rsc
, 0);
672 trans
->staging_box
= *box
;
673 trans
->staging_box
.x
= 0;
674 trans
->staging_box
.y
= 0;
675 trans
->staging_box
.z
= 0;
676 buf
= fd_bo_map(staging_rsc
->bo
);
681 fd_batch_reference(&write_batch
, NULL
);
683 ctx
->stats
.staging_uploads
++;
691 flush_resource(ctx
, rsc
, usage
);
695 fd_batch_reference(&write_batch
, NULL
);
697 /* The GPU keeps track of how the various bo's are being used, and
698 * will wait if necessary for the proper operation to have
702 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
708 buf
= fd_bo_map(rsc
->bo
);
710 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
711 box
->x
/ util_format_get_blockwidth(format
) * rsc
->layout
.cpp
+
712 fd_resource_offset(rsc
, level
, box
->z
);
714 if (usage
& PIPE_TRANSFER_WRITE
)
722 fd_resource_transfer_unmap(pctx
, ptrans
);
727 fd_resource_destroy(struct pipe_screen
*pscreen
,
728 struct pipe_resource
*prsc
)
730 struct fd_resource
*rsc
= fd_resource(prsc
);
731 fd_bc_invalidate_resource(rsc
, true);
735 renderonly_scanout_destroy(rsc
->scanout
, fd_screen(pscreen
)->ro
);
737 util_range_destroy(&rsc
->valid_buffer_range
);
742 fd_resource_modifier(struct fd_resource
*rsc
)
744 if (!rsc
->layout
.tile_mode
)
745 return DRM_FORMAT_MOD_LINEAR
;
747 if (rsc
->layout
.ubwc_size
)
748 return DRM_FORMAT_MOD_QCOM_COMPRESSED
;
750 /* TODO invent a modifier for tiled but not UBWC buffers: */
751 return DRM_FORMAT_MOD_INVALID
;
755 fd_resource_get_handle(struct pipe_screen
*pscreen
,
756 struct pipe_context
*pctx
,
757 struct pipe_resource
*prsc
,
758 struct winsys_handle
*handle
,
761 struct fd_resource
*rsc
= fd_resource(prsc
);
763 handle
->modifier
= fd_resource_modifier(rsc
);
765 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->scanout
,
766 fd_resource_slice(rsc
, 0)->pitch
* rsc
->layout
.cpp
, handle
);
770 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
772 struct pipe_resource
*prsc
= &rsc
->base
;
773 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
774 enum util_format_layout layout
= util_format_description(format
)->layout
;
775 uint32_t pitchalign
= screen
->gmem_alignw
;
776 uint32_t level
, size
= 0;
777 uint32_t width
= prsc
->width0
;
778 uint32_t height
= prsc
->height0
;
779 uint32_t depth
= prsc
->depth0
;
780 /* in layer_first layout, the level (slice) contains just one
781 * layer (since in fact the layer contains the slices)
783 uint32_t layers_in_level
= rsc
->layout
.layer_first
? 1 : prsc
->array_size
;
785 for (level
= 0; level
<= prsc
->last_level
; level
++) {
786 struct fdl_slice
*slice
= fd_resource_slice(rsc
, level
);
789 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
790 slice
->pitch
= width
=
791 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
793 slice
->pitch
= width
= align(width
, pitchalign
);
794 slice
->offset
= size
;
795 blocks
= util_format_get_nblocks(format
, width
, height
);
796 /* 1d array and 2d array textures must all have the same layer size
797 * for each miplevel on a3xx. 3d textures can have different layer
798 * sizes for high levels, but the hw auto-sizer is buggy (or at least
799 * different than what this code does), so as soon as the layer size
800 * range gets into range, we stop reducing it.
802 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
804 (level
> 1 && fd_resource_slice(rsc
, level
- 1)->size0
> 0xf000)))
805 slice
->size0
= align(blocks
* rsc
->layout
.cpp
, alignment
);
806 else if (level
== 0 || rsc
->layout
.layer_first
|| alignment
== 1)
807 slice
->size0
= align(blocks
* rsc
->layout
.cpp
, alignment
);
809 slice
->size0
= fd_resource_slice(rsc
, level
- 1)->size0
;
811 size
+= slice
->size0
* depth
* layers_in_level
;
813 width
= u_minify(width
, 1);
814 height
= u_minify(height
, 1);
815 depth
= u_minify(depth
, 1);
822 slice_alignment(enum pipe_texture_target target
)
824 /* on a3xx, 2d array and 3d textures seem to want their
825 * layers aligned to page boundaries:
828 case PIPE_TEXTURE_3D
:
829 case PIPE_TEXTURE_1D_ARRAY
:
830 case PIPE_TEXTURE_2D_ARRAY
:
837 /* cross generation texture layout to plug in to screen->setup_slices()..
838 * replace with generation specific one as-needed.
840 * TODO for a4xx probably can extract out the a4xx specific logic int
841 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
845 fd_setup_slices(struct fd_resource
*rsc
)
849 alignment
= slice_alignment(rsc
->base
.target
);
851 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
852 if (is_a4xx(screen
)) {
853 switch (rsc
->base
.target
) {
854 case PIPE_TEXTURE_3D
:
855 rsc
->layout
.layer_first
= false;
858 rsc
->layout
.layer_first
= true;
864 return setup_slices(rsc
, alignment
, rsc
->base
.format
);
867 /* special case to resize query buf after allocated.. */
869 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
871 struct fd_resource
*rsc
= fd_resource(prsc
);
873 debug_assert(prsc
->width0
== 0);
874 debug_assert(prsc
->target
== PIPE_BUFFER
);
875 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
878 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
882 fd_resource_layout_init(struct pipe_resource
*prsc
)
884 struct fd_resource
*rsc
= fd_resource(prsc
);
885 struct fdl_layout
*layout
= &rsc
->layout
;
887 layout
->width0
= prsc
->width0
;
888 layout
->height0
= prsc
->height0
;
889 layout
->depth0
= prsc
->depth0
;
891 layout
->cpp
= util_format_get_blocksize(prsc
->format
);
892 layout
->cpp
*= fd_resource_nr_samples(prsc
);
896 * Create a new texture object, using the given template info.
898 static struct pipe_resource
*
899 fd_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
900 const struct pipe_resource
*tmpl
,
901 const uint64_t *modifiers
, int count
)
903 struct fd_screen
*screen
= fd_screen(pscreen
);
904 struct fd_resource
*rsc
;
905 struct pipe_resource
*prsc
;
906 enum pipe_format format
= tmpl
->format
;
909 /* when using kmsro, scanout buffers are allocated on the display device
910 * create_with_modifiers() doesn't give us usage flags, so we have to
911 * assume that all calls with modifiers are scanout-possible
914 ((tmpl
->bind
& PIPE_BIND_SCANOUT
) ||
915 !(count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
))) {
916 struct pipe_resource scanout_templat
= *tmpl
;
917 struct renderonly_scanout
*scanout
;
918 struct winsys_handle handle
;
920 /* apply freedreno alignment requirement */
921 scanout_templat
.width0
= align(tmpl
->width0
, screen
->gmem_alignw
);
923 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
924 screen
->ro
, &handle
);
928 renderonly_scanout_destroy(scanout
, screen
->ro
);
930 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
931 rsc
= fd_resource(pscreen
->resource_from_handle(pscreen
, tmpl
,
933 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
934 close(handle
.handle
);
941 rsc
= CALLOC_STRUCT(fd_resource
);
944 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
945 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
946 tmpl
->target
, util_format_name(format
),
947 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
948 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
949 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
955 fd_resource_layout_init(prsc
);
958 (PIPE_BIND_SCANOUT | \
960 PIPE_BIND_DISPLAY_TARGET)
962 bool linear
= drm_find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
963 if (tmpl
->bind
& LINEAR
)
966 /* Normally, for non-shared buffers, allow buffer compression if
967 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
970 * TODO we should probably also limit tiled in a similar way,
971 * except we don't have a format modifier for tiled. (We probably
974 bool allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_INVALID
, modifiers
, count
);
975 if (tmpl
->bind
& PIPE_BIND_SHARED
)
976 allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED
, modifiers
, count
);
978 allow_ubwc
&= !(fd_mesa_debug
& FD_DBG_NOUBWC
);
980 pipe_reference_init(&prsc
->reference
, 1);
982 prsc
->screen
= pscreen
;
984 if (screen
->tile_mode
&&
985 (tmpl
->target
!= PIPE_BUFFER
) &&
987 rsc
->layout
.tile_mode
= screen
->tile_mode(prsc
);
990 util_range_init(&rsc
->valid_buffer_range
);
992 rsc
->internal_format
= format
;
994 size
= screen
->setup_slices(rsc
);
996 if (allow_ubwc
&& screen
->fill_ubwc_buffer_sizes
&& rsc
->layout
.tile_mode
)
997 size
+= screen
->fill_ubwc_buffer_sizes(rsc
);
999 /* special case for hw-query buffer, which we need to allocate before we
1003 /* note, semi-intention == instead of & */
1004 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
1008 if (rsc
->layout
.layer_first
) {
1009 rsc
->layout
.layer_size
= align(size
, 4096);
1010 size
= rsc
->layout
.layer_size
* prsc
->array_size
;
1013 realloc_bo(rsc
, size
);
1019 fd_resource_destroy(pscreen
, prsc
);
1023 static struct pipe_resource
*
1024 fd_resource_create(struct pipe_screen
*pscreen
,
1025 const struct pipe_resource
*tmpl
)
1027 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
1028 return fd_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
1032 is_supported_modifier(struct pipe_screen
*pscreen
, enum pipe_format pfmt
,
1037 /* Get the count of supported modifiers: */
1038 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, 0, NULL
, NULL
, &count
);
1040 /* Get the supported modifiers: */
1041 uint64_t modifiers
[count
];
1042 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, count
, modifiers
, NULL
, &count
);
1044 for (int i
= 0; i
< count
; i
++)
1045 if (modifiers
[i
] == mod
)
1052 * Create a texture from a winsys_handle. The handle is often created in
1053 * another process by first creating a pipe texture and then calling
1054 * resource_get_handle.
1056 static struct pipe_resource
*
1057 fd_resource_from_handle(struct pipe_screen
*pscreen
,
1058 const struct pipe_resource
*tmpl
,
1059 struct winsys_handle
*handle
, unsigned usage
)
1061 struct fd_screen
*screen
= fd_screen(pscreen
);
1062 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
1063 struct fdl_slice
*slice
= fd_resource_slice(rsc
, 0);
1064 struct pipe_resource
*prsc
= &rsc
->base
;
1065 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
1067 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1068 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1069 tmpl
->target
, util_format_name(tmpl
->format
),
1070 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
1071 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
1072 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
1078 fd_resource_layout_init(prsc
);
1080 pipe_reference_init(&prsc
->reference
, 1);
1082 prsc
->screen
= pscreen
;
1084 util_range_init(&rsc
->valid_buffer_range
);
1086 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
1090 rsc
->internal_format
= tmpl
->format
;
1091 slice
->pitch
= handle
->stride
/ rsc
->layout
.cpp
;
1092 slice
->offset
= handle
->offset
;
1093 slice
->size0
= handle
->stride
* prsc
->height0
;
1095 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
1096 (slice
->pitch
& (pitchalign
- 1)))
1099 if (handle
->modifier
== DRM_FORMAT_MOD_QCOM_COMPRESSED
) {
1100 if (!is_supported_modifier(pscreen
, tmpl
->format
,
1101 DRM_FORMAT_MOD_QCOM_COMPRESSED
)) {
1102 DBG("bad modifier: %"PRIx64
, handle
->modifier
);
1105 debug_assert(screen
->fill_ubwc_buffer_sizes
);
1106 screen
->fill_ubwc_buffer_sizes(rsc
);
1107 } else if (handle
->modifier
&&
1108 (handle
->modifier
!= DRM_FORMAT_MOD_INVALID
)) {
1112 assert(rsc
->layout
.cpp
);
1116 renderonly_create_gpu_import_for_resource(prsc
, screen
->ro
, NULL
);
1117 /* failure is expected in some cases.. */
1125 fd_resource_destroy(pscreen
, prsc
);
1130 fd_render_condition_check(struct pipe_context
*pctx
)
1132 struct fd_context
*ctx
= fd_context(pctx
);
1134 if (!ctx
->cond_query
)
1137 union pipe_query_result res
= { 0 };
1139 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1140 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1142 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1143 return (bool)res
.u64
!= ctx
->cond_cond
;
1149 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1151 struct fd_context
*ctx
= fd_context(pctx
);
1152 struct fd_resource
*rsc
= fd_resource(prsc
);
1155 * TODO I guess we could track that the resource is invalidated and
1156 * use that as a hint to realloc rather than stall in _transfer_map(),
1157 * even in the non-DISCARD_WHOLE_RESOURCE case?
1159 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1162 if (rsc
->write_batch
) {
1163 struct fd_batch
*batch
= rsc
->write_batch
;
1164 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1166 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
) {
1167 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1168 ctx
->dirty
|= FD_DIRTY_ZSA
;
1171 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1172 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1173 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1174 ctx
->dirty
|= FD_DIRTY_FRAMEBUFFER
;
1182 static enum pipe_format
1183 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1185 return fd_resource(prsc
)->internal_format
;
1189 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1190 struct pipe_resource
*stencil
)
1192 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1195 static struct pipe_resource
*
1196 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1198 struct fd_resource
*rsc
= fd_resource(prsc
);
1200 return &rsc
->stencil
->base
;
1204 static const struct u_transfer_vtbl transfer_vtbl
= {
1205 .resource_create
= fd_resource_create
,
1206 .resource_destroy
= fd_resource_destroy
,
1207 .transfer_map
= fd_resource_transfer_map
,
1208 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1209 .transfer_unmap
= fd_resource_transfer_unmap
,
1210 .get_internal_format
= fd_resource_get_internal_format
,
1211 .set_stencil
= fd_resource_set_stencil
,
1212 .get_stencil
= fd_resource_get_stencil
,
1216 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1218 struct fd_screen
*screen
= fd_screen(pscreen
);
1219 bool fake_rgtc
= screen
->gpu_id
< 400;
1221 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1222 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1225 pscreen
->resource_create_with_modifiers
= fd_resource_create_with_modifiers
;
1226 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1227 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1228 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1230 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1231 true, false, fake_rgtc
, true);
1233 if (!screen
->setup_slices
)
1234 screen
->setup_slices
= fd_setup_slices
;
1238 fd_get_sample_position(struct pipe_context
*context
,
1239 unsigned sample_count
, unsigned sample_index
,
1242 /* The following is copied from nouveau/nv50 except for position
1243 * values, which are taken from blob driver */
1244 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1245 static const uint8_t pos2
[2][2] = {
1246 { 0xc, 0xc }, { 0x4, 0x4 } };
1247 static const uint8_t pos4
[4][2] = {
1248 { 0x6, 0x2 }, { 0xe, 0x6 },
1249 { 0x2, 0xa }, { 0xa, 0xe } };
1250 /* TODO needs to be verified on supported hw */
1251 static const uint8_t pos8
[8][2] = {
1252 { 0x9, 0x5 }, { 0x7, 0xb },
1253 { 0xd, 0x9 }, { 0x5, 0x3 },
1254 { 0x3, 0xd }, { 0x1, 0x7 },
1255 { 0xb, 0xf }, { 0xf, 0x1 } };
1257 const uint8_t (*ptr
)[2];
1259 switch (sample_count
) {
1277 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1278 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1282 fd_blit_pipe(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1284 /* wrap fd_blit to return void */
1285 fd_blit(pctx
, blit_info
);
1289 fd_resource_context_init(struct pipe_context
*pctx
)
1291 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1292 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1293 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1294 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1295 pctx
->texture_subdata
= u_default_texture_subdata
;
1296 pctx
->create_surface
= fd_create_surface
;
1297 pctx
->surface_destroy
= fd_surface_destroy
;
1298 pctx
->resource_copy_region
= fd_resource_copy_region
;
1299 pctx
->blit
= fd_blit_pipe
;
1300 pctx
->flush_resource
= fd_flush_resource
;
1301 pctx
->invalidate_resource
= fd_invalidate_resource
;
1302 pctx
->get_sample_position
= fd_get_sample_position
;