2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/format/u_format.h"
28 #include "util/format/u_format_rgtc.h"
29 #include "util/format/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
35 #include "util/u_drm.h"
37 #include "decode/util.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_batch_cache.h"
41 #include "freedreno_blitter.h"
42 #include "freedreno_fence.h"
43 #include "freedreno_screen.h"
44 #include "freedreno_surface.h"
45 #include "freedreno_context.h"
46 #include "freedreno_query_hw.h"
47 #include "freedreno_util.h"
49 #include "drm-uapi/drm_fourcc.h"
52 /* XXX this should go away, needed for 'struct winsys_handle' */
53 #include "frontend/drm_driver.h"
55 /* A private modifier for now, so we have a way to request tiled but not
56 * compressed. It would perhaps be good to get real modifiers for the
57 * tiled formats, but would probably need to do some work to figure out
58 * the layout(s) of the tiled modes, and whether they are the same
61 #define FD_FORMAT_MOD_QCOM_TILED fourcc_mod_code(QCOM, 0xffffffff)
64 * Go through the entire state and see if the resource is bound
65 * anywhere. If it is, mark the relevant state as dirty. This is
66 * called on realloc_bo to ensure the necessary state is re-
67 * emitted so the GPU looks at the new backing bo.
70 rebind_resource_in_ctx(struct fd_context
*ctx
, struct fd_resource
*rsc
)
72 struct pipe_resource
*prsc
= &rsc
->base
;
74 if (ctx
->rebind_resource
)
75 ctx
->rebind_resource(ctx
, rsc
);
78 if (rsc
->dirty
& FD_DIRTY_VTXBUF
) {
79 struct fd_vertexbuf_stateobj
*vb
= &ctx
->vtx
.vertexbuf
;
80 for (unsigned i
= 0; i
< vb
->count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
81 if (vb
->vb
[i
].buffer
.resource
== prsc
)
82 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
86 const enum fd_dirty_3d_state per_stage_dirty
=
87 FD_DIRTY_CONST
| FD_DIRTY_TEX
| FD_DIRTY_IMAGE
| FD_DIRTY_SSBO
;
89 if (!(rsc
->dirty
& per_stage_dirty
))
92 /* per-shader-stage resources: */
93 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
94 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
95 * cmdstream rather than by pointer..
97 if ((rsc
->dirty
& FD_DIRTY_CONST
) &&
98 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_CONST
)) {
99 struct fd_constbuf_stateobj
*cb
= &ctx
->constbuf
[stage
];
100 const unsigned num_ubos
= util_last_bit(cb
->enabled_mask
);
101 for (unsigned i
= 1; i
< num_ubos
; i
++) {
102 if (cb
->cb
[i
].buffer
== prsc
) {
103 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
104 ctx
->dirty
|= FD_DIRTY_CONST
;
111 if ((rsc
->dirty
& FD_DIRTY_TEX
) &&
112 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_TEX
)) {
113 struct fd_texture_stateobj
*tex
= &ctx
->tex
[stage
];
114 for (unsigned i
= 0; i
< tex
->num_textures
; i
++) {
115 if (tex
->textures
[i
] && (tex
->textures
[i
]->texture
== prsc
)) {
116 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
117 ctx
->dirty
|= FD_DIRTY_TEX
;
124 if ((rsc
->dirty
& FD_DIRTY_IMAGE
) &&
125 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_IMAGE
)) {
126 struct fd_shaderimg_stateobj
*si
= &ctx
->shaderimg
[stage
];
127 const unsigned num_images
= util_last_bit(si
->enabled_mask
);
128 for (unsigned i
= 0; i
< num_images
; i
++) {
129 if (si
->si
[i
].resource
== prsc
) {
130 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_IMAGE
;
131 ctx
->dirty
|= FD_DIRTY_IMAGE
;
138 if ((rsc
->dirty
& FD_DIRTY_SSBO
) &&
139 !(ctx
->dirty_shader
[stage
] & FD_DIRTY_SSBO
)) {
140 struct fd_shaderbuf_stateobj
*sb
= &ctx
->shaderbuf
[stage
];
141 const unsigned num_ssbos
= util_last_bit(sb
->enabled_mask
);
142 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
143 if (sb
->sb
[i
].buffer
== prsc
) {
144 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
145 ctx
->dirty
|= FD_DIRTY_SSBO
;
154 rebind_resource(struct fd_resource
*rsc
)
156 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
158 fd_screen_lock(screen
);
159 fd_resource_lock(rsc
);
162 list_for_each_entry (struct fd_context
, ctx
, &screen
->context_list
, node
)
163 rebind_resource_in_ctx(ctx
, rsc
);
165 fd_resource_unlock(rsc
);
166 fd_screen_unlock(screen
);
170 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
172 struct pipe_resource
*prsc
= &rsc
->base
;
173 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
174 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
175 DRM_FREEDRENO_GEM_TYPE_KMEM
|
176 COND(prsc
->bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
177 /* TODO other flags? */
179 /* if we start using things other than write-combine,
180 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
186 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
, "%ux%ux%u@%u:%x",
187 prsc
->width0
, prsc
->height0
, prsc
->depth0
, rsc
->layout
.cpp
, prsc
->bind
);
189 /* Zero out the UBWC area on allocation. This fixes intermittent failures
190 * with UBWC, which I suspect are due to the HW having a hard time
191 * interpreting arbitrary values populating the flags buffer when the BO
192 * was recycled through the bo cache (instead of fresh allocations from
193 * the kernel, which are zeroed). sleep(1) in this spot didn't work
194 * around the issue, but any memset value seems to.
196 if (rsc
->layout
.ubwc
) {
197 void *buf
= fd_bo_map(rsc
->bo
);
198 memset(buf
, 0, rsc
->layout
.slices
[0].offset
);
201 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
202 util_range_set_empty(&rsc
->valid_buffer_range
);
203 fd_bc_invalidate_resource(rsc
, true);
207 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
209 struct pipe_context
*pctx
= &ctx
->base
;
211 /* TODO size threshold too?? */
212 if (fallback
|| !fd_blit(pctx
, blit
)) {
213 /* do blit on cpu: */
214 util_resource_copy_region(pctx
,
215 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
216 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
217 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
222 * @rsc: the resource to shadow
223 * @level: the level to discard (if box != NULL, otherwise ignored)
224 * @box: the box to discard (or NULL if none)
225 * @modifier: the modifier for the new buffer state
228 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
229 unsigned level
, const struct pipe_box
*box
, uint64_t modifier
)
231 struct pipe_context
*pctx
= &ctx
->base
;
232 struct pipe_resource
*prsc
= &rsc
->base
;
233 bool fallback
= false;
238 /* TODO: somehow munge dimensions and format to copy unsupported
239 * render target format to something that is supported?
241 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
242 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
243 prsc
->nr_storage_samples
,
244 PIPE_BIND_RENDER_TARGET
))
247 /* do shadowing back-blits on the cpu for buffers: */
248 if (prsc
->target
== PIPE_BUFFER
)
251 bool discard_whole_level
= box
&& util_texrange_covers_whole_level(prsc
, level
,
252 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
254 /* TODO need to be more clever about current level */
255 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && box
&& !discard_whole_level
)
258 struct pipe_resource
*pshadow
=
259 pctx
->screen
->resource_create_with_modifiers(pctx
->screen
,
265 assert(!ctx
->in_shadow
);
266 ctx
->in_shadow
= true;
268 /* get rid of any references that batch-cache might have to us (which
269 * should empty/destroy rsc->batches hashset)
271 fd_bc_invalidate_resource(rsc
, false);
272 rebind_resource(rsc
);
274 fd_screen_lock(ctx
->screen
);
276 /* Swap the backing bo's, so shadow becomes the old buffer,
277 * blit from shadow to new buffer. From here on out, we
280 * Note that we need to do it in this order, otherwise if
281 * we go down cpu blit path, the recursive transfer_map()
282 * sees the wrong status..
284 struct fd_resource
*shadow
= fd_resource(pshadow
);
286 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
287 shadow
, shadow
->base
.reference
.count
);
289 /* TODO valid_buffer_range?? */
290 swap(rsc
->bo
, shadow
->bo
);
291 swap(rsc
->write_batch
, shadow
->write_batch
);
292 swap(rsc
->layout
, shadow
->layout
);
293 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
295 /* at this point, the newly created shadow buffer is not referenced
296 * by any batches, but the existing rsc (probably) is. We need to
297 * transfer those references over:
299 debug_assert(shadow
->batch_mask
== 0);
300 struct fd_batch
*batch
;
301 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
302 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
303 _mesa_set_remove(batch
->resources
, entry
);
304 _mesa_set_add(batch
->resources
, shadow
);
306 swap(rsc
->batch_mask
, shadow
->batch_mask
);
308 fd_screen_unlock(ctx
->screen
);
310 struct pipe_blit_info blit
= {};
311 blit
.dst
.resource
= prsc
;
312 blit
.dst
.format
= prsc
->format
;
313 blit
.src
.resource
= pshadow
;
314 blit
.src
.format
= pshadow
->format
;
315 blit
.mask
= util_format_get_mask(prsc
->format
);
316 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
318 #define set_box(field, val) do { \
319 blit.dst.field = (val); \
320 blit.src.field = (val); \
323 /* blit the other levels in their entirety: */
324 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
325 if (box
&& l
== level
)
328 /* just blit whole level: */
330 set_box(box
.width
, u_minify(prsc
->width0
, l
));
331 set_box(box
.height
, u_minify(prsc
->height0
, l
));
332 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
334 for (int i
= 0; i
< prsc
->array_size
; i
++) {
336 do_blit(ctx
, &blit
, fallback
);
340 /* deal w/ current level specially, since we might need to split
341 * it up into a couple blits:
343 if (box
&& !discard_whole_level
) {
344 set_box(level
, level
);
346 switch (prsc
->target
) {
348 case PIPE_TEXTURE_1D
:
351 set_box(box
.height
, 1);
352 set_box(box
.depth
, 1);
356 set_box(box
.width
, box
->x
);
358 do_blit(ctx
, &blit
, fallback
);
360 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
361 set_box(box
.x
, box
->x
+ box
->width
);
362 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
364 do_blit(ctx
, &blit
, fallback
);
367 case PIPE_TEXTURE_2D
:
374 ctx
->in_shadow
= false;
376 pipe_resource_reference(&pshadow
, NULL
);
382 * Uncompress an UBWC compressed buffer "in place". This works basically
383 * like resource shadowing, creating a new resource, and doing an uncompress
384 * blit, and swapping the state between shadow and original resource so it
385 * appears to the gallium frontends as if nothing changed.
388 fd_resource_uncompress(struct fd_context
*ctx
, struct fd_resource
*rsc
)
391 fd_try_shadow_resource(ctx
, rsc
, 0, NULL
, FD_FORMAT_MOD_QCOM_TILED
);
393 /* shadow should not fail in any cases where we need to uncompress: */
394 debug_assert(success
);
398 * Debug helper to hexdump a resource.
401 fd_resource_dump(struct fd_resource
*rsc
, const char *name
)
403 fd_bo_cpu_prep(rsc
->bo
, NULL
, DRM_FREEDRENO_PREP_READ
);
404 printf("%s: \n", name
);
405 dump_hex(fd_bo_map(rsc
->bo
), fd_bo_size(rsc
->bo
));
408 static struct fd_resource
*
409 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
410 unsigned level
, const struct pipe_box
*box
)
412 struct pipe_context
*pctx
= &ctx
->base
;
413 struct pipe_resource tmpl
= rsc
->base
;
415 tmpl
.width0
= box
->width
;
416 tmpl
.height0
= box
->height
;
417 /* for array textures, box->depth is the array_size, otherwise
418 * for 3d textures, it is the depth:
420 if (tmpl
.array_size
> 1) {
421 if (tmpl
.target
== PIPE_TEXTURE_CUBE
)
422 tmpl
.target
= PIPE_TEXTURE_2D_ARRAY
;
423 tmpl
.array_size
= box
->depth
;
427 tmpl
.depth0
= box
->depth
;
430 tmpl
.bind
|= PIPE_BIND_LINEAR
;
432 struct pipe_resource
*pstaging
=
433 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
437 return fd_resource(pstaging
);
441 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
443 struct pipe_resource
*dst
= trans
->base
.resource
;
444 struct pipe_blit_info blit
= {};
446 blit
.dst
.resource
= dst
;
447 blit
.dst
.format
= dst
->format
;
448 blit
.dst
.level
= trans
->base
.level
;
449 blit
.dst
.box
= trans
->base
.box
;
450 blit
.src
.resource
= trans
->staging_prsc
;
451 blit
.src
.format
= trans
->staging_prsc
->format
;
453 blit
.src
.box
= trans
->staging_box
;
454 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
455 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
457 do_blit(ctx
, &blit
, false);
461 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
463 struct pipe_resource
*src
= trans
->base
.resource
;
464 struct pipe_blit_info blit
= {};
466 blit
.src
.resource
= src
;
467 blit
.src
.format
= src
->format
;
468 blit
.src
.level
= trans
->base
.level
;
469 blit
.src
.box
= trans
->base
.box
;
470 blit
.dst
.resource
= trans
->staging_prsc
;
471 blit
.dst
.format
= trans
->staging_prsc
->format
;
473 blit
.dst
.box
= trans
->staging_box
;
474 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
475 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
477 do_blit(ctx
, &blit
, false);
480 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
481 struct pipe_transfer
*ptrans
,
482 const struct pipe_box
*box
)
484 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
486 if (ptrans
->resource
->target
== PIPE_BUFFER
)
487 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
488 ptrans
->box
.x
+ box
->x
,
489 ptrans
->box
.x
+ box
->x
+ box
->width
);
493 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
495 struct fd_batch
*write_batch
= NULL
;
497 fd_screen_lock(ctx
->screen
);
498 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
499 fd_screen_unlock(ctx
->screen
);
501 if (usage
& PIPE_TRANSFER_WRITE
) {
502 struct fd_batch
*batch
, *batches
[32] = {};
505 /* This is a bit awkward, probably a fd_batch_flush_locked()
506 * would make things simpler.. but we need to hold the lock
507 * to iterate the batches which reference this resource. So
508 * we must first grab references under a lock, then flush.
510 fd_screen_lock(ctx
->screen
);
511 batch_mask
= rsc
->batch_mask
;
512 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
513 fd_batch_reference_locked(&batches
[batch
->idx
], batch
);
514 fd_screen_unlock(ctx
->screen
);
516 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
517 fd_batch_flush(batch
);
519 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
520 fd_batch_reference(&batches
[batch
->idx
], NULL
);
522 assert(rsc
->batch_mask
== 0);
523 } else if (write_batch
) {
524 fd_batch_flush(write_batch
);
527 fd_batch_reference(&write_batch
, NULL
);
529 assert(!rsc
->write_batch
);
533 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
535 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
539 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
540 struct pipe_transfer
*ptrans
)
542 struct fd_context
*ctx
= fd_context(pctx
);
543 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
544 struct fd_transfer
*trans
= fd_transfer(ptrans
);
546 if (trans
->staging_prsc
) {
547 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
548 fd_blit_from_staging(ctx
, trans
);
549 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
552 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
553 fd_bo_cpu_fini(rsc
->bo
);
556 util_range_add(&rsc
->base
, &rsc
->valid_buffer_range
,
558 ptrans
->box
.x
+ ptrans
->box
.width
);
560 pipe_resource_reference(&ptrans
->resource
, NULL
);
561 slab_free(&ctx
->transfer_pool
, ptrans
);
565 fd_resource_transfer_map(struct pipe_context
*pctx
,
566 struct pipe_resource
*prsc
,
567 unsigned level
, unsigned usage
,
568 const struct pipe_box
*box
,
569 struct pipe_transfer
**pptrans
)
571 struct fd_context
*ctx
= fd_context(pctx
);
572 struct fd_resource
*rsc
= fd_resource(prsc
);
573 struct fd_transfer
*trans
;
574 struct pipe_transfer
*ptrans
;
575 enum pipe_format format
= prsc
->format
;
581 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
582 box
->width
, box
->height
, box
->x
, box
->y
);
584 if ((usage
& PIPE_TRANSFER_MAP_DIRECTLY
) && rsc
->layout
.tile_mode
) {
585 DBG("CANNOT MAP DIRECTLY!\n");
589 ptrans
= slab_alloc(&ctx
->transfer_pool
);
593 /* slab_alloc_st() doesn't zero: */
594 trans
= fd_transfer(ptrans
);
595 memset(trans
, 0, sizeof(*trans
));
597 pipe_resource_reference(&ptrans
->resource
, prsc
);
598 ptrans
->level
= level
;
599 ptrans
->usage
= usage
;
601 ptrans
->stride
= fd_resource_pitch(rsc
, level
);
602 ptrans
->layer_stride
= fd_resource_layer_stride(rsc
, level
);
604 /* we always need a staging texture for tiled buffers:
606 * TODO we might sometimes want to *also* shadow the resource to avoid
607 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
610 if (rsc
->layout
.tile_mode
) {
611 struct fd_resource
*staging_rsc
;
613 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
615 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
616 trans
->staging_prsc
= &staging_rsc
->base
;
617 trans
->base
.stride
= fd_resource_pitch(staging_rsc
, 0);
618 trans
->base
.layer_stride
= fd_resource_layer_stride(staging_rsc
, 0);
619 trans
->staging_box
= *box
;
620 trans
->staging_box
.x
= 0;
621 trans
->staging_box
.y
= 0;
622 trans
->staging_box
.z
= 0;
624 if (usage
& PIPE_TRANSFER_READ
) {
625 fd_blit_to_staging(ctx
, trans
);
627 fd_bo_cpu_prep(staging_rsc
->bo
, ctx
->pipe
,
628 DRM_FREEDRENO_PREP_READ
);
631 buf
= fd_bo_map(staging_rsc
->bo
);
636 ctx
->stats
.staging_uploads
++;
642 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
643 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
645 if (usage
& PIPE_TRANSFER_READ
)
646 op
|= DRM_FREEDRENO_PREP_READ
;
648 if (usage
& PIPE_TRANSFER_WRITE
)
649 op
|= DRM_FREEDRENO_PREP_WRITE
;
651 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
653 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
654 if (needs_flush
|| fd_resource_busy(rsc
, op
)) {
655 rebind_resource(rsc
);
656 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
658 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
659 prsc
->target
== PIPE_BUFFER
&&
660 !util_ranges_intersect(&rsc
->valid_buffer_range
,
661 box
->x
, box
->x
+ box
->width
)) {
662 /* We are trying to write to a previously uninitialized range. No need
665 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
666 struct fd_batch
*write_batch
= NULL
;
668 /* hold a reference, so it doesn't disappear under us: */
669 fd_context_lock(ctx
);
670 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
671 fd_context_unlock(ctx
);
673 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
674 write_batch
->back_blit
) {
675 /* if only thing pending is a back-blit, we can discard it: */
676 fd_batch_reset(write_batch
);
679 /* If the GPU is writing to the resource, or if it is reading from the
680 * resource and we're trying to write to it, flush the renders.
682 bool busy
= needs_flush
|| fd_resource_busy(rsc
, op
);
684 /* if we need to flush/stall, see if we can make a shadow buffer
687 * TODO we could go down this path !reorder && !busy_for_read
688 * ie. we only *don't* want to go down this path if the blit
689 * will trigger a flush!
691 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
692 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
693 /* try shadowing only if it avoids a flush, otherwise staging would
696 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
,
697 box
, DRM_FORMAT_MOD_LINEAR
)) {
698 needs_flush
= busy
= false;
699 ctx
->stats
.shadow_uploads
++;
701 struct fd_resource
*staging_rsc
;
704 flush_resource(ctx
, rsc
, usage
);
708 /* in this case, we don't need to shadow the whole resource,
709 * since any draw that references the previous contents has
710 * already had rendering flushed for all tiles. So we can
711 * use a staging buffer to do the upload.
713 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
715 trans
->staging_prsc
= &staging_rsc
->base
;
716 trans
->base
.stride
= fd_resource_pitch(staging_rsc
, 0);
717 trans
->base
.layer_stride
=
718 fd_resource_layer_stride(staging_rsc
, 0);
719 trans
->staging_box
= *box
;
720 trans
->staging_box
.x
= 0;
721 trans
->staging_box
.y
= 0;
722 trans
->staging_box
.z
= 0;
723 buf
= fd_bo_map(staging_rsc
->bo
);
728 fd_batch_reference(&write_batch
, NULL
);
730 ctx
->stats
.staging_uploads
++;
738 flush_resource(ctx
, rsc
, usage
);
742 fd_batch_reference(&write_batch
, NULL
);
744 /* The GPU keeps track of how the various bo's are being used, and
745 * will wait if necessary for the proper operation to have
749 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
755 buf
= fd_bo_map(rsc
->bo
);
757 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
758 box
->x
/ util_format_get_blockwidth(format
) * rsc
->layout
.cpp
+
759 fd_resource_offset(rsc
, level
, box
->z
);
761 if (usage
& PIPE_TRANSFER_WRITE
)
769 fd_resource_transfer_unmap(pctx
, ptrans
);
774 fd_resource_destroy(struct pipe_screen
*pscreen
,
775 struct pipe_resource
*prsc
)
777 struct fd_resource
*rsc
= fd_resource(prsc
);
778 fd_bc_invalidate_resource(rsc
, true);
782 renderonly_scanout_destroy(rsc
->scanout
, fd_screen(pscreen
)->ro
);
784 util_range_destroy(&rsc
->valid_buffer_range
);
785 simple_mtx_destroy(&rsc
->lock
);
790 fd_resource_modifier(struct fd_resource
*rsc
)
792 if (!rsc
->layout
.tile_mode
)
793 return DRM_FORMAT_MOD_LINEAR
;
795 if (rsc
->layout
.ubwc_layer_size
)
796 return DRM_FORMAT_MOD_QCOM_COMPRESSED
;
798 /* TODO invent a modifier for tiled but not UBWC buffers: */
799 return DRM_FORMAT_MOD_INVALID
;
803 fd_resource_get_handle(struct pipe_screen
*pscreen
,
804 struct pipe_context
*pctx
,
805 struct pipe_resource
*prsc
,
806 struct winsys_handle
*handle
,
809 struct fd_resource
*rsc
= fd_resource(prsc
);
811 handle
->modifier
= fd_resource_modifier(rsc
);
813 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->scanout
,
814 fd_resource_pitch(rsc
, 0), handle
);
817 /* special case to resize query buf after allocated.. */
819 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
821 struct fd_resource
*rsc
= fd_resource(prsc
);
823 debug_assert(prsc
->width0
== 0);
824 debug_assert(prsc
->target
== PIPE_BUFFER
);
825 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
828 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
832 fd_resource_layout_init(struct pipe_resource
*prsc
)
834 struct fd_resource
*rsc
= fd_resource(prsc
);
835 struct fdl_layout
*layout
= &rsc
->layout
;
837 layout
->format
= prsc
->format
;
839 layout
->width0
= prsc
->width0
;
840 layout
->height0
= prsc
->height0
;
841 layout
->depth0
= prsc
->depth0
;
843 layout
->cpp
= util_format_get_blocksize(prsc
->format
);
844 layout
->cpp
*= fd_resource_nr_samples(prsc
);
845 layout
->cpp_shift
= ffs(layout
->cpp
) - 1;
849 * Helper that allocates a resource and resolves its layout (but doesn't
852 * It returns a pipe_resource (as fd_resource_create_with_modifiers()
853 * would do), and also bo's minimum required size as an output argument.
855 static struct pipe_resource
*
856 fd_resource_allocate_and_resolve(struct pipe_screen
*pscreen
,
857 const struct pipe_resource
*tmpl
,
858 const uint64_t *modifiers
, int count
, uint32_t *psize
)
860 struct fd_screen
*screen
= fd_screen(pscreen
);
861 struct fd_resource
*rsc
;
862 struct pipe_resource
*prsc
;
863 enum pipe_format format
= tmpl
->format
;
866 rsc
= CALLOC_STRUCT(fd_resource
);
869 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
870 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
871 tmpl
->target
, util_format_name(format
),
872 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
873 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
874 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
880 fd_resource_layout_init(prsc
);
883 (PIPE_BIND_SCANOUT | \
885 PIPE_BIND_DISPLAY_TARGET)
887 bool linear
= drm_find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
888 if (tmpl
->bind
& LINEAR
)
891 if (fd_mesa_debug
& FD_DBG_NOTILE
)
894 /* Normally, for non-shared buffers, allow buffer compression if
895 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
898 * TODO we should probably also limit tiled in a similar way,
899 * except we don't have a format modifier for tiled. (We probably
902 bool allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_INVALID
, modifiers
, count
);
903 if (tmpl
->bind
& PIPE_BIND_SHARED
)
904 allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED
, modifiers
, count
);
906 allow_ubwc
&= !(fd_mesa_debug
& FD_DBG_NOUBWC
);
908 pipe_reference_init(&prsc
->reference
, 1);
910 prsc
->screen
= pscreen
;
912 if (screen
->tile_mode
&&
913 (tmpl
->target
!= PIPE_BUFFER
) &&
915 rsc
->layout
.tile_mode
= screen
->tile_mode(prsc
);
918 util_range_init(&rsc
->valid_buffer_range
);
920 simple_mtx_init(&rsc
->lock
, mtx_plain
);
922 rsc
->internal_format
= format
;
924 rsc
->layout
.ubwc
= rsc
->layout
.tile_mode
&& is_a6xx(screen
) && allow_ubwc
;
926 if (prsc
->target
== PIPE_BUFFER
) {
927 assert(prsc
->format
== PIPE_FORMAT_R8_UNORM
);
929 fdl_layout_buffer(&rsc
->layout
, size
);
931 size
= screen
->setup_slices(rsc
);
934 /* special case for hw-query buffer, which we need to allocate before we
938 /* note, semi-intention == instead of & */
939 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
943 /* Set the layer size if the (non-a6xx) backend hasn't done so. */
944 if (rsc
->layout
.layer_first
&& !rsc
->layout
.layer_size
) {
945 rsc
->layout
.layer_size
= align(size
, 4096);
946 size
= rsc
->layout
.layer_size
* prsc
->array_size
;
949 if (fd_mesa_debug
& FD_DBG_LAYOUT
)
950 fdl_dump_layout(&rsc
->layout
);
952 /* Hand out the resolved size. */
960 * Create a new texture object, using the given template info.
962 static struct pipe_resource
*
963 fd_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
964 const struct pipe_resource
*tmpl
,
965 const uint64_t *modifiers
, int count
)
967 struct fd_screen
*screen
= fd_screen(pscreen
);
968 struct fd_resource
*rsc
;
969 struct pipe_resource
*prsc
;
972 /* when using kmsro, scanout buffers are allocated on the display device
973 * create_with_modifiers() doesn't give us usage flags, so we have to
974 * assume that all calls with modifiers are scanout-possible
977 ((tmpl
->bind
& PIPE_BIND_SCANOUT
) ||
978 !(count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
))) {
979 struct pipe_resource scanout_templat
= *tmpl
;
980 struct renderonly_scanout
*scanout
;
981 struct winsys_handle handle
;
983 /* note: alignment is wrong for a6xx */
984 scanout_templat
.width0
= align(tmpl
->width0
, screen
->gmem_alignw
);
986 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
987 screen
->ro
, &handle
);
991 renderonly_scanout_destroy(scanout
, screen
->ro
);
993 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
994 rsc
= fd_resource(pscreen
->resource_from_handle(pscreen
, tmpl
,
996 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
997 close(handle
.handle
);
1004 prsc
= fd_resource_allocate_and_resolve(pscreen
, tmpl
, modifiers
, count
, &size
);
1007 rsc
= fd_resource(prsc
);
1009 realloc_bo(rsc
, size
);
1015 fd_resource_destroy(pscreen
, prsc
);
1019 static struct pipe_resource
*
1020 fd_resource_create(struct pipe_screen
*pscreen
,
1021 const struct pipe_resource
*tmpl
)
1023 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
1024 return fd_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
1028 * Create a texture from a winsys_handle. The handle is often created in
1029 * another process by first creating a pipe texture and then calling
1030 * resource_get_handle.
1032 static struct pipe_resource
*
1033 fd_resource_from_handle(struct pipe_screen
*pscreen
,
1034 const struct pipe_resource
*tmpl
,
1035 struct winsys_handle
*handle
, unsigned usage
)
1037 struct fd_screen
*screen
= fd_screen(pscreen
);
1038 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
1039 struct fdl_slice
*slice
= fd_resource_slice(rsc
, 0);
1040 struct pipe_resource
*prsc
= &rsc
->base
;
1042 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1043 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1044 tmpl
->target
, util_format_name(tmpl
->format
),
1045 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
1046 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
1047 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
1053 fd_resource_layout_init(prsc
);
1055 pipe_reference_init(&prsc
->reference
, 1);
1057 prsc
->screen
= pscreen
;
1059 util_range_init(&rsc
->valid_buffer_range
);
1061 simple_mtx_init(&rsc
->lock
, mtx_plain
);
1063 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
1067 rsc
->internal_format
= tmpl
->format
;
1068 rsc
->layout
.pitch0
= handle
->stride
;
1069 slice
->offset
= handle
->offset
;
1070 slice
->size0
= handle
->stride
* prsc
->height0
;
1072 /* use a pitchalign of gmem_alignw pixels, because GMEM resolve for
1073 * lower alignments is not implemented (but possible for a6xx at least)
1075 * for UBWC-enabled resources, layout_resource_for_modifier will further
1076 * validate the pitch and set the right pitchalign
1078 rsc
->layout
.pitchalign
=
1079 fdl_cpp_shift(&rsc
->layout
) + util_logbase2(screen
->gmem_alignw
);
1081 /* apply the minimum pitchalign (note: actually 4 for a3xx but doesn't matter) */
1082 if (is_a6xx(screen
) || is_a5xx(screen
))
1083 rsc
->layout
.pitchalign
= MAX2(rsc
->layout
.pitchalign
, 6);
1085 rsc
->layout
.pitchalign
= MAX2(rsc
->layout
.pitchalign
, 5);
1087 if (rsc
->layout
.pitch0
< (prsc
->width0
* rsc
->layout
.cpp
) ||
1088 fd_resource_pitch(rsc
, 0) != rsc
->layout
.pitch0
)
1091 assert(rsc
->layout
.cpp
);
1093 if (screen
->layout_resource_for_modifier(rsc
, handle
->modifier
) < 0)
1098 renderonly_create_gpu_import_for_resource(prsc
, screen
->ro
, NULL
);
1099 /* failure is expected in some cases.. */
1107 fd_resource_destroy(pscreen
, prsc
);
1112 fd_render_condition_check(struct pipe_context
*pctx
)
1114 struct fd_context
*ctx
= fd_context(pctx
);
1116 if (!ctx
->cond_query
)
1119 union pipe_query_result res
= { 0 };
1121 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1122 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1124 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1125 return (bool)res
.u64
!= ctx
->cond_cond
;
1131 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1133 struct fd_context
*ctx
= fd_context(pctx
);
1134 struct fd_resource
*rsc
= fd_resource(prsc
);
1137 * TODO I guess we could track that the resource is invalidated and
1138 * use that as a hint to realloc rather than stall in _transfer_map(),
1139 * even in the non-DISCARD_WHOLE_RESOURCE case?
1141 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1144 if (rsc
->write_batch
) {
1145 struct fd_batch
*batch
= rsc
->write_batch
;
1146 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1148 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
) {
1149 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1150 ctx
->dirty
|= FD_DIRTY_ZSA
;
1153 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1154 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1155 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1156 ctx
->dirty
|= FD_DIRTY_FRAMEBUFFER
;
1164 static enum pipe_format
1165 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1167 return fd_resource(prsc
)->internal_format
;
1171 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1172 struct pipe_resource
*stencil
)
1174 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1177 static struct pipe_resource
*
1178 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1180 struct fd_resource
*rsc
= fd_resource(prsc
);
1182 return &rsc
->stencil
->base
;
1186 static const struct u_transfer_vtbl transfer_vtbl
= {
1187 .resource_create
= fd_resource_create
,
1188 .resource_destroy
= fd_resource_destroy
,
1189 .transfer_map
= fd_resource_transfer_map
,
1190 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1191 .transfer_unmap
= fd_resource_transfer_unmap
,
1192 .get_internal_format
= fd_resource_get_internal_format
,
1193 .set_stencil
= fd_resource_set_stencil
,
1194 .get_stencil
= fd_resource_get_stencil
,
1197 static const uint64_t supported_modifiers
[] = {
1198 DRM_FORMAT_MOD_LINEAR
,
1202 fd_layout_resource_for_modifier(struct fd_resource
*rsc
, uint64_t modifier
)
1205 case DRM_FORMAT_MOD_LINEAR
:
1206 /* The dri gallium frontend will pass DRM_FORMAT_MOD_INVALID to us
1207 * when it's called through any of the non-modifier BO create entry
1208 * points. Other drivers will determine tiling from the kernel or
1209 * other legacy backchannels, but for freedreno it just means
1211 case DRM_FORMAT_MOD_INVALID
:
1218 static struct pipe_resource
*
1219 fd_resource_from_memobj(struct pipe_screen
*pscreen
,
1220 const struct pipe_resource
*tmpl
,
1221 struct pipe_memory_object
*pmemobj
,
1224 struct fd_screen
*screen
= fd_screen(pscreen
);
1225 struct fd_memory_object
*memobj
= fd_memory_object(pmemobj
);
1226 struct pipe_resource
*prsc
;
1227 struct fd_resource
*rsc
;
1231 /* We shouldn't get a scanout buffer here. */
1232 assert(!(tmpl
->bind
& PIPE_BIND_SCANOUT
));
1234 uint64_t modifiers
= DRM_FORMAT_MOD_INVALID
;
1235 if (tmpl
->bind
& PIPE_BIND_LINEAR
) {
1236 modifiers
= DRM_FORMAT_MOD_LINEAR
;
1237 } else if (is_a6xx(screen
) && tmpl
->width0
>= FDL_MIN_UBWC_WIDTH
) {
1238 modifiers
= DRM_FORMAT_MOD_QCOM_COMPRESSED
;
1241 /* Allocate new pipe resource. */
1242 prsc
= fd_resource_allocate_and_resolve(pscreen
, tmpl
, &modifiers
, 1, &size
);
1245 rsc
= fd_resource(prsc
);
1247 /* bo's size has to be large enough, otherwise cleanup resource and fail
1250 if (fd_bo_size(memobj
->bo
) < size
) {
1251 fd_resource_destroy(pscreen
, prsc
);
1255 /* Share the bo with the memory object. */
1256 rsc
->bo
= fd_bo_ref(memobj
->bo
);
1261 static struct pipe_memory_object
*
1262 fd_memobj_create_from_handle(struct pipe_screen
*pscreen
,
1263 struct winsys_handle
*whandle
,
1266 struct fd_memory_object
*memobj
= CALLOC_STRUCT(fd_memory_object
);
1270 struct fd_bo
*bo
= fd_screen_bo_from_handle(pscreen
, whandle
);
1276 memobj
->b
.dedicated
= dedicated
;
1283 fd_memobj_destroy(struct pipe_screen
*pscreen
,
1284 struct pipe_memory_object
*pmemobj
)
1286 struct fd_memory_object
*memobj
= fd_memory_object(pmemobj
);
1289 fd_bo_del(memobj
->bo
);
1295 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1297 struct fd_screen
*screen
= fd_screen(pscreen
);
1298 bool fake_rgtc
= screen
->gpu_id
< 400;
1300 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1301 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1304 pscreen
->resource_create_with_modifiers
= fd_resource_create_with_modifiers
;
1305 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1306 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1307 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1309 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1310 true, false, fake_rgtc
, true);
1312 if (!screen
->layout_resource_for_modifier
)
1313 screen
->layout_resource_for_modifier
= fd_layout_resource_for_modifier
;
1314 if (!screen
->supported_modifiers
) {
1315 screen
->supported_modifiers
= supported_modifiers
;
1316 screen
->num_supported_modifiers
= ARRAY_SIZE(supported_modifiers
);
1319 /* GL_EXT_memory_object */
1320 pscreen
->memobj_create_from_handle
= fd_memobj_create_from_handle
;
1321 pscreen
->memobj_destroy
= fd_memobj_destroy
;
1322 pscreen
->resource_from_memobj
= fd_resource_from_memobj
;
1326 fd_get_sample_position(struct pipe_context
*context
,
1327 unsigned sample_count
, unsigned sample_index
,
1330 /* The following is copied from nouveau/nv50 except for position
1331 * values, which are taken from blob driver */
1332 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1333 static const uint8_t pos2
[2][2] = {
1334 { 0xc, 0xc }, { 0x4, 0x4 } };
1335 static const uint8_t pos4
[4][2] = {
1336 { 0x6, 0x2 }, { 0xe, 0x6 },
1337 { 0x2, 0xa }, { 0xa, 0xe } };
1338 /* TODO needs to be verified on supported hw */
1339 static const uint8_t pos8
[8][2] = {
1340 { 0x9, 0x5 }, { 0x7, 0xb },
1341 { 0xd, 0x9 }, { 0x5, 0x3 },
1342 { 0x3, 0xd }, { 0x1, 0x7 },
1343 { 0xb, 0xf }, { 0xf, 0x1 } };
1345 const uint8_t (*ptr
)[2];
1347 switch (sample_count
) {
1365 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1366 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1370 fd_blit_pipe(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1372 /* wrap fd_blit to return void */
1373 fd_blit(pctx
, blit_info
);
1377 fd_resource_context_init(struct pipe_context
*pctx
)
1379 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1380 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1381 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1382 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1383 pctx
->texture_subdata
= u_default_texture_subdata
;
1384 pctx
->create_surface
= fd_create_surface
;
1385 pctx
->surface_destroy
= fd_surface_destroy
;
1386 pctx
->resource_copy_region
= fd_resource_copy_region
;
1387 pctx
->blit
= fd_blit_pipe
;
1388 pctx
->flush_resource
= fd_flush_resource
;
1389 pctx
->invalidate_resource
= fd_invalidate_resource
;
1390 pctx
->get_sample_position
= fd_get_sample_position
;