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freedreno: swap UBWC state in shadow path
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.c
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "util/u_format.h"
28 #include "util/u_format_rgtc.h"
29 #include "util/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
34 #include "util/set.h"
35 #include "util/u_drm.h"
36
37 #include "freedreno_resource.h"
38 #include "freedreno_batch_cache.h"
39 #include "freedreno_blitter.h"
40 #include "freedreno_fence.h"
41 #include "freedreno_screen.h"
42 #include "freedreno_surface.h"
43 #include "freedreno_context.h"
44 #include "freedreno_query_hw.h"
45 #include "freedreno_util.h"
46
47 #include "drm-uapi/drm_fourcc.h"
48 #include <errno.h>
49
50 /* XXX this should go away, needed for 'struct winsys_handle' */
51 #include "state_tracker/drm_driver.h"
52
53 /**
54 * Go through the entire state and see if the resource is bound
55 * anywhere. If it is, mark the relevant state as dirty. This is
56 * called on realloc_bo to ensure the neccessary state is re-
57 * emitted so the GPU looks at the new backing bo.
58 */
59 static void
60 rebind_resource(struct fd_context *ctx, struct pipe_resource *prsc)
61 {
62 /* VBOs */
63 for (unsigned i = 0; i < ctx->vtx.vertexbuf.count && !(ctx->dirty & FD_DIRTY_VTXBUF); i++) {
64 if (ctx->vtx.vertexbuf.vb[i].buffer.resource == prsc)
65 ctx->dirty |= FD_DIRTY_VTXBUF;
66 }
67
68 /* per-shader-stage resources: */
69 for (unsigned stage = 0; stage < PIPE_SHADER_TYPES; stage++) {
70 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
71 * cmdstream rather than by pointer..
72 */
73 const unsigned num_ubos = util_last_bit(ctx->constbuf[stage].enabled_mask);
74 for (unsigned i = 1; i < num_ubos; i++) {
75 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_CONST)
76 break;
77 if (ctx->constbuf[stage].cb[i].buffer == prsc)
78 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_CONST;
79 }
80
81 /* Textures */
82 for (unsigned i = 0; i < ctx->tex[stage].num_textures; i++) {
83 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_TEX)
84 break;
85 if (ctx->tex[stage].textures[i] && (ctx->tex[stage].textures[i]->texture == prsc))
86 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_TEX;
87 }
88
89 /* SSBOs */
90 const unsigned num_ssbos = util_last_bit(ctx->shaderbuf[stage].enabled_mask);
91 for (unsigned i = 0; i < num_ssbos; i++) {
92 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_SSBO)
93 break;
94 if (ctx->shaderbuf[stage].sb[i].buffer == prsc)
95 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_SSBO;
96 }
97 }
98 }
99
100 static void
101 realloc_bo(struct fd_resource *rsc, uint32_t size)
102 {
103 struct pipe_resource *prsc = &rsc->base;
104 struct fd_screen *screen = fd_screen(rsc->base.screen);
105 uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
106 DRM_FREEDRENO_GEM_TYPE_KMEM |
107 COND(prsc->bind & PIPE_BIND_SCANOUT, DRM_FREEDRENO_GEM_SCANOUT);
108 /* TODO other flags? */
109
110 /* if we start using things other than write-combine,
111 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
112 */
113
114 if (rsc->bo)
115 fd_bo_del(rsc->bo);
116
117 rsc->bo = fd_bo_new(screen->dev, size, flags, "%ux%ux%u@%u:%x",
118 prsc->width0, prsc->height0, prsc->depth0, rsc->cpp, prsc->bind);
119 rsc->seqno = p_atomic_inc_return(&screen->rsc_seqno);
120 util_range_set_empty(&rsc->valid_buffer_range);
121 fd_bc_invalidate_resource(rsc, true);
122 }
123
124 static void
125 do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit, bool fallback)
126 {
127 struct pipe_context *pctx = &ctx->base;
128
129 /* TODO size threshold too?? */
130 if (fallback || !fd_blit(pctx, blit)) {
131 /* do blit on cpu: */
132 util_resource_copy_region(pctx,
133 blit->dst.resource, blit->dst.level, blit->dst.box.x,
134 blit->dst.box.y, blit->dst.box.z,
135 blit->src.resource, blit->src.level, &blit->src.box);
136 }
137 }
138
139 static bool
140 fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
141 unsigned level, const struct pipe_box *box, uint64_t modifier)
142 {
143 struct pipe_context *pctx = &ctx->base;
144 struct pipe_resource *prsc = &rsc->base;
145 bool fallback = false;
146
147 if (prsc->next)
148 return false;
149
150 /* TODO: somehow munge dimensions and format to copy unsupported
151 * render target format to something that is supported?
152 */
153 if (!pctx->screen->is_format_supported(pctx->screen,
154 prsc->format, prsc->target, prsc->nr_samples,
155 prsc->nr_storage_samples,
156 PIPE_BIND_RENDER_TARGET))
157 fallback = true;
158
159 /* do shadowing back-blits on the cpu for buffers: */
160 if (prsc->target == PIPE_BUFFER)
161 fallback = true;
162
163 bool whole_level = util_texrange_covers_whole_level(prsc, level,
164 box->x, box->y, box->z, box->width, box->height, box->depth);
165
166 /* TODO need to be more clever about current level */
167 if ((prsc->target >= PIPE_TEXTURE_2D) && !whole_level)
168 return false;
169
170 struct pipe_resource *pshadow =
171 pctx->screen->resource_create_with_modifiers(pctx->screen,
172 prsc, &modifier, 1);
173
174 if (!pshadow)
175 return false;
176
177 assert(!ctx->in_shadow);
178 ctx->in_shadow = true;
179
180 /* get rid of any references that batch-cache might have to us (which
181 * should empty/destroy rsc->batches hashset)
182 */
183 fd_bc_invalidate_resource(rsc, false);
184
185 mtx_lock(&ctx->screen->lock);
186
187 /* Swap the backing bo's, so shadow becomes the old buffer,
188 * blit from shadow to new buffer. From here on out, we
189 * cannot fail.
190 *
191 * Note that we need to do it in this order, otherwise if
192 * we go down cpu blit path, the recursive transfer_map()
193 * sees the wrong status..
194 */
195 struct fd_resource *shadow = fd_resource(pshadow);
196
197 DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.reference.count,
198 shadow, shadow->base.reference.count);
199
200 /* TODO valid_buffer_range?? */
201 swap(rsc->bo, shadow->bo);
202 swap(rsc->write_batch, shadow->write_batch);
203 swap(rsc->offset, shadow->offset);
204 swap(rsc->ubwc_offset, shadow->ubwc_offset);
205 swap(rsc->ubwc_pitch, shadow->ubwc_pitch);
206 swap(rsc->ubwc_size, shadow->ubwc_size);
207 rsc->seqno = p_atomic_inc_return(&ctx->screen->rsc_seqno);
208
209 /* at this point, the newly created shadow buffer is not referenced
210 * by any batches, but the existing rsc (probably) is. We need to
211 * transfer those references over:
212 */
213 debug_assert(shadow->batch_mask == 0);
214 struct fd_batch *batch;
215 foreach_batch(batch, &ctx->screen->batch_cache, rsc->batch_mask) {
216 struct set_entry *entry = _mesa_set_search(batch->resources, rsc);
217 _mesa_set_remove(batch->resources, entry);
218 _mesa_set_add(batch->resources, shadow);
219 }
220 swap(rsc->batch_mask, shadow->batch_mask);
221
222 mtx_unlock(&ctx->screen->lock);
223
224 struct pipe_blit_info blit = {};
225 blit.dst.resource = prsc;
226 blit.dst.format = prsc->format;
227 blit.src.resource = pshadow;
228 blit.src.format = pshadow->format;
229 blit.mask = util_format_get_mask(prsc->format);
230 blit.filter = PIPE_TEX_FILTER_NEAREST;
231
232 #define set_box(field, val) do { \
233 blit.dst.field = (val); \
234 blit.src.field = (val); \
235 } while (0)
236
237 /* blit the other levels in their entirety: */
238 for (unsigned l = 0; l <= prsc->last_level; l++) {
239 if (l == level)
240 continue;
241
242 /* just blit whole level: */
243 set_box(level, l);
244 set_box(box.width, u_minify(prsc->width0, l));
245 set_box(box.height, u_minify(prsc->height0, l));
246 set_box(box.depth, u_minify(prsc->depth0, l));
247
248 do_blit(ctx, &blit, fallback);
249 }
250
251 /* deal w/ current level specially, since we might need to split
252 * it up into a couple blits:
253 */
254 if (!whole_level) {
255 set_box(level, level);
256
257 switch (prsc->target) {
258 case PIPE_BUFFER:
259 case PIPE_TEXTURE_1D:
260 set_box(box.y, 0);
261 set_box(box.z, 0);
262 set_box(box.height, 1);
263 set_box(box.depth, 1);
264
265 if (box->x > 0) {
266 set_box(box.x, 0);
267 set_box(box.width, box->x);
268
269 do_blit(ctx, &blit, fallback);
270 }
271 if ((box->x + box->width) < u_minify(prsc->width0, level)) {
272 set_box(box.x, box->x + box->width);
273 set_box(box.width, u_minify(prsc->width0, level) - (box->x + box->width));
274
275 do_blit(ctx, &blit, fallback);
276 }
277 break;
278 case PIPE_TEXTURE_2D:
279 /* TODO */
280 default:
281 unreachable("TODO");
282 }
283 }
284
285 ctx->in_shadow = false;
286
287 pipe_resource_reference(&pshadow, NULL);
288
289 return true;
290 }
291
292 static struct fd_resource *
293 fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
294 unsigned level, const struct pipe_box *box)
295 {
296 struct pipe_context *pctx = &ctx->base;
297 struct pipe_resource tmpl = rsc->base;
298
299 tmpl.width0 = box->width;
300 tmpl.height0 = box->height;
301 /* for array textures, box->depth is the array_size, otherwise
302 * for 3d textures, it is the depth:
303 */
304 if (tmpl.array_size > 1) {
305 tmpl.array_size = box->depth;
306 tmpl.depth0 = 1;
307 } else {
308 tmpl.array_size = 1;
309 tmpl.depth0 = box->depth;
310 }
311 tmpl.last_level = 0;
312 tmpl.bind |= PIPE_BIND_LINEAR;
313
314 struct pipe_resource *pstaging =
315 pctx->screen->resource_create(pctx->screen, &tmpl);
316 if (!pstaging)
317 return NULL;
318
319 return fd_resource(pstaging);
320 }
321
322 static void
323 fd_blit_from_staging(struct fd_context *ctx, struct fd_transfer *trans)
324 {
325 struct pipe_resource *dst = trans->base.resource;
326 struct pipe_blit_info blit = {};
327
328 blit.dst.resource = dst;
329 blit.dst.format = dst->format;
330 blit.dst.level = trans->base.level;
331 blit.dst.box = trans->base.box;
332 blit.src.resource = trans->staging_prsc;
333 blit.src.format = trans->staging_prsc->format;
334 blit.src.level = 0;
335 blit.src.box = trans->staging_box;
336 blit.mask = util_format_get_mask(trans->staging_prsc->format);
337 blit.filter = PIPE_TEX_FILTER_NEAREST;
338
339 do_blit(ctx, &blit, false);
340 }
341
342 static void
343 fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans)
344 {
345 struct pipe_resource *src = trans->base.resource;
346 struct pipe_blit_info blit = {};
347
348 blit.src.resource = src;
349 blit.src.format = src->format;
350 blit.src.level = trans->base.level;
351 blit.src.box = trans->base.box;
352 blit.dst.resource = trans->staging_prsc;
353 blit.dst.format = trans->staging_prsc->format;
354 blit.dst.level = 0;
355 blit.dst.box = trans->staging_box;
356 blit.mask = util_format_get_mask(trans->staging_prsc->format);
357 blit.filter = PIPE_TEX_FILTER_NEAREST;
358
359 do_blit(ctx, &blit, false);
360 }
361
362 static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
363 struct pipe_transfer *ptrans,
364 const struct pipe_box *box)
365 {
366 struct fd_resource *rsc = fd_resource(ptrans->resource);
367
368 if (ptrans->resource->target == PIPE_BUFFER)
369 util_range_add(&rsc->valid_buffer_range,
370 ptrans->box.x + box->x,
371 ptrans->box.x + box->x + box->width);
372 }
373
374 static void
375 flush_resource(struct fd_context *ctx, struct fd_resource *rsc, unsigned usage)
376 {
377 struct fd_batch *write_batch = NULL;
378
379 mtx_lock(&ctx->screen->lock);
380 fd_batch_reference_locked(&write_batch, rsc->write_batch);
381 mtx_unlock(&ctx->screen->lock);
382
383 if (usage & PIPE_TRANSFER_WRITE) {
384 struct fd_batch *batch, *batches[32] = {};
385 uint32_t batch_mask;
386
387 /* This is a bit awkward, probably a fd_batch_flush_locked()
388 * would make things simpler.. but we need to hold the lock
389 * to iterate the batches which reference this resource. So
390 * we must first grab references under a lock, then flush.
391 */
392 mtx_lock(&ctx->screen->lock);
393 batch_mask = rsc->batch_mask;
394 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
395 fd_batch_reference_locked(&batches[batch->idx], batch);
396 mtx_unlock(&ctx->screen->lock);
397
398 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
399 fd_batch_flush(batch, false, false);
400
401 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask) {
402 fd_batch_sync(batch);
403 fd_batch_reference(&batches[batch->idx], NULL);
404 }
405 assert(rsc->batch_mask == 0);
406 } else if (write_batch) {
407 fd_batch_flush(write_batch, true, false);
408 }
409
410 fd_batch_reference(&write_batch, NULL);
411
412 assert(!rsc->write_batch);
413 }
414
415 static void
416 fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
417 {
418 flush_resource(fd_context(pctx), fd_resource(prsc), PIPE_TRANSFER_READ);
419 }
420
421 static void
422 fd_resource_transfer_unmap(struct pipe_context *pctx,
423 struct pipe_transfer *ptrans)
424 {
425 struct fd_context *ctx = fd_context(pctx);
426 struct fd_resource *rsc = fd_resource(ptrans->resource);
427 struct fd_transfer *trans = fd_transfer(ptrans);
428
429 if (trans->staging_prsc) {
430 if (ptrans->usage & PIPE_TRANSFER_WRITE)
431 fd_blit_from_staging(ctx, trans);
432 pipe_resource_reference(&trans->staging_prsc, NULL);
433 }
434
435 if (!(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
436 fd_bo_cpu_fini(rsc->bo);
437 }
438
439 util_range_add(&rsc->valid_buffer_range,
440 ptrans->box.x,
441 ptrans->box.x + ptrans->box.width);
442
443 pipe_resource_reference(&ptrans->resource, NULL);
444 slab_free(&ctx->transfer_pool, ptrans);
445 }
446
447 static void *
448 fd_resource_transfer_map(struct pipe_context *pctx,
449 struct pipe_resource *prsc,
450 unsigned level, unsigned usage,
451 const struct pipe_box *box,
452 struct pipe_transfer **pptrans)
453 {
454 struct fd_context *ctx = fd_context(pctx);
455 struct fd_resource *rsc = fd_resource(prsc);
456 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
457 struct fd_transfer *trans;
458 struct pipe_transfer *ptrans;
459 enum pipe_format format = prsc->format;
460 uint32_t op = 0;
461 uint32_t offset;
462 char *buf;
463 int ret = 0;
464
465 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
466 box->width, box->height, box->x, box->y);
467
468 ptrans = slab_alloc(&ctx->transfer_pool);
469 if (!ptrans)
470 return NULL;
471
472 /* slab_alloc_st() doesn't zero: */
473 trans = fd_transfer(ptrans);
474 memset(trans, 0, sizeof(*trans));
475
476 pipe_resource_reference(&ptrans->resource, prsc);
477 ptrans->level = level;
478 ptrans->usage = usage;
479 ptrans->box = *box;
480 ptrans->stride = util_format_get_nblocksx(format, slice->pitch) * rsc->cpp;
481 ptrans->layer_stride = rsc->layer_first ? rsc->layer_size : slice->size0;
482
483 /* we always need a staging texture for tiled buffers:
484 *
485 * TODO we might sometimes want to *also* shadow the resource to avoid
486 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
487 * texture.
488 */
489 if (rsc->tile_mode) {
490 struct fd_resource *staging_rsc;
491
492 staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
493 if (staging_rsc) {
494 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
495 trans->staging_prsc = &staging_rsc->base;
496 trans->base.stride = util_format_get_nblocksx(format,
497 staging_rsc->slices[0].pitch) * staging_rsc->cpp;
498 trans->base.layer_stride = staging_rsc->layer_first ?
499 staging_rsc->layer_size : staging_rsc->slices[0].size0;
500 trans->staging_box = *box;
501 trans->staging_box.x = 0;
502 trans->staging_box.y = 0;
503 trans->staging_box.z = 0;
504
505 if (usage & PIPE_TRANSFER_READ) {
506 fd_blit_to_staging(ctx, trans);
507
508 struct fd_batch *batch = NULL;
509
510 fd_context_lock(ctx);
511 fd_batch_reference_locked(&batch, staging_rsc->write_batch);
512 fd_context_unlock(ctx);
513
514 /* we can't fd_bo_cpu_prep() until the blit to staging
515 * is submitted to kernel.. in that case write_batch
516 * wouldn't be NULL yet:
517 */
518 if (batch) {
519 fd_batch_sync(batch);
520 fd_batch_reference(&batch, NULL);
521 }
522
523 fd_bo_cpu_prep(staging_rsc->bo, ctx->pipe,
524 DRM_FREEDRENO_PREP_READ);
525 }
526
527 buf = fd_bo_map(staging_rsc->bo);
528 offset = 0;
529
530 *pptrans = ptrans;
531
532 ctx->stats.staging_uploads++;
533
534 return buf;
535 }
536 }
537
538 if (ctx->in_shadow && !(usage & PIPE_TRANSFER_READ))
539 usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
540
541 if (usage & PIPE_TRANSFER_READ)
542 op |= DRM_FREEDRENO_PREP_READ;
543
544 if (usage & PIPE_TRANSFER_WRITE)
545 op |= DRM_FREEDRENO_PREP_WRITE;
546
547 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
548 realloc_bo(rsc, fd_bo_size(rsc->bo));
549 rebind_resource(ctx, prsc);
550 } else if ((usage & PIPE_TRANSFER_WRITE) &&
551 prsc->target == PIPE_BUFFER &&
552 !util_ranges_intersect(&rsc->valid_buffer_range,
553 box->x, box->x + box->width)) {
554 /* We are trying to write to a previously uninitialized range. No need
555 * to wait.
556 */
557 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
558 struct fd_batch *write_batch = NULL;
559
560 /* hold a reference, so it doesn't disappear under us: */
561 fd_context_lock(ctx);
562 fd_batch_reference_locked(&write_batch, rsc->write_batch);
563 fd_context_unlock(ctx);
564
565 if ((usage & PIPE_TRANSFER_WRITE) && write_batch &&
566 write_batch->back_blit) {
567 /* if only thing pending is a back-blit, we can discard it: */
568 fd_batch_reset(write_batch);
569 }
570
571 /* If the GPU is writing to the resource, or if it is reading from the
572 * resource and we're trying to write to it, flush the renders.
573 */
574 bool needs_flush = pending(rsc, !!(usage & PIPE_TRANSFER_WRITE));
575 bool busy = needs_flush || (0 != fd_bo_cpu_prep(rsc->bo,
576 ctx->pipe, op | DRM_FREEDRENO_PREP_NOSYNC));
577
578 /* if we need to flush/stall, see if we can make a shadow buffer
579 * to avoid this:
580 *
581 * TODO we could go down this path !reorder && !busy_for_read
582 * ie. we only *don't* want to go down this path if the blit
583 * will trigger a flush!
584 */
585 if (ctx->screen->reorder && busy && !(usage & PIPE_TRANSFER_READ) &&
586 (usage & PIPE_TRANSFER_DISCARD_RANGE)) {
587 /* try shadowing only if it avoids a flush, otherwise staging would
588 * be better:
589 */
590 if (needs_flush && fd_try_shadow_resource(ctx, rsc, level,
591 box, DRM_FORMAT_MOD_LINEAR)) {
592 needs_flush = busy = false;
593 rebind_resource(ctx, prsc);
594 ctx->stats.shadow_uploads++;
595 } else {
596 struct fd_resource *staging_rsc;
597
598 if (needs_flush) {
599 flush_resource(ctx, rsc, usage);
600 needs_flush = false;
601 }
602
603 /* in this case, we don't need to shadow the whole resource,
604 * since any draw that references the previous contents has
605 * already had rendering flushed for all tiles. So we can
606 * use a staging buffer to do the upload.
607 */
608 staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
609 if (staging_rsc) {
610 trans->staging_prsc = &staging_rsc->base;
611 trans->base.stride = util_format_get_nblocksx(format,
612 staging_rsc->slices[0].pitch) * staging_rsc->cpp;
613 trans->base.layer_stride = staging_rsc->layer_first ?
614 staging_rsc->layer_size : staging_rsc->slices[0].size0;
615 trans->staging_box = *box;
616 trans->staging_box.x = 0;
617 trans->staging_box.y = 0;
618 trans->staging_box.z = 0;
619 buf = fd_bo_map(staging_rsc->bo);
620 offset = 0;
621
622 *pptrans = ptrans;
623
624 fd_batch_reference(&write_batch, NULL);
625
626 ctx->stats.staging_uploads++;
627
628 return buf;
629 }
630 }
631 }
632
633 if (needs_flush) {
634 flush_resource(ctx, rsc, usage);
635 needs_flush = false;
636 }
637
638 fd_batch_reference(&write_batch, NULL);
639
640 /* The GPU keeps track of how the various bo's are being used, and
641 * will wait if necessary for the proper operation to have
642 * completed.
643 */
644 if (busy) {
645 ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
646 if (ret)
647 goto fail;
648 }
649 }
650
651 buf = fd_bo_map(rsc->bo);
652 offset =
653 box->y / util_format_get_blockheight(format) * ptrans->stride +
654 box->x / util_format_get_blockwidth(format) * rsc->cpp +
655 fd_resource_offset(rsc, level, box->z);
656
657 if (usage & PIPE_TRANSFER_WRITE)
658 rsc->valid = true;
659
660 *pptrans = ptrans;
661
662 return buf + offset;
663
664 fail:
665 fd_resource_transfer_unmap(pctx, ptrans);
666 return NULL;
667 }
668
669 static void
670 fd_resource_destroy(struct pipe_screen *pscreen,
671 struct pipe_resource *prsc)
672 {
673 struct fd_resource *rsc = fd_resource(prsc);
674 fd_bc_invalidate_resource(rsc, true);
675 if (rsc->bo)
676 fd_bo_del(rsc->bo);
677 if (rsc->scanout)
678 renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
679
680 util_range_destroy(&rsc->valid_buffer_range);
681 FREE(rsc);
682 }
683
684 static uint64_t
685 fd_resource_modifier(struct fd_resource *rsc)
686 {
687 if (!rsc->tile_mode)
688 return DRM_FORMAT_MOD_LINEAR;
689
690 if (rsc->ubwc_size)
691 return DRM_FORMAT_MOD_QCOM_COMPRESSED;
692
693 /* TODO invent a modifier for tiled but not UBWC buffers: */
694 return DRM_FORMAT_MOD_INVALID;
695 }
696
697 static boolean
698 fd_resource_get_handle(struct pipe_screen *pscreen,
699 struct pipe_context *pctx,
700 struct pipe_resource *prsc,
701 struct winsys_handle *handle,
702 unsigned usage)
703 {
704 struct fd_resource *rsc = fd_resource(prsc);
705
706 handle->modifier = fd_resource_modifier(rsc);
707
708 return fd_screen_bo_get_handle(pscreen, rsc->bo, rsc->scanout,
709 rsc->slices[0].pitch * rsc->cpp, handle);
710 }
711
712 static uint32_t
713 setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
714 {
715 struct pipe_resource *prsc = &rsc->base;
716 struct fd_screen *screen = fd_screen(prsc->screen);
717 enum util_format_layout layout = util_format_description(format)->layout;
718 uint32_t pitchalign = screen->gmem_alignw;
719 uint32_t level, size = 0;
720 uint32_t width = prsc->width0;
721 uint32_t height = prsc->height0;
722 uint32_t depth = prsc->depth0;
723 /* in layer_first layout, the level (slice) contains just one
724 * layer (since in fact the layer contains the slices)
725 */
726 uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
727
728 for (level = 0; level <= prsc->last_level; level++) {
729 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
730 uint32_t blocks;
731
732 if (layout == UTIL_FORMAT_LAYOUT_ASTC)
733 slice->pitch = width =
734 util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
735 else
736 slice->pitch = width = align(width, pitchalign);
737 slice->offset = size;
738 blocks = util_format_get_nblocks(format, width, height);
739 /* 1d array and 2d array textures must all have the same layer size
740 * for each miplevel on a3xx. 3d textures can have different layer
741 * sizes for high levels, but the hw auto-sizer is buggy (or at least
742 * different than what this code does), so as soon as the layer size
743 * range gets into range, we stop reducing it.
744 */
745 if (prsc->target == PIPE_TEXTURE_3D && (
746 level == 1 ||
747 (level > 1 && rsc->slices[level - 1].size0 > 0xf000)))
748 slice->size0 = align(blocks * rsc->cpp, alignment);
749 else if (level == 0 || rsc->layer_first || alignment == 1)
750 slice->size0 = align(blocks * rsc->cpp, alignment);
751 else
752 slice->size0 = rsc->slices[level - 1].size0;
753
754 size += slice->size0 * depth * layers_in_level;
755
756 width = u_minify(width, 1);
757 height = u_minify(height, 1);
758 depth = u_minify(depth, 1);
759 }
760
761 return size;
762 }
763
764 static uint32_t
765 slice_alignment(enum pipe_texture_target target)
766 {
767 /* on a3xx, 2d array and 3d textures seem to want their
768 * layers aligned to page boundaries:
769 */
770 switch (target) {
771 case PIPE_TEXTURE_3D:
772 case PIPE_TEXTURE_1D_ARRAY:
773 case PIPE_TEXTURE_2D_ARRAY:
774 return 4096;
775 default:
776 return 1;
777 }
778 }
779
780 /* cross generation texture layout to plug in to screen->setup_slices()..
781 * replace with generation specific one as-needed.
782 *
783 * TODO for a4xx probably can extract out the a4xx specific logic int
784 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
785 * calls this.
786 */
787 uint32_t
788 fd_setup_slices(struct fd_resource *rsc)
789 {
790 uint32_t alignment;
791
792 alignment = slice_alignment(rsc->base.target);
793
794 struct fd_screen *screen = fd_screen(rsc->base.screen);
795 if (is_a4xx(screen)) {
796 switch (rsc->base.target) {
797 case PIPE_TEXTURE_3D:
798 rsc->layer_first = false;
799 break;
800 default:
801 rsc->layer_first = true;
802 alignment = 1;
803 break;
804 }
805 }
806
807 return setup_slices(rsc, alignment, rsc->base.format);
808 }
809
810 /* special case to resize query buf after allocated.. */
811 void
812 fd_resource_resize(struct pipe_resource *prsc, uint32_t sz)
813 {
814 struct fd_resource *rsc = fd_resource(prsc);
815
816 debug_assert(prsc->width0 == 0);
817 debug_assert(prsc->target == PIPE_BUFFER);
818 debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
819
820 prsc->width0 = sz;
821 realloc_bo(rsc, fd_screen(prsc->screen)->setup_slices(rsc));
822 }
823
824 // TODO common helper?
825 static bool
826 has_depth(enum pipe_format format)
827 {
828 switch (format) {
829 case PIPE_FORMAT_Z16_UNORM:
830 case PIPE_FORMAT_Z32_UNORM:
831 case PIPE_FORMAT_Z32_FLOAT:
832 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
833 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
834 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
835 case PIPE_FORMAT_Z24X8_UNORM:
836 case PIPE_FORMAT_X8Z24_UNORM:
837 return true;
838 default:
839 return false;
840 }
841 }
842
843 /**
844 * Create a new texture object, using the given template info.
845 */
846 static struct pipe_resource *
847 fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
848 const struct pipe_resource *tmpl,
849 const uint64_t *modifiers, int count)
850 {
851 struct fd_screen *screen = fd_screen(pscreen);
852 struct fd_resource *rsc;
853 struct pipe_resource *prsc;
854 enum pipe_format format = tmpl->format;
855 uint32_t size;
856
857 /* when using kmsro, scanout buffers are allocated on the display device
858 * create_with_modifiers() doesn't give us usage flags, so we have to
859 * assume that all calls with modifiers are scanout-possible
860 */
861 if (screen->ro &&
862 ((tmpl->bind & PIPE_BIND_SCANOUT) ||
863 !(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID))) {
864 struct pipe_resource scanout_templat = *tmpl;
865 struct renderonly_scanout *scanout;
866 struct winsys_handle handle;
867
868 scanout = renderonly_scanout_for_resource(&scanout_templat,
869 screen->ro, &handle);
870 if (!scanout)
871 return NULL;
872
873 renderonly_scanout_destroy(scanout, screen->ro);
874
875 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
876 rsc = fd_resource(pscreen->resource_from_handle(pscreen, tmpl,
877 &handle,
878 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
879 close(handle.handle);
880 if (!rsc)
881 return NULL;
882
883 return &rsc->base;
884 }
885
886 rsc = CALLOC_STRUCT(fd_resource);
887 prsc = &rsc->base;
888
889 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
890 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc,
891 tmpl->target, util_format_name(format),
892 tmpl->width0, tmpl->height0, tmpl->depth0,
893 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
894 tmpl->usage, tmpl->bind, tmpl->flags);
895
896 if (!rsc)
897 return NULL;
898
899 *prsc = *tmpl;
900
901 #define LINEAR \
902 (PIPE_BIND_SCANOUT | \
903 PIPE_BIND_LINEAR | \
904 PIPE_BIND_DISPLAY_TARGET)
905
906 bool linear = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
907 if (tmpl->bind & LINEAR)
908 linear = true;
909
910 /* Normally, for non-shared buffers, allow buffer compression if
911 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
912 * is requested:
913 *
914 * TODO we should probably also limit tiled in a similar way,
915 * except we don't have a format modifier for tiled. (We probably
916 * should.)
917 */
918 bool allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_INVALID, modifiers, count);
919 if (tmpl->bind & PIPE_BIND_SHARED)
920 allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count);
921
922 /* TODO turn on UBWC for all internal buffers
923 *
924 * There are still some regressions in deqp with UBWC enabled. I
925 * think it is mostly related to sampler/image views using a format
926 * that doesn't support compression with a resource created with
927 * a format that does. We need to track the compression state of
928 * a buffer and do an (in-place, hopefully?) resolve if it is re-
929 * interpreted with a format that does not support compression.
930 *
931 * It is possible (likely?) that we can't do atomic ops on a
932 * compressed buffer as well, so this would also require transition
933 * to a compressed state.
934 */
935 allow_ubwc &= !!(fd_mesa_debug & FD_DBG_UBWC);
936
937 if (screen->tile_mode &&
938 (tmpl->target != PIPE_BUFFER) &&
939 !linear) {
940 rsc->tile_mode = screen->tile_mode(tmpl);
941 }
942
943 pipe_reference_init(&prsc->reference, 1);
944
945 prsc->screen = pscreen;
946
947 util_range_init(&rsc->valid_buffer_range);
948
949 rsc->internal_format = format;
950 rsc->cpp = util_format_get_blocksize(format);
951 rsc->cpp *= fd_resource_nr_samples(prsc);
952
953 assert(rsc->cpp);
954
955 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
956 if ((is_a5xx(screen) || is_a6xx(screen)) &&
957 (fd_mesa_debug & FD_DBG_LRZ) && has_depth(format)) {
958 const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
959 DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
960 unsigned lrz_pitch = align(DIV_ROUND_UP(tmpl->width0, 8), 64);
961 unsigned lrz_height = DIV_ROUND_UP(tmpl->height0, 8);
962
963 /* LRZ buffer is super-sampled: */
964 switch (prsc->nr_samples) {
965 case 4:
966 lrz_pitch *= 2;
967 case 2:
968 lrz_height *= 2;
969 }
970
971 unsigned size = lrz_pitch * lrz_height * 2;
972
973 size += 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
974
975 rsc->lrz_height = lrz_height;
976 rsc->lrz_width = lrz_pitch;
977 rsc->lrz_pitch = lrz_pitch;
978 rsc->lrz = fd_bo_new(screen->dev, size, flags, "lrz");
979 }
980
981 size = screen->setup_slices(rsc);
982
983 if (allow_ubwc && screen->fill_ubwc_buffer_sizes && rsc->tile_mode)
984 size += screen->fill_ubwc_buffer_sizes(rsc);
985
986 /* special case for hw-query buffer, which we need to allocate before we
987 * know the size:
988 */
989 if (size == 0) {
990 /* note, semi-intention == instead of & */
991 debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
992 return prsc;
993 }
994
995 if (rsc->layer_first) {
996 rsc->layer_size = align(size, 4096);
997 size = rsc->layer_size * prsc->array_size;
998 }
999
1000 realloc_bo(rsc, size);
1001 if (!rsc->bo)
1002 goto fail;
1003
1004 return prsc;
1005 fail:
1006 fd_resource_destroy(pscreen, prsc);
1007 return NULL;
1008 }
1009
1010 static struct pipe_resource *
1011 fd_resource_create(struct pipe_screen *pscreen,
1012 const struct pipe_resource *tmpl)
1013 {
1014 const uint64_t mod = DRM_FORMAT_MOD_INVALID;
1015 return fd_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
1016 }
1017
1018 static bool
1019 is_supported_modifier(struct pipe_screen *pscreen, enum pipe_format pfmt,
1020 uint64_t mod)
1021 {
1022 int count;
1023
1024 /* Get the count of supported modifiers: */
1025 pscreen->query_dmabuf_modifiers(pscreen, pfmt, 0, NULL, NULL, &count);
1026
1027 /* Get the supported modifiers: */
1028 uint64_t modifiers[count];
1029 pscreen->query_dmabuf_modifiers(pscreen, pfmt, count, modifiers, NULL, &count);
1030
1031 for (int i = 0; i < count; i++)
1032 if (modifiers[i] == mod)
1033 return true;
1034
1035 return false;
1036 }
1037
1038 /**
1039 * Create a texture from a winsys_handle. The handle is often created in
1040 * another process by first creating a pipe texture and then calling
1041 * resource_get_handle.
1042 */
1043 static struct pipe_resource *
1044 fd_resource_from_handle(struct pipe_screen *pscreen,
1045 const struct pipe_resource *tmpl,
1046 struct winsys_handle *handle, unsigned usage)
1047 {
1048 struct fd_screen *screen = fd_screen(pscreen);
1049 struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
1050 struct fd_resource_slice *slice = &rsc->slices[0];
1051 struct pipe_resource *prsc = &rsc->base;
1052 uint32_t pitchalign = fd_screen(pscreen)->gmem_alignw;
1053
1054 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1055 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1056 tmpl->target, util_format_name(tmpl->format),
1057 tmpl->width0, tmpl->height0, tmpl->depth0,
1058 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
1059 tmpl->usage, tmpl->bind, tmpl->flags);
1060
1061 if (!rsc)
1062 return NULL;
1063
1064 *prsc = *tmpl;
1065
1066 pipe_reference_init(&prsc->reference, 1);
1067
1068 prsc->screen = pscreen;
1069
1070 util_range_init(&rsc->valid_buffer_range);
1071
1072 rsc->bo = fd_screen_bo_from_handle(pscreen, handle);
1073 if (!rsc->bo)
1074 goto fail;
1075
1076 rsc->internal_format = tmpl->format;
1077 rsc->cpp = util_format_get_blocksize(tmpl->format);
1078 rsc->cpp *= fd_resource_nr_samples(prsc);
1079 slice->pitch = handle->stride / rsc->cpp;
1080 slice->offset = handle->offset;
1081 slice->size0 = handle->stride * prsc->height0;
1082
1083 if ((slice->pitch < align(prsc->width0, pitchalign)) ||
1084 (slice->pitch & (pitchalign - 1)))
1085 goto fail;
1086
1087 if (handle->modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) {
1088 if (!is_supported_modifier(pscreen, tmpl->format,
1089 DRM_FORMAT_MOD_QCOM_COMPRESSED)) {
1090 DBG("bad modifier: %"PRIx64, handle->modifier);
1091 goto fail;
1092 }
1093 debug_assert(screen->fill_ubwc_buffer_sizes);
1094 screen->fill_ubwc_buffer_sizes(rsc);
1095 } else if (handle->modifier &&
1096 (handle->modifier != DRM_FORMAT_MOD_INVALID)) {
1097 goto fail;
1098 }
1099
1100 assert(rsc->cpp);
1101
1102 if (screen->ro) {
1103 rsc->scanout =
1104 renderonly_create_gpu_import_for_resource(prsc, screen->ro, NULL);
1105 /* failure is expected in some cases.. */
1106 }
1107
1108 rsc->valid = true;
1109
1110 return prsc;
1111
1112 fail:
1113 fd_resource_destroy(pscreen, prsc);
1114 return NULL;
1115 }
1116
1117 bool
1118 fd_render_condition_check(struct pipe_context *pctx)
1119 {
1120 struct fd_context *ctx = fd_context(pctx);
1121
1122 if (!ctx->cond_query)
1123 return true;
1124
1125 union pipe_query_result res = { 0 };
1126 bool wait =
1127 ctx->cond_mode != PIPE_RENDER_COND_NO_WAIT &&
1128 ctx->cond_mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
1129
1130 if (pctx->get_query_result(pctx, ctx->cond_query, wait, &res))
1131 return (bool)res.u64 != ctx->cond_cond;
1132
1133 return true;
1134 }
1135
1136 static void
1137 fd_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
1138 {
1139 struct fd_context *ctx = fd_context(pctx);
1140 struct fd_resource *rsc = fd_resource(prsc);
1141
1142 /*
1143 * TODO I guess we could track that the resource is invalidated and
1144 * use that as a hint to realloc rather than stall in _transfer_map(),
1145 * even in the non-DISCARD_WHOLE_RESOURCE case?
1146 *
1147 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1148 */
1149
1150 if (rsc->write_batch) {
1151 struct fd_batch *batch = rsc->write_batch;
1152 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
1153
1154 if (pfb->zsbuf && pfb->zsbuf->texture == prsc) {
1155 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
1156 ctx->dirty |= FD_DIRTY_ZSA;
1157 }
1158
1159 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
1160 if (pfb->cbufs[i] && pfb->cbufs[i]->texture == prsc) {
1161 batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1162 ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
1163 }
1164 }
1165 }
1166
1167 rsc->valid = false;
1168 }
1169
1170 static enum pipe_format
1171 fd_resource_get_internal_format(struct pipe_resource *prsc)
1172 {
1173 return fd_resource(prsc)->internal_format;
1174 }
1175
1176 static void
1177 fd_resource_set_stencil(struct pipe_resource *prsc,
1178 struct pipe_resource *stencil)
1179 {
1180 fd_resource(prsc)->stencil = fd_resource(stencil);
1181 }
1182
1183 static struct pipe_resource *
1184 fd_resource_get_stencil(struct pipe_resource *prsc)
1185 {
1186 struct fd_resource *rsc = fd_resource(prsc);
1187 if (rsc->stencil)
1188 return &rsc->stencil->base;
1189 return NULL;
1190 }
1191
1192 static const struct u_transfer_vtbl transfer_vtbl = {
1193 .resource_create = fd_resource_create,
1194 .resource_destroy = fd_resource_destroy,
1195 .transfer_map = fd_resource_transfer_map,
1196 .transfer_flush_region = fd_resource_transfer_flush_region,
1197 .transfer_unmap = fd_resource_transfer_unmap,
1198 .get_internal_format = fd_resource_get_internal_format,
1199 .set_stencil = fd_resource_set_stencil,
1200 .get_stencil = fd_resource_get_stencil,
1201 };
1202
1203 void
1204 fd_resource_screen_init(struct pipe_screen *pscreen)
1205 {
1206 struct fd_screen *screen = fd_screen(pscreen);
1207 bool fake_rgtc = screen->gpu_id < 400;
1208
1209 pscreen->resource_create = u_transfer_helper_resource_create;
1210 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1211 * variant:
1212 */
1213 pscreen->resource_create_with_modifiers = fd_resource_create_with_modifiers;
1214 pscreen->resource_from_handle = fd_resource_from_handle;
1215 pscreen->resource_get_handle = fd_resource_get_handle;
1216 pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1217
1218 pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1219 true, false, fake_rgtc, true);
1220
1221 if (!screen->setup_slices)
1222 screen->setup_slices = fd_setup_slices;
1223 }
1224
1225 static void
1226 fd_get_sample_position(struct pipe_context *context,
1227 unsigned sample_count, unsigned sample_index,
1228 float *pos_out)
1229 {
1230 /* The following is copied from nouveau/nv50 except for position
1231 * values, which are taken from blob driver */
1232 static const uint8_t pos1[1][2] = { { 0x8, 0x8 } };
1233 static const uint8_t pos2[2][2] = {
1234 { 0xc, 0xc }, { 0x4, 0x4 } };
1235 static const uint8_t pos4[4][2] = {
1236 { 0x6, 0x2 }, { 0xe, 0x6 },
1237 { 0x2, 0xa }, { 0xa, 0xe } };
1238 /* TODO needs to be verified on supported hw */
1239 static const uint8_t pos8[8][2] = {
1240 { 0x9, 0x5 }, { 0x7, 0xb },
1241 { 0xd, 0x9 }, { 0x5, 0x3 },
1242 { 0x3, 0xd }, { 0x1, 0x7 },
1243 { 0xb, 0xf }, { 0xf, 0x1 } };
1244
1245 const uint8_t (*ptr)[2];
1246
1247 switch (sample_count) {
1248 case 1:
1249 ptr = pos1;
1250 break;
1251 case 2:
1252 ptr = pos2;
1253 break;
1254 case 4:
1255 ptr = pos4;
1256 break;
1257 case 8:
1258 ptr = pos8;
1259 break;
1260 default:
1261 assert(0);
1262 return;
1263 }
1264
1265 pos_out[0] = ptr[sample_index][0] / 16.0f;
1266 pos_out[1] = ptr[sample_index][1] / 16.0f;
1267 }
1268
1269 static void
1270 fd_blit_pipe(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
1271 {
1272 /* wrap fd_blit to return void */
1273 fd_blit(pctx, blit_info);
1274 }
1275
1276 void
1277 fd_resource_context_init(struct pipe_context *pctx)
1278 {
1279 pctx->transfer_map = u_transfer_helper_transfer_map;
1280 pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1281 pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
1282 pctx->buffer_subdata = u_default_buffer_subdata;
1283 pctx->texture_subdata = u_default_texture_subdata;
1284 pctx->create_surface = fd_create_surface;
1285 pctx->surface_destroy = fd_surface_destroy;
1286 pctx->resource_copy_region = fd_resource_copy_region;
1287 pctx->blit = fd_blit_pipe;
1288 pctx->flush_resource = fd_flush_resource;
1289 pctx->invalidate_resource = fd_invalidate_resource;
1290 pctx->get_sample_position = fd_get_sample_position;
1291 }