freedreno: add renderonly scanout
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.h
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_RESOURCE_H_
28 #define FREEDRENO_RESOURCE_H_
29
30 #include "util/list.h"
31 #include "util/u_range.h"
32 #include "util/u_transfer_helper.h"
33
34 #include "freedreno_batch.h"
35 #include "freedreno_util.h"
36
37 /* Texture Layout on a3xx:
38 *
39 * Each mipmap-level contains all of it's layers (ie. all cubmap
40 * faces, all 1d/2d array elements, etc). The texture sampler is
41 * programmed with the start address of each mipmap level, and hw
42 * derives the layer offset within the level.
43 *
44 * Texture Layout on a4xx+:
45 *
46 * For cubemap and 2d array, each layer contains all of it's mipmap
47 * levels (layer_first layout).
48 *
49 * 3d textures are layed out as on a3xx, but unknown about 3d-array
50 * textures.
51 *
52 * In either case, the slice represents the per-miplevel information,
53 * but in layer_first layout it only includes the first layer, and
54 * an additional offset of (rsc->layer_size * layer) must be added.
55 */
56 struct fd_resource_slice {
57 uint32_t offset; /* offset of first layer in slice */
58 uint32_t pitch;
59 uint32_t size0; /* size of first layer in slice */
60 };
61
62 struct set;
63
64 struct fd_resource {
65 struct pipe_resource base;
66 struct fd_bo *bo;
67 uint32_t cpp;
68 enum pipe_format internal_format;
69 bool layer_first; /* see above description */
70 uint32_t layer_size;
71 struct fd_resource_slice slices[MAX_MIP_LEVELS];
72 /* buffer range that has been initialized */
73 struct util_range valid_buffer_range;
74 bool valid;
75 struct renderonly_scanout *scanout;
76
77 /* reference to the resource holding stencil data for a z32_s8 texture */
78 /* TODO rename to secondary or auxiliary? */
79 struct fd_resource *stencil;
80
81 /* bitmask of in-flight batches which reference this resource. Note
82 * that the batch doesn't hold reference to resources (but instead
83 * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
84 * the resource is destroyed we need to clean up the batch's weak
85 * references to us.
86 */
87 uint32_t batch_mask;
88
89 /* reference to batch that writes this resource: */
90 struct fd_batch *write_batch;
91
92 /* Set of batches whose batch-cache key references this resource.
93 * We need to track this to know which batch-cache entries to
94 * invalidate if, for example, the resource is invalidated or
95 * shadowed.
96 */
97 uint32_t bc_batch_mask;
98
99 /* Sequence # incremented each time bo changes: */
100 uint16_t seqno;
101
102 unsigned tile_mode : 2;
103 unsigned preferred_tile_mode : 2;
104
105 /*
106 * LRZ
107 */
108 bool lrz_valid : 1;
109 uint16_t lrz_width; // for lrz clear, does this differ from lrz_pitch?
110 uint16_t lrz_height;
111 uint16_t lrz_pitch;
112 struct fd_bo *lrz;
113 };
114
115 static inline struct fd_resource *
116 fd_resource(struct pipe_resource *ptex)
117 {
118 return (struct fd_resource *)ptex;
119 }
120
121 static inline bool
122 pending(struct fd_resource *rsc, bool write)
123 {
124 /* if we have a pending GPU write, we are busy in any case: */
125 if (rsc->write_batch)
126 return true;
127
128 /* if CPU wants to write, but we are pending a GPU read, we are busy: */
129 if (write && rsc->batch_mask)
130 return true;
131
132 if (rsc->stencil && pending(rsc->stencil, write))
133 return true;
134
135 return false;
136 }
137
138 struct fd_transfer {
139 struct pipe_transfer base;
140 struct pipe_resource *staging_prsc;
141 struct pipe_box staging_box;
142 };
143
144 static inline struct fd_transfer *
145 fd_transfer(struct pipe_transfer *ptrans)
146 {
147 return (struct fd_transfer *)ptrans;
148 }
149
150 static inline struct fd_resource_slice *
151 fd_resource_slice(struct fd_resource *rsc, unsigned level)
152 {
153 assert(level <= rsc->base.last_level);
154 return &rsc->slices[level];
155 }
156
157 /* get offset for specified mipmap level and texture/array layer */
158 static inline uint32_t
159 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
160 {
161 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
162 unsigned offset;
163 if (rsc->layer_first) {
164 offset = slice->offset + (rsc->layer_size * layer);
165 } else {
166 offset = slice->offset + (slice->size0 * layer);
167 }
168 debug_assert(offset < fd_bo_size(rsc->bo));
169 return offset;
170 }
171
172 /* This might be a5xx specific, but higher mipmap levels are always linear: */
173 static inline bool
174 fd_resource_level_linear(struct pipe_resource *prsc, int level)
175 {
176 unsigned w = u_minify(prsc->width0, level);
177 if (w < 16)
178 return true;
179 return false;
180 }
181
182 void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard,
183 enum fd_render_stage stage);
184 void fd_blitter_pipe_end(struct fd_context *ctx);
185
186 void fd_resource_screen_init(struct pipe_screen *pscreen);
187 void fd_resource_context_init(struct pipe_context *pctx);
188
189 uint32_t fd_setup_slices(struct fd_resource *rsc);
190 void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
191
192 bool fd_render_condition_check(struct pipe_context *pctx);
193
194 #endif /* FREEDRENO_RESOURCE_H_ */