Merge branch 'xa_branch'
[mesa.git] / src / gallium / drivers / i915 / i915_clear.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Authors:
29 * Brian Paul
30 */
31
32
33 #include "util/u_clear.h"
34 #include "util/u_format.h"
35 #include "util/u_pack_color.h"
36 #include "i915_context.h"
37 #include "i915_screen.h"
38 #include "i915_reg.h"
39 #include "i915_batch.h"
40 #include "i915_resource.h"
41 #include "i915_state.h"
42
43 void
44 i915_clear_emit(struct pipe_context *pipe, unsigned buffers, const float *rgba,
45 double depth, unsigned stencil,
46 unsigned destx, unsigned desty, unsigned width, unsigned height)
47 {
48 struct i915_context *i915 = i915_context(pipe);
49 uint32_t clear_params, clear_color, clear_depth, clear_stencil,
50 clear_color8888, packed_z_stencil;
51 union util_color u_color;
52 float f_depth = depth;
53 struct i915_texture *cbuf_tex, *depth_tex;
54
55 cbuf_tex = depth_tex = NULL;
56 clear_params = 0;
57
58 if (buffers & PIPE_CLEAR_COLOR) {
59 struct pipe_surface *cbuf = i915->framebuffer.cbufs[0];
60
61 clear_params |= CLEARPARAM_WRITE_COLOR;
62 cbuf_tex = i915_texture(cbuf->texture);
63 util_pack_color(rgba, cbuf->format, &u_color);
64 if (util_format_get_blocksize(cbuf_tex->b.b.format) == 4)
65 clear_color = u_color.ui;
66 else
67 clear_color = (u_color.ui & 0xffff) | (u_color.ui << 16);
68
69 util_pack_color(rgba, cbuf->format, &u_color);
70 clear_color8888 = u_color.ui;
71 } else
72 clear_color = clear_color8888 = 0;
73
74 clear_depth = clear_stencil = 0;
75 if (buffers & PIPE_CLEAR_DEPTH) {
76 struct pipe_surface *zbuf = i915->framebuffer.zsbuf;
77
78 clear_params |= CLEARPARAM_WRITE_DEPTH;
79 depth_tex = i915_texture(zbuf->texture);
80 packed_z_stencil = util_pack_z_stencil(depth_tex->b.b.format, depth, stencil);
81
82 if (util_format_get_blocksize(depth_tex->b.b.format) == 4) {
83 /* Avoid read-modify-write if there's no stencil. */
84 if (buffers & PIPE_CLEAR_STENCIL
85 || depth_tex->b.b.format != PIPE_FORMAT_Z24_UNORM_S8_USCALED) {
86 clear_params |= CLEARPARAM_WRITE_STENCIL;
87 clear_stencil = packed_z_stencil & 0xff;
88 clear_depth = packed_z_stencil;
89 } else
90 clear_depth = packed_z_stencil & 0xffffff00;
91 } else {
92 clear_depth = (clear_depth & 0xffff) | (clear_depth << 16);
93 }
94 }
95
96 if (i915->hardware_dirty)
97 i915_emit_hardware_state(i915);
98
99 if (!BEGIN_BATCH(7 + 7)) {
100 FLUSH_BATCH(NULL);
101
102 i915_emit_hardware_state(i915);
103 i915->vbo_flushed = 1;
104
105 assert(BEGIN_BATCH(7 + 7));
106 }
107
108 OUT_BATCH(_3DSTATE_CLEAR_PARAMETERS);
109 OUT_BATCH(clear_params | CLEARPARAM_CLEAR_RECT);
110 OUT_BATCH(clear_color);
111 OUT_BATCH(clear_depth);
112 OUT_BATCH(clear_color8888);
113 OUT_BATCH_F(f_depth);
114 OUT_BATCH(clear_stencil);
115
116 OUT_BATCH(_3DPRIMITIVE | PRIM3D_CLEAR_RECT | 5);
117 OUT_BATCH_F(destx + width);
118 OUT_BATCH_F(desty + height);
119 OUT_BATCH_F(destx);
120 OUT_BATCH_F(desty + height);
121 OUT_BATCH_F(destx);
122 OUT_BATCH_F(desty);
123 }
124
125 /**
126 * Clear the given buffers to the specified values.
127 * No masking, no scissor (clear entire buffer).
128 */
129 void
130 i915_clear_blitter(struct pipe_context *pipe, unsigned buffers, const float *rgba,
131 double depth, unsigned stencil)
132 {
133 util_clear(pipe, &i915_context(pipe)->framebuffer, buffers, rgba, depth,
134 stencil);
135 }
136
137 void
138 i915_clear_render(struct pipe_context *pipe, unsigned buffers, const float *rgba,
139 double depth, unsigned stencil)
140 {
141 struct i915_context *i915 = i915_context(pipe);
142
143 if (i915->dirty)
144 i915_update_derived(i915);
145
146 i915_clear_emit(pipe, buffers, rgba, depth, stencil,
147 0, 0, i915->framebuffer.width, i915->framebuffer.height);
148 }