src/gallium/drivers/i915/i915_context.h

   1  /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef I915_CONTEXT_H
  29 #define I915_CONTEXT_H
  30
  31
  32 #include "pipe/p_context.h"
  33 #include "pipe/p_defines.h"
  34 #include "pipe/p_state.h"
  35
  36 #include "draw/draw_vertex.h"
  37
  38 #include "tgsi/tgsi_scan.h"
  39
  40
  41 struct intel_winsys;
  42 struct intel_buffer;
  43 struct intel_batchbuffer;
  44
  45
  46 #define I915_TEX_UNITS 8
  47
  48 #define I915_DYNAMIC_MODES4       0
  49 #define I915_DYNAMIC_DEPTHSCALE_0 1 /* just the header */
  50 #define I915_DYNAMIC_DEPTHSCALE_1 2
  51 #define I915_DYNAMIC_IAB          3
  52 #define I915_DYNAMIC_BC_0         4 /* just the header */
  53 #define I915_DYNAMIC_BC_1         5
  54 #define I915_DYNAMIC_BFO_0        6
  55 #define I915_DYNAMIC_BFO_1        7
  56 #define I915_DYNAMIC_STP_0        8
  57 #define I915_DYNAMIC_STP_1        9
  58 #define I915_DYNAMIC_SC_ENA_0     10
  59 #define I915_DYNAMIC_SC_RECT_0    11
  60 #define I915_DYNAMIC_SC_RECT_1    12
  61 #define I915_DYNAMIC_SC_RECT_2    13
  62 #define I915_MAX_DYNAMIC          14
  63
  64
  65 #define I915_IMMEDIATE_S0         0
  66 #define I915_IMMEDIATE_S1         1
  67 #define I915_IMMEDIATE_S2         2
  68 #define I915_IMMEDIATE_S3         3
  69 #define I915_IMMEDIATE_S4         4
  70 #define I915_IMMEDIATE_S5         5
  71 #define I915_IMMEDIATE_S6         6
  72 #define I915_IMMEDIATE_S7         7
  73 #define I915_MAX_IMMEDIATE        8
  74
  75 /* These must mach the order of LI0_STATE_* bits, as they will be used
  76  * to generate hardware packets:
  77  */
  78 #define I915_CACHE_STATIC         0
  79 #define I915_CACHE_DYNAMIC        1 /* handled specially */
  80 #define I915_CACHE_SAMPLER        2
  81 #define I915_CACHE_MAP            3
  82 #define I915_CACHE_PROGRAM        4
  83 #define I915_CACHE_CONSTANTS      5
  84 #define I915_MAX_CACHE            6
  85
  86 #define I915_MAX_CONSTANT  32
  87
  88
  89 /** See constant_flags[] below */
  90 #define I915_CONSTFLAG_USER 0x1f
  91
  92
  93 /**
  94  * Subclass of pipe_shader_state
  95  */
  96 struct i915_fragment_shader
  97 {
  98    struct pipe_shader_state state;
  99
 100    struct tgsi_shader_info info;
 101
 102    uint *program;
 103    uint program_len;
 104
 105    /**
 106     * constants introduced during translation.
 107     * These are placed at the end of the constant buffer and grow toward
 108     * the beginning (eg: slot 31, 30 29, ...)
 109     * User-provided constants start at 0.
 110     * This allows both types of constants to co-exist (until there's too many)
 111     * and doesn't require regenerating/changing the fragment program to
 112     * shuffle constants around.
 113     */
 114    uint num_constants;
 115    float constants[I915_MAX_CONSTANT][4];
 116
 117    /**
 118     * Status of each constant
 119     * if I915_CONSTFLAG_PARAM, the value must be taken from the corresponding
 120     * slot of the user's constant buffer. (set by pipe->set_constant_buffer())
 121     * Else, the bitmask indicates which components are occupied by immediates.
 122     */
 123    ubyte constant_flags[I915_MAX_CONSTANT];
 124 };
 125
 126
 127 struct i915_cache_context;
 128
 129 /* Use to calculate differences between state emitted to hardware and
 130  * current driver-calculated state.
 131  */
 132 struct i915_state
 133 {
 134    unsigned immediate[I915_MAX_IMMEDIATE];
 135    unsigned dynamic[I915_MAX_DYNAMIC];
 136
 137    float constants[PIPE_SHADER_TYPES][I915_MAX_CONSTANT][4];
 138    /** number of constants passed in through a constant buffer */
 139    uint num_user_constants[PIPE_SHADER_TYPES];
 140
 141    /* texture sampler state */
 142    unsigned sampler[I915_TEX_UNITS][3];
 143    unsigned sampler_enable_flags;
 144    unsigned sampler_enable_nr;
 145
 146    /* texture image buffers */
 147    unsigned texbuffer[I915_TEX_UNITS][2];
 148
 149    /** Describes the current hardware vertex layout */
 150    struct vertex_info vertex_info;
 151
 152    unsigned id;                 /* track lost context events */
 153 };
 154
 155 struct i915_blend_state {
 156    unsigned iab;
 157    unsigned modes4;
 158    unsigned LIS5;
 159    unsigned LIS6;
 160 };
 161
 162 struct i915_depth_stencil_state {
 163    unsigned stencil_modes4;
 164    unsigned bfo[2];
 165    unsigned stencil_LIS5;
 166    unsigned depth_LIS6;
 167 };
 168
 169 struct i915_rasterizer_state {
 170    unsigned light_twoside : 1;
 171    unsigned st;
 172    enum interp_mode color_interp;
 173
 174    unsigned LIS4;
 175    unsigned LIS7;
 176    unsigned sc[1];
 177
 178    const struct pipe_rasterizer_state *templ;
 179
 180    union { float f; unsigned u; } ds[2];
 181 };
 182
 183 struct i915_sampler_state {
 184    unsigned state[3];
 185    const struct pipe_sampler_state *templ;
 186    unsigned minlod;
 187    unsigned maxlod;
 188 };
 189
 190 struct i915_texture {
 191    struct pipe_texture base;
 192
 193    /* Derived from the above:
 194     */
 195    unsigned stride;
 196    unsigned depth_stride;          /* per-image on i945? */
 197    unsigned total_nblocksy;
 198
 199    unsigned sw_tiled; /**< tiled with software flags */
 200    unsigned hw_tiled; /**< tiled with hardware fences */
 201
 202    unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS];
 203
 204    /* Explicitly store the offset of each image for each cube face or
 205     * depth value.  Pretty much have to accept that hardware formats
 206     * are going to be so diverse that there is no unified way to
 207     * compute the offsets of depth/cube images within a mipmap level,
 208     * so have to store them as a lookup table:
 209     */
 210    unsigned *image_offset[PIPE_MAX_TEXTURE_LEVELS];   /**< array [depth] of offsets */
 211
 212    /* The data is held here:
 213     */
 214    struct intel_buffer *buffer;
 215 };
 216
 217 struct i915_context
 218 {
 219    struct pipe_context base;
 220
 221    struct intel_winsys *iws;
 222
 223    struct draw_context *draw;
 224
 225    /* The most recent drawing state as set by the driver:
 226     */
 227    const struct i915_blend_state           *blend;
 228    const struct i915_sampler_state         *sampler[PIPE_MAX_SAMPLERS];
 229    const struct i915_depth_stencil_state   *depth_stencil;
 230    const struct i915_rasterizer_state      *rasterizer;
 231
 232    struct i915_fragment_shader *fs;
 233
 234    struct pipe_blend_color blend_color;
 235    struct pipe_stencil_ref stencil_ref;
 236    struct pipe_clip_state clip;
 237    /* XXX unneded */
 238    struct pipe_buffer *constants[PIPE_SHADER_TYPES];
 239    struct pipe_framebuffer_state framebuffer;
 240    struct pipe_poly_stipple poly_stipple;
 241    struct pipe_scissor_state scissor;
 242    struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS];
 243    struct pipe_viewport_state viewport;
 244    struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 245
 246    unsigned dirty;
 247
 248    unsigned num_samplers;
 249    unsigned num_fragment_sampler_views;
 250    unsigned num_vertex_elements;
 251    unsigned num_vertex_buffers;
 252
 253    struct intel_batchbuffer *batch;
 254
 255    /** Vertex buffer */
 256    struct intel_buffer *vbo;
 257    size_t vbo_offset;
 258    unsigned vbo_flushed;
 259
 260    struct i915_state current;
 261    unsigned hardware_dirty;
 262
 263    unsigned debug;
 264 };
 265
 266 /* A flag for each state_tracker state object:
 267  */
 268 #define I915_NEW_VIEWPORT      0x1
 269 #define I915_NEW_RASTERIZER    0x2
 270 #define I915_NEW_FS            0x4
 271 #define I915_NEW_BLEND         0x8
 272 #define I915_NEW_CLIP          0x10
 273 #define I915_NEW_SCISSOR       0x20
 274 #define I915_NEW_STIPPLE       0x40
 275 #define I915_NEW_FRAMEBUFFER   0x80
 276 #define I915_NEW_ALPHA_TEST    0x100
 277 #define I915_NEW_DEPTH_STENCIL 0x200
 278 #define I915_NEW_SAMPLER       0x400
 279 #define I915_NEW_SAMPLER_VIEW  0x800
 280 #define I915_NEW_CONSTANTS     0x1000
 281 #define I915_NEW_VBO           0x2000
 282 #define I915_NEW_VS            0x4000
 283
 284
 285 /* Driver's internally generated state flags:
 286  */
 287 #define I915_NEW_VERTEX_FORMAT    0x10000
 288
 289
 290 /* Dirty flags for hardware emit
 291  */
 292 #define I915_HW_STATIC            (1<<I915_CACHE_STATIC)
 293 #define I915_HW_DYNAMIC           (1<<I915_CACHE_DYNAMIC)
 294 #define I915_HW_SAMPLER           (1<<I915_CACHE_SAMPLER)
 295 #define I915_HW_MAP               (1<<I915_CACHE_MAP)
 296 #define I915_HW_PROGRAM           (1<<I915_CACHE_PROGRAM)
 297 #define I915_HW_CONSTANTS         (1<<I915_CACHE_CONSTANTS)
 298 #define I915_HW_IMMEDIATE         (1<<(I915_MAX_CACHE+0))
 299 #define I915_HW_INVARIENT         (1<<(I915_MAX_CACHE+1))
 300
 301
 302 /***********************************************************************
 303  * i915_prim_emit.c:
 304  */
 305 struct draw_stage *i915_draw_render_stage( struct i915_context *i915 );
 306
 307
 308 /***********************************************************************
 309  * i915_prim_vbuf.c:
 310  */
 311 struct draw_stage *i915_draw_vbuf_stage( struct i915_context *i915 );
 312
 313
 314 /***********************************************************************
 315  * i915_state_emit.c:
 316  */
 317 void i915_emit_hardware_state(struct i915_context *i915 );
 318
 319
 320
 321 /***********************************************************************
 322  * i915_clear.c:
 323  */
 324 void i915_clear( struct pipe_context *pipe, unsigned buffers, const float *rgba,
 325                  double depth, unsigned stencil);
 326
 327
 328 /***********************************************************************
 329  * i915_surface.c:
 330  */
 331 void i915_init_surface_functions( struct i915_context *i915 );
 332
 333 void i915_init_state_functions( struct i915_context *i915 );
 334 void i915_init_flush_functions( struct i915_context *i915 );
 335 void i915_init_string_functions( struct i915_context *i915 );
 336
 337
 338 /************************************************************************
 339  * i915_context.c
 340  */
 341 struct pipe_context *i915_create_context(struct pipe_screen *screen,
 342                                          void *priv);
 343
 344
 345 /***********************************************************************
 346  * Inline conversion functions.  These are better-typed than the
 347  * macros used previously:
 348  */
 349 static INLINE struct i915_context *
 350 i915_context( struct pipe_context *pipe )
 351 {
 352    return (struct i915_context *)pipe;
 353 }
 354
 355
 356
 357 #endif