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[mesa.git] / src / gallium / drivers / i915 / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
29 */
30
31
32 #include "draw/draw_context.h"
33 #include "util/u_helpers.h"
34 #include "util/u_inlines.h"
35 #include "util/u_math.h"
36 #include "util/u_memory.h"
37 #include "util/u_transfer.h"
38 #include "tgsi/tgsi_parse.h"
39
40 #include "i915_context.h"
41 #include "i915_reg.h"
42 #include "i915_state_inlines.h"
43 #include "i915_fpc.h"
44 #include "i915_resource.h"
45
46 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
47 * Intel drivers for "other operating systems" implement GL_CLAMP as
48 * GL_CLAMP_TO_EDGE, so the same is done here.
49 */
50 static unsigned
51 translate_wrap_mode(unsigned wrap)
52 {
53 switch (wrap) {
54 case PIPE_TEX_WRAP_REPEAT:
55 return TEXCOORDMODE_WRAP;
56 case PIPE_TEX_WRAP_CLAMP:
57 return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
58 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
59 return TEXCOORDMODE_CLAMP_EDGE;
60 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
61 return TEXCOORDMODE_CLAMP_BORDER;
62 case PIPE_TEX_WRAP_MIRROR_REPEAT:
63 return TEXCOORDMODE_MIRROR;
64 default:
65 return TEXCOORDMODE_WRAP;
66 }
67 }
68
69 static unsigned translate_img_filter( unsigned filter )
70 {
71 switch (filter) {
72 case PIPE_TEX_FILTER_NEAREST:
73 return FILTER_NEAREST;
74 case PIPE_TEX_FILTER_LINEAR:
75 return FILTER_LINEAR;
76 default:
77 assert(0);
78 return FILTER_NEAREST;
79 }
80 }
81
82 static unsigned translate_mip_filter( unsigned filter )
83 {
84 switch (filter) {
85 case PIPE_TEX_MIPFILTER_NONE:
86 return MIPFILTER_NONE;
87 case PIPE_TEX_MIPFILTER_NEAREST:
88 return MIPFILTER_NEAREST;
89 case PIPE_TEX_MIPFILTER_LINEAR:
90 return MIPFILTER_LINEAR;
91 default:
92 assert(0);
93 return MIPFILTER_NONE;
94 }
95 }
96
97 /* None of this state is actually used for anything yet.
98 */
99 static void *
100 i915_create_blend_state(struct pipe_context *pipe,
101 const struct pipe_blend_state *blend)
102 {
103 struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
104
105 {
106 unsigned eqRGB = blend->rt[0].rgb_func;
107 unsigned srcRGB = blend->rt[0].rgb_src_factor;
108 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
109
110 unsigned eqA = blend->rt[0].alpha_func;
111 unsigned srcA = blend->rt[0].alpha_src_factor;
112 unsigned dstA = blend->rt[0].alpha_dst_factor;
113
114 /* Special handling for MIN/MAX filter modes handled at
115 * state_tracker level.
116 */
117
118 if (srcA != srcRGB ||
119 dstA != dstRGB ||
120 eqA != eqRGB) {
121
122 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
123 IAB_MODIFY_ENABLE |
124 IAB_ENABLE |
125 IAB_MODIFY_FUNC |
126 IAB_MODIFY_SRC_FACTOR |
127 IAB_MODIFY_DST_FACTOR |
128 SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
129 DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
130 (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
131 }
132 else {
133 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
134 IAB_MODIFY_ENABLE |
135 0);
136 }
137 }
138
139 cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
140 ENABLE_LOGIC_OP_FUNC |
141 LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
142
143 if (blend->logicop_enable)
144 cso_data->LIS5 |= S5_LOGICOP_ENABLE;
145
146 if (blend->dither)
147 cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
148
149 /* We potentially do some fixup at emission for non-BGRA targets */
150 if ((blend->rt[0].colormask & PIPE_MASK_R) == 0)
151 cso_data->LIS5 |= S5_WRITEDISABLE_RED;
152
153 if ((blend->rt[0].colormask & PIPE_MASK_G) == 0)
154 cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
155
156 if ((blend->rt[0].colormask & PIPE_MASK_B) == 0)
157 cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
158
159 if ((blend->rt[0].colormask & PIPE_MASK_A) == 0)
160 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
161
162 if (blend->rt[0].blend_enable) {
163 unsigned funcRGB = blend->rt[0].rgb_func;
164 unsigned srcRGB = blend->rt[0].rgb_src_factor;
165 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
166
167 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
168 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
169 DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
170 (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
171 }
172
173 return cso_data;
174 }
175
176 static void i915_bind_blend_state(struct pipe_context *pipe,
177 void *blend)
178 {
179 struct i915_context *i915 = i915_context(pipe);
180
181 if (i915->blend == blend)
182 return;
183
184 i915->blend = (struct i915_blend_state*)blend;
185
186 i915->dirty |= I915_NEW_BLEND;
187 }
188
189
190 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
191 {
192 FREE(blend);
193 }
194
195 static void i915_set_blend_color( struct pipe_context *pipe,
196 const struct pipe_blend_color *blend_color )
197 {
198 struct i915_context *i915 = i915_context(pipe);
199
200 if (!blend_color)
201 return;
202
203 i915->blend_color = *blend_color;
204
205 i915->dirty |= I915_NEW_BLEND;
206 }
207
208 static void i915_set_stencil_ref( struct pipe_context *pipe,
209 const struct pipe_stencil_ref *stencil_ref )
210 {
211 struct i915_context *i915 = i915_context(pipe);
212
213 i915->stencil_ref = *stencil_ref;
214
215 i915->dirty |= I915_NEW_DEPTH_STENCIL;
216 }
217
218 static void *
219 i915_create_sampler_state(struct pipe_context *pipe,
220 const struct pipe_sampler_state *sampler)
221 {
222 struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
223 const unsigned ws = sampler->wrap_s;
224 const unsigned wt = sampler->wrap_t;
225 const unsigned wr = sampler->wrap_r;
226 unsigned minFilt, magFilt;
227 unsigned mipFilt;
228
229 cso->templ = *sampler;
230
231 mipFilt = translate_mip_filter(sampler->min_mip_filter);
232 minFilt = translate_img_filter( sampler->min_img_filter );
233 magFilt = translate_img_filter( sampler->mag_img_filter );
234
235 if (sampler->max_anisotropy > 1)
236 minFilt = magFilt = FILTER_ANISOTROPIC;
237
238 if (sampler->max_anisotropy > 2) {
239 cso->state[0] |= SS2_MAX_ANISO_4;
240 }
241
242 {
243 int b = (int) (sampler->lod_bias * 16.0);
244 b = CLAMP(b, -256, 255);
245 cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
246 }
247
248 /* Shadow:
249 */
250 if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
251 {
252 cso->state[0] |= (SS2_SHADOW_ENABLE |
253 i915_translate_shadow_compare_func(sampler->compare_func));
254
255 minFilt = FILTER_4X4_FLAT;
256 magFilt = FILTER_4X4_FLAT;
257 }
258
259 cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
260 (mipFilt << SS2_MIP_FILTER_SHIFT) |
261 (magFilt << SS2_MAG_FILTER_SHIFT));
262
263 cso->state[1] |=
264 ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
265 (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
266 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
267
268 if (sampler->normalized_coords)
269 cso->state[1] |= SS3_NORMALIZED_COORDS;
270
271 {
272 int minlod = (int) (16.0 * sampler->min_lod);
273 int maxlod = (int) (16.0 * sampler->max_lod);
274 minlod = CLAMP(minlod, 0, 16 * 11);
275 maxlod = CLAMP(maxlod, 0, 16 * 11);
276
277 if (minlod > maxlod)
278 maxlod = minlod;
279
280 cso->minlod = minlod;
281 cso->maxlod = maxlod;
282 }
283
284 {
285 ubyte r = float_to_ubyte(sampler->border_color.f[0]);
286 ubyte g = float_to_ubyte(sampler->border_color.f[1]);
287 ubyte b = float_to_ubyte(sampler->border_color.f[2]);
288 ubyte a = float_to_ubyte(sampler->border_color.f[3]);
289 cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
290 }
291 return cso;
292 }
293
294 static void
295 i915_bind_vertex_sampler_states(struct pipe_context *pipe,
296 unsigned start,
297 unsigned num,
298 void **samplers)
299 {
300 struct i915_context *i915 = i915_context(pipe);
301 unsigned i;
302
303 assert(start + num <= Elements(i915->vertex_samplers));
304
305 /* Check for no-op */
306 if (num == i915->num_vertex_samplers &&
307 !memcmp(i915->vertex_samplers + start, samplers,
308 num * sizeof(void *)))
309 return;
310
311 for (i = 0; i < num; ++i)
312 i915->vertex_samplers[i + start] = samplers[i];
313
314 /* find highest non-null samplers[] entry */
315 {
316 unsigned j = MAX2(i915->num_vertex_samplers, start + num);
317 while (j > 0 && i915->vertex_samplers[j - 1] == NULL)
318 j--;
319 i915->num_vertex_samplers = j;
320 }
321
322 draw_set_samplers(i915->draw,
323 PIPE_SHADER_VERTEX,
324 i915->vertex_samplers,
325 i915->num_vertex_samplers);
326 }
327
328
329
330 static void i915_bind_fragment_sampler_states(struct pipe_context *pipe,
331 unsigned start,
332 unsigned num,
333 void **samplers)
334 {
335 struct i915_context *i915 = i915_context(pipe);
336 unsigned i;
337
338 /* Check for no-op */
339 if (num == i915->num_samplers &&
340 !memcmp(i915->fragment_sampler + start, samplers,
341 num * sizeof(void *)))
342 return;
343
344 for (i = 0; i < num; ++i)
345 i915->fragment_sampler[i + start] = samplers[i];
346
347 /* find highest non-null samplers[] entry */
348 {
349 unsigned j = MAX2(i915->num_samplers, start + num);
350 while (j > 0 && i915->fragment_sampler[j - 1] == NULL)
351 j--;
352 i915->num_samplers = j;
353 }
354
355 i915->dirty |= I915_NEW_SAMPLER;
356 }
357
358
359 static void
360 i915_bind_sampler_states(struct pipe_context *pipe, unsigned shader,
361 unsigned start, unsigned num_samplers,
362 void **samplers)
363 {
364 switch (shader) {
365 case PIPE_SHADER_VERTEX:
366 i915_bind_vertex_sampler_states(pipe, start, num_samplers, samplers);
367 break;
368 case PIPE_SHADER_FRAGMENT:
369 i915_bind_fragment_sampler_states(pipe, start, num_samplers, samplers);
370 break;
371 default:
372 ;
373 }
374 }
375
376
377 static void i915_delete_sampler_state(struct pipe_context *pipe,
378 void *sampler)
379 {
380 FREE(sampler);
381 }
382
383
384 /**
385 * Called before drawing VBO to map vertex samplers and hand them to draw
386 */
387 void
388 i915_prepare_vertex_sampling(struct i915_context *i915)
389 {
390 struct i915_winsys *iws = i915->iws;
391 unsigned i,j;
392 uint32_t row_stride[PIPE_MAX_TEXTURE_LEVELS];
393 uint32_t img_stride[PIPE_MAX_TEXTURE_LEVELS];
394 uint32_t mip_offsets[PIPE_MAX_TEXTURE_LEVELS];
395 unsigned num = i915->num_vertex_sampler_views;
396 struct pipe_sampler_view **views = i915->vertex_sampler_views;
397
398 assert(num <= PIPE_MAX_SAMPLERS);
399 if (!num)
400 return;
401
402 for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
403 struct pipe_sampler_view *view = i < num ? views[i] : NULL;
404
405 if (view) {
406 struct pipe_resource *tex = view->texture;
407 struct i915_texture *i915_tex = i915_texture(tex);
408 ubyte *addr;
409
410 /* We're referencing the texture's internal data, so save a
411 * reference to it.
412 */
413 pipe_resource_reference(&i915->mapped_vs_tex[i], tex);
414
415 i915->mapped_vs_tex_buffer[i] = i915_tex->buffer;
416 addr = iws->buffer_map(iws,
417 i915_tex->buffer,
418 FALSE /* read only */);
419
420 /* Setup array of mipmap level pointers */
421 /* FIXME: handle 3D textures? */
422 for (j = view->u.tex.first_level; j <= tex->last_level; j++) {
423 mip_offsets[j] = i915_texture_offset(i915_tex, j , 0 /* FIXME depth */);
424 row_stride[j] = i915_tex->stride;
425 img_stride[j] = 0; /* FIXME */;
426 }
427
428 draw_set_mapped_texture(i915->draw,
429 PIPE_SHADER_VERTEX,
430 i,
431 tex->width0, tex->height0, tex->depth0,
432 view->u.tex.first_level, tex->last_level,
433 addr,
434 row_stride, img_stride, mip_offsets);
435 } else
436 i915->mapped_vs_tex[i] = NULL;
437 }
438 }
439
440 void
441 i915_cleanup_vertex_sampling(struct i915_context *i915)
442 {
443 struct i915_winsys *iws = i915->iws;
444 unsigned i;
445 for (i = 0; i < Elements(i915->mapped_vs_tex); i++) {
446 if (i915->mapped_vs_tex_buffer[i]) {
447 iws->buffer_unmap(iws, i915->mapped_vs_tex_buffer[i]);
448 pipe_resource_reference(&i915->mapped_vs_tex[i], NULL);
449 }
450 }
451 }
452
453
454
455 /** XXX move someday? Or consolidate all these simple state setters
456 * into one file.
457 */
458
459 static void *
460 i915_create_depth_stencil_state(struct pipe_context *pipe,
461 const struct pipe_depth_stencil_alpha_state *depth_stencil)
462 {
463 struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
464
465 {
466 int testmask = depth_stencil->stencil[0].valuemask & 0xff;
467 int writemask = depth_stencil->stencil[0].writemask & 0xff;
468
469 cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
470 ENABLE_STENCIL_TEST_MASK |
471 STENCIL_TEST_MASK(testmask) |
472 ENABLE_STENCIL_WRITE_MASK |
473 STENCIL_WRITE_MASK(writemask));
474 }
475
476 if (depth_stencil->stencil[0].enabled) {
477 int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
478 int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
479 int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
480 int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
481
482 cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
483 S5_STENCIL_WRITE_ENABLE |
484 (test << S5_STENCIL_TEST_FUNC_SHIFT) |
485 (fop << S5_STENCIL_FAIL_SHIFT) |
486 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
487 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
488 }
489
490 if (depth_stencil->stencil[1].enabled) {
491 int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
492 int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
493 int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
494 int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
495 int tmask = depth_stencil->stencil[1].valuemask & 0xff;
496 int wmask = depth_stencil->stencil[1].writemask & 0xff;
497
498 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
499 BFO_ENABLE_STENCIL_FUNCS |
500 BFO_ENABLE_STENCIL_TWO_SIDE |
501 BFO_ENABLE_STENCIL_REF |
502 BFO_STENCIL_TWO_SIDE |
503 (test << BFO_STENCIL_TEST_SHIFT) |
504 (fop << BFO_STENCIL_FAIL_SHIFT) |
505 (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
506 (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
507
508 cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
509 BFM_ENABLE_STENCIL_TEST_MASK |
510 BFM_ENABLE_STENCIL_WRITE_MASK |
511 (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
512 (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
513 }
514 else {
515 /* This actually disables two-side stencil: The bit set is a
516 * modify-enable bit to indicate we are changing the two-side
517 * setting. Then there is a symbolic zero to show that we are
518 * setting the flag to zero/off.
519 */
520 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
521 BFO_ENABLE_STENCIL_TWO_SIDE |
522 0);
523 cso->bfo[1] = 0;
524 }
525
526 if (depth_stencil->depth.enabled) {
527 int func = i915_translate_compare_func(depth_stencil->depth.func);
528
529 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
530 (func << S6_DEPTH_TEST_FUNC_SHIFT));
531
532 if (depth_stencil->depth.writemask)
533 cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
534 }
535
536 if (depth_stencil->alpha.enabled) {
537 int test = i915_translate_compare_func(depth_stencil->alpha.func);
538 ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref_value);
539
540 cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
541 (test << S6_ALPHA_TEST_FUNC_SHIFT) |
542 (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
543 }
544
545 return cso;
546 }
547
548 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
549 void *depth_stencil)
550 {
551 struct i915_context *i915 = i915_context(pipe);
552
553 if (i915->depth_stencil == depth_stencil)
554 return;
555
556 i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
557
558 i915->dirty |= I915_NEW_DEPTH_STENCIL;
559 }
560
561 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
562 void *depth_stencil)
563 {
564 FREE(depth_stencil);
565 }
566
567
568 static void i915_set_scissor_states( struct pipe_context *pipe,
569 unsigned start_slot,
570 unsigned num_scissors,
571 const struct pipe_scissor_state *scissor )
572 {
573 struct i915_context *i915 = i915_context(pipe);
574
575 memcpy( &i915->scissor, scissor, sizeof(*scissor) );
576 i915->dirty |= I915_NEW_SCISSOR;
577 }
578
579
580 static void i915_set_polygon_stipple( struct pipe_context *pipe,
581 const struct pipe_poly_stipple *stipple )
582 {
583 }
584
585
586
587 static void *
588 i915_create_fs_state(struct pipe_context *pipe,
589 const struct pipe_shader_state *templ)
590 {
591 struct i915_context *i915 = i915_context(pipe);
592 struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
593 if (!ifs)
594 return NULL;
595
596 ifs->draw_data = draw_create_fragment_shader(i915->draw, templ);
597 ifs->state.tokens = tgsi_dup_tokens(templ->tokens);
598
599 tgsi_scan_shader(templ->tokens, &ifs->info);
600
601 /* The shader's compiled to i915 instructions here */
602 i915_translate_fragment_program(i915, ifs);
603
604 return ifs;
605 }
606
607 static void
608 i915_bind_fs_state(struct pipe_context *pipe, void *shader)
609 {
610 struct i915_context *i915 = i915_context(pipe);
611
612 if (i915->fs == shader)
613 return;
614
615 i915->fs = (struct i915_fragment_shader*) shader;
616
617 draw_bind_fragment_shader(i915->draw, (i915->fs ? i915->fs->draw_data : NULL));
618
619 i915->dirty |= I915_NEW_FS;
620 }
621
622 static
623 void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
624 {
625 struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
626
627 FREE(ifs->decl);
628 ifs->decl = NULL;
629
630 if (ifs->program) {
631 FREE(ifs->program);
632 ifs->program = NULL;
633 FREE((struct tgsi_token *)ifs->state.tokens);
634 ifs->state.tokens = NULL;
635 }
636
637 ifs->program_len = 0;
638 ifs->decl_len = 0;
639
640 FREE(ifs);
641 }
642
643
644 static void *
645 i915_create_vs_state(struct pipe_context *pipe,
646 const struct pipe_shader_state *templ)
647 {
648 struct i915_context *i915 = i915_context(pipe);
649
650 /* just pass-through to draw module */
651 return draw_create_vertex_shader(i915->draw, templ);
652 }
653
654 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
655 {
656 struct i915_context *i915 = i915_context(pipe);
657
658 if (i915->vs == shader)
659 return;
660
661 i915->vs = shader;
662
663 /* just pass-through to draw module */
664 draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
665
666 i915->dirty |= I915_NEW_VS;
667 }
668
669 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
670 {
671 struct i915_context *i915 = i915_context(pipe);
672
673 /* just pass-through to draw module */
674 draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
675 }
676
677 static void i915_set_constant_buffer(struct pipe_context *pipe,
678 uint shader, uint index,
679 struct pipe_constant_buffer *cb)
680 {
681 struct i915_context *i915 = i915_context(pipe);
682 struct pipe_resource *buf = cb ? cb->buffer : NULL;
683 unsigned new_num = 0;
684 boolean diff = TRUE;
685
686 /* XXX don't support geom shaders now */
687 if (shader == PIPE_SHADER_GEOMETRY)
688 return;
689
690 if (cb && cb->user_buffer) {
691 buf = i915_user_buffer_create(pipe->screen, (void *) cb->user_buffer,
692 cb->buffer_size,
693 PIPE_BIND_CONSTANT_BUFFER);
694 }
695
696 /* if we have a new buffer compare it with the old one */
697 if (buf) {
698 struct i915_buffer *ibuf = i915_buffer(buf);
699 struct pipe_resource *old_buf = i915->constants[shader];
700 struct i915_buffer *old = old_buf ? i915_buffer(old_buf) : NULL;
701 unsigned old_num = i915->current.num_user_constants[shader];
702
703 new_num = ibuf->b.b.width0 / 4 * sizeof(float);
704
705 if (old_num == new_num) {
706 if (old_num == 0)
707 diff = FALSE;
708 #if 0
709 /* XXX no point in running this code since st/mesa only uses user buffers */
710 /* Can't compare the buffer data since they are userbuffers */
711 else if (old && old->free_on_destroy)
712 diff = memcmp(old->data, ibuf->data, ibuf->b.b.width0);
713 #else
714 (void)old;
715 #endif
716 }
717 } else {
718 diff = i915->current.num_user_constants[shader] != 0;
719 }
720
721 pipe_resource_reference(&i915->constants[shader], buf);
722 i915->current.num_user_constants[shader] = new_num;
723
724 if (diff)
725 i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS : I915_NEW_FS_CONSTANTS;
726
727 if (cb && cb->user_buffer) {
728 pipe_resource_reference(&buf, NULL);
729 }
730 }
731
732
733 static void i915_set_fragment_sampler_views(struct pipe_context *pipe,
734 unsigned num,
735 struct pipe_sampler_view **views)
736 {
737 struct i915_context *i915 = i915_context(pipe);
738 uint i;
739
740 assert(num <= PIPE_MAX_SAMPLERS);
741
742 /* Check for no-op */
743 if (num == i915->num_fragment_sampler_views &&
744 !memcmp(i915->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *)))
745 return;
746
747 for (i = 0; i < num; i++) {
748 /* Note: we're using pipe_sampler_view_release() here to work around
749 * a possible crash when the old view belongs to another context that
750 * was already destroyed.
751 */
752 pipe_sampler_view_release(pipe, &i915->fragment_sampler_views[i]);
753 pipe_sampler_view_reference(&i915->fragment_sampler_views[i],
754 views[i]);
755 }
756
757 for (i = num; i < i915->num_fragment_sampler_views; i++)
758 pipe_sampler_view_release(pipe, &i915->fragment_sampler_views[i]);
759
760 i915->num_fragment_sampler_views = num;
761
762 i915->dirty |= I915_NEW_SAMPLER_VIEW;
763 }
764
765 static void
766 i915_set_vertex_sampler_views(struct pipe_context *pipe,
767 unsigned num,
768 struct pipe_sampler_view **views)
769 {
770 struct i915_context *i915 = i915_context(pipe);
771 uint i;
772
773 assert(num <= Elements(i915->vertex_sampler_views));
774
775 /* Check for no-op */
776 if (num == i915->num_vertex_sampler_views &&
777 !memcmp(i915->vertex_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) {
778 return;
779 }
780
781 for (i = 0; i < Elements(i915->vertex_sampler_views); i++) {
782 struct pipe_sampler_view *view = i < num ? views[i] : NULL;
783
784 pipe_sampler_view_reference(&i915->vertex_sampler_views[i], view);
785 }
786
787 i915->num_vertex_sampler_views = num;
788
789 draw_set_sampler_views(i915->draw,
790 PIPE_SHADER_VERTEX,
791 i915->vertex_sampler_views,
792 i915->num_vertex_sampler_views);
793 }
794
795
796 static struct pipe_sampler_view *
797 i915_create_sampler_view(struct pipe_context *pipe,
798 struct pipe_resource *texture,
799 const struct pipe_sampler_view *templ)
800 {
801 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
802
803 if (view) {
804 *view = *templ;
805 view->reference.count = 1;
806 view->texture = NULL;
807 pipe_resource_reference(&view->texture, texture);
808 view->context = pipe;
809 }
810
811 return view;
812 }
813
814
815 static void
816 i915_sampler_view_destroy(struct pipe_context *pipe,
817 struct pipe_sampler_view *view)
818 {
819 pipe_resource_reference(&view->texture, NULL);
820 FREE(view);
821 }
822
823
824 static void i915_set_framebuffer_state(struct pipe_context *pipe,
825 const struct pipe_framebuffer_state *fb)
826 {
827 struct i915_context *i915 = i915_context(pipe);
828 int i;
829
830 i915->framebuffer.width = fb->width;
831 i915->framebuffer.height = fb->height;
832 i915->framebuffer.nr_cbufs = fb->nr_cbufs;
833 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
834 pipe_surface_reference(&i915->framebuffer.cbufs[i],
835 i < fb->nr_cbufs ? fb->cbufs[i] : NULL);
836 }
837 pipe_surface_reference(&i915->framebuffer.zsbuf, fb->zsbuf);
838
839 i915->dirty |= I915_NEW_FRAMEBUFFER;
840 }
841
842
843
844 static void i915_set_clip_state( struct pipe_context *pipe,
845 const struct pipe_clip_state *clip )
846 {
847 struct i915_context *i915 = i915_context(pipe);
848
849 i915->clip = *clip;
850
851 draw_set_clip_state(i915->draw, clip);
852
853 i915->dirty |= I915_NEW_CLIP;
854 }
855
856
857
858 /* Called when driver state tracker notices changes to the viewport
859 * matrix:
860 */
861 static void i915_set_viewport_states( struct pipe_context *pipe,
862 unsigned start_slot,
863 unsigned num_viewports,
864 const struct pipe_viewport_state *viewport )
865 {
866 struct i915_context *i915 = i915_context(pipe);
867
868 i915->viewport = *viewport; /* struct copy */
869
870 /* pass the viewport info to the draw module */
871 draw_set_viewport_states(i915->draw, start_slot, num_viewports,
872 &i915->viewport);
873
874 i915->dirty |= I915_NEW_VIEWPORT;
875 }
876
877
878 static void *
879 i915_create_rasterizer_state(struct pipe_context *pipe,
880 const struct pipe_rasterizer_state *rasterizer)
881 {
882 struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
883
884 cso->templ = *rasterizer;
885 cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
886 cso->light_twoside = rasterizer->light_twoside;
887 cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
888 cso->ds[1].f = rasterizer->offset_scale;
889 if (rasterizer->poly_stipple_enable) {
890 cso->st |= ST1_ENABLE;
891 }
892
893 if (rasterizer->scissor)
894 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
895 else
896 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
897
898 switch (rasterizer->cull_face) {
899 case PIPE_FACE_NONE:
900 cso->LIS4 |= S4_CULLMODE_NONE;
901 break;
902 case PIPE_FACE_FRONT:
903 if (rasterizer->front_ccw)
904 cso->LIS4 |= S4_CULLMODE_CCW;
905 else
906 cso->LIS4 |= S4_CULLMODE_CW;
907 break;
908 case PIPE_FACE_BACK:
909 if (rasterizer->front_ccw)
910 cso->LIS4 |= S4_CULLMODE_CW;
911 else
912 cso->LIS4 |= S4_CULLMODE_CCW;
913 break;
914 case PIPE_FACE_FRONT_AND_BACK:
915 cso->LIS4 |= S4_CULLMODE_BOTH;
916 break;
917 }
918
919 {
920 int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
921
922 cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
923
924 if (rasterizer->line_smooth)
925 cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
926 }
927
928 {
929 int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
930
931 cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
932 }
933
934 if (rasterizer->flatshade) {
935 cso->LIS4 |= (S4_FLATSHADE_ALPHA |
936 S4_FLATSHADE_COLOR |
937 S4_FLATSHADE_SPECULAR);
938 }
939
940 cso->LIS7 = fui( rasterizer->offset_units );
941
942
943 return cso;
944 }
945
946 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
947 void *raster )
948 {
949 struct i915_context *i915 = i915_context(pipe);
950
951 if (i915->rasterizer == raster)
952 return;
953
954 i915->rasterizer = (struct i915_rasterizer_state *)raster;
955
956 /* pass-through to draw module */
957 draw_set_rasterizer_state(i915->draw,
958 (i915->rasterizer ? &(i915->rasterizer->templ) : NULL),
959 raster);
960
961 i915->dirty |= I915_NEW_RASTERIZER;
962 }
963
964 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
965 void *raster)
966 {
967 FREE(raster);
968 }
969
970 static void i915_set_vertex_buffers(struct pipe_context *pipe,
971 unsigned start_slot, unsigned count,
972 const struct pipe_vertex_buffer *buffers)
973 {
974 struct i915_context *i915 = i915_context(pipe);
975 struct draw_context *draw = i915->draw;
976
977 util_set_vertex_buffers_count(i915->vertex_buffers,
978 &i915->nr_vertex_buffers,
979 buffers, start_slot, count);
980
981 /* pass-through to draw module */
982 draw_set_vertex_buffers(draw, start_slot, count, buffers);
983 }
984
985 static void *
986 i915_create_vertex_elements_state(struct pipe_context *pipe,
987 unsigned count,
988 const struct pipe_vertex_element *attribs)
989 {
990 struct i915_velems_state *velems;
991 assert(count <= PIPE_MAX_ATTRIBS);
992 velems = (struct i915_velems_state *) MALLOC(sizeof(struct i915_velems_state));
993 if (velems) {
994 velems->count = count;
995 memcpy(velems->velem, attribs, sizeof(*attribs) * count);
996 }
997 return velems;
998 }
999
1000 static void
1001 i915_bind_vertex_elements_state(struct pipe_context *pipe,
1002 void *velems)
1003 {
1004 struct i915_context *i915 = i915_context(pipe);
1005 struct i915_velems_state *i915_velems = (struct i915_velems_state *) velems;
1006
1007 if (i915->velems == velems)
1008 return;
1009
1010 i915->velems = velems;
1011
1012 /* pass-through to draw module */
1013 if (i915_velems) {
1014 draw_set_vertex_elements(i915->draw,
1015 i915_velems->count, i915_velems->velem);
1016 }
1017 }
1018
1019 static void
1020 i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
1021 {
1022 FREE( velems );
1023 }
1024
1025 static void i915_set_index_buffer(struct pipe_context *pipe,
1026 const struct pipe_index_buffer *ib)
1027 {
1028 struct i915_context *i915 = i915_context(pipe);
1029
1030 if (ib)
1031 memcpy(&i915->index_buffer, ib, sizeof(i915->index_buffer));
1032 else
1033 memset(&i915->index_buffer, 0, sizeof(i915->index_buffer));
1034 }
1035
1036 static void
1037 i915_set_sample_mask(struct pipe_context *pipe,
1038 unsigned sample_mask)
1039 {
1040 }
1041
1042 void
1043 i915_init_state_functions( struct i915_context *i915 )
1044 {
1045 i915->base.create_blend_state = i915_create_blend_state;
1046 i915->base.bind_blend_state = i915_bind_blend_state;
1047 i915->base.delete_blend_state = i915_delete_blend_state;
1048
1049 i915->base.create_sampler_state = i915_create_sampler_state;
1050 i915->base.bind_sampler_states = i915_bind_sampler_states;
1051 i915->base.delete_sampler_state = i915_delete_sampler_state;
1052
1053 i915->base.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
1054 i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
1055 i915->base.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
1056
1057 i915->base.create_rasterizer_state = i915_create_rasterizer_state;
1058 i915->base.bind_rasterizer_state = i915_bind_rasterizer_state;
1059 i915->base.delete_rasterizer_state = i915_delete_rasterizer_state;
1060 i915->base.create_fs_state = i915_create_fs_state;
1061 i915->base.bind_fs_state = i915_bind_fs_state;
1062 i915->base.delete_fs_state = i915_delete_fs_state;
1063 i915->base.create_vs_state = i915_create_vs_state;
1064 i915->base.bind_vs_state = i915_bind_vs_state;
1065 i915->base.delete_vs_state = i915_delete_vs_state;
1066 i915->base.create_vertex_elements_state = i915_create_vertex_elements_state;
1067 i915->base.bind_vertex_elements_state = i915_bind_vertex_elements_state;
1068 i915->base.delete_vertex_elements_state = i915_delete_vertex_elements_state;
1069
1070 i915->base.set_blend_color = i915_set_blend_color;
1071 i915->base.set_stencil_ref = i915_set_stencil_ref;
1072 i915->base.set_clip_state = i915_set_clip_state;
1073 i915->base.set_sample_mask = i915_set_sample_mask;
1074 i915->base.set_constant_buffer = i915_set_constant_buffer;
1075 i915->base.set_framebuffer_state = i915_set_framebuffer_state;
1076
1077 i915->base.set_polygon_stipple = i915_set_polygon_stipple;
1078 i915->base.set_scissor_states = i915_set_scissor_states;
1079 i915->base.set_fragment_sampler_views = i915_set_fragment_sampler_views;
1080 i915->base.set_vertex_sampler_views = i915_set_vertex_sampler_views;
1081 i915->base.create_sampler_view = i915_create_sampler_view;
1082 i915->base.sampler_view_destroy = i915_sampler_view_destroy;
1083 i915->base.set_viewport_states = i915_set_viewport_states;
1084 i915->base.set_vertex_buffers = i915_set_vertex_buffers;
1085 i915->base.set_index_buffer = i915_set_index_buffer;
1086 }