src/gallium/drivers/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "pipe/p_context.h"
  29
  30 #include "util/u_upload_mgr.h"
  31 #include "util/u_math.h"
  32
  33 #include "brw_draw.h"
  34 #include "brw_defines.h"
  35 #include "brw_context.h"
  36 #include "brw_state.h"
  37 #include "brw_screen.h"
  38 #include "brw_batchbuffer.h"
  39 #include "brw_debug.h"
  40
  41
  42
  43
  44 static unsigned brw_translate_surface_format( unsigned id )
  45 {
  46    switch (id) {
  47    case PIPE_FORMAT_R64_FLOAT:
  48       return BRW_SURFACEFORMAT_R64_FLOAT;
  49    case PIPE_FORMAT_R64G64_FLOAT:
  50       return BRW_SURFACEFORMAT_R64G64_FLOAT;
  51    case PIPE_FORMAT_R64G64B64_FLOAT:
  52       return BRW_SURFACEFORMAT_R64G64B64_FLOAT;
  53    case PIPE_FORMAT_R64G64B64A64_FLOAT:
  54       return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT;
  55
  56    case PIPE_FORMAT_R32_FLOAT:
  57       return BRW_SURFACEFORMAT_R32_FLOAT;
  58    case PIPE_FORMAT_R32G32_FLOAT:
  59       return BRW_SURFACEFORMAT_R32G32_FLOAT;
  60    case PIPE_FORMAT_R32G32B32_FLOAT:
  61       return BRW_SURFACEFORMAT_R32G32B32_FLOAT;
  62    case PIPE_FORMAT_R32G32B32A32_FLOAT:
  63       return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT;
  64
  65    case PIPE_FORMAT_R32_UNORM:
  66       return BRW_SURFACEFORMAT_R32_UNORM;
  67    case PIPE_FORMAT_R32G32_UNORM:
  68       return BRW_SURFACEFORMAT_R32G32_UNORM;
  69    case PIPE_FORMAT_R32G32B32_UNORM:
  70       return BRW_SURFACEFORMAT_R32G32B32_UNORM;
  71    case PIPE_FORMAT_R32G32B32A32_UNORM:
  72       return BRW_SURFACEFORMAT_R32G32B32A32_UNORM;
  73
  74    case PIPE_FORMAT_R32_USCALED:
  75       return BRW_SURFACEFORMAT_R32_USCALED;
  76    case PIPE_FORMAT_R32G32_USCALED:
  77       return BRW_SURFACEFORMAT_R32G32_USCALED;
  78    case PIPE_FORMAT_R32G32B32_USCALED:
  79       return BRW_SURFACEFORMAT_R32G32B32_USCALED;
  80    case PIPE_FORMAT_R32G32B32A32_USCALED:
  81       return BRW_SURFACEFORMAT_R32G32B32A32_USCALED;
  82
  83    case PIPE_FORMAT_R32_SNORM:
  84       return BRW_SURFACEFORMAT_R32_SNORM;
  85    case PIPE_FORMAT_R32G32_SNORM:
  86       return BRW_SURFACEFORMAT_R32G32_SNORM;
  87    case PIPE_FORMAT_R32G32B32_SNORM:
  88       return BRW_SURFACEFORMAT_R32G32B32_SNORM;
  89    case PIPE_FORMAT_R32G32B32A32_SNORM:
  90       return BRW_SURFACEFORMAT_R32G32B32A32_SNORM;
  91
  92    case PIPE_FORMAT_R32_SSCALED:
  93       return BRW_SURFACEFORMAT_R32_SSCALED;
  94    case PIPE_FORMAT_R32G32_SSCALED:
  95       return BRW_SURFACEFORMAT_R32G32_SSCALED;
  96    case PIPE_FORMAT_R32G32B32_SSCALED:
  97       return BRW_SURFACEFORMAT_R32G32B32_SSCALED;
  98    case PIPE_FORMAT_R32G32B32A32_SSCALED:
  99       return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED;
 100
 101    case PIPE_FORMAT_R16_UNORM:
 102       return BRW_SURFACEFORMAT_R16_UNORM;
 103    case PIPE_FORMAT_R16G16_UNORM:
 104       return BRW_SURFACEFORMAT_R16G16_UNORM;
 105    case PIPE_FORMAT_R16G16B16_UNORM:
 106       return BRW_SURFACEFORMAT_R16G16B16_UNORM;
 107    case PIPE_FORMAT_R16G16B16A16_UNORM:
 108       return BRW_SURFACEFORMAT_R16G16B16A16_UNORM;
 109
 110    case PIPE_FORMAT_R16_USCALED:
 111       return BRW_SURFACEFORMAT_R16_USCALED;
 112    case PIPE_FORMAT_R16G16_USCALED:
 113       return BRW_SURFACEFORMAT_R16G16_USCALED;
 114    case PIPE_FORMAT_R16G16B16_USCALED:
 115       return BRW_SURFACEFORMAT_R16G16B16_USCALED;
 116    case PIPE_FORMAT_R16G16B16A16_USCALED:
 117       return BRW_SURFACEFORMAT_R16G16B16A16_USCALED;
 118
 119    case PIPE_FORMAT_R16_SNORM:
 120       return BRW_SURFACEFORMAT_R16_SNORM;
 121    case PIPE_FORMAT_R16G16_SNORM:
 122       return BRW_SURFACEFORMAT_R16G16_SNORM;
 123    case PIPE_FORMAT_R16G16B16_SNORM:
 124       return BRW_SURFACEFORMAT_R16G16B16_SNORM;
 125    case PIPE_FORMAT_R16G16B16A16_SNORM:
 126       return BRW_SURFACEFORMAT_R16G16B16A16_SNORM;
 127
 128    case PIPE_FORMAT_R16_SSCALED:
 129       return BRW_SURFACEFORMAT_R16_SSCALED;
 130    case PIPE_FORMAT_R16G16_SSCALED:
 131       return BRW_SURFACEFORMAT_R16G16_SSCALED;
 132    case PIPE_FORMAT_R16G16B16_SSCALED:
 133       return BRW_SURFACEFORMAT_R16G16B16_SSCALED;
 134    case PIPE_FORMAT_R16G16B16A16_SSCALED:
 135       return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED;
 136
 137    case PIPE_FORMAT_R8_UNORM:
 138       return BRW_SURFACEFORMAT_R8_UNORM;
 139    case PIPE_FORMAT_R8G8_UNORM:
 140       return BRW_SURFACEFORMAT_R8G8_UNORM;
 141    case PIPE_FORMAT_R8G8B8_UNORM:
 142       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
 143    case PIPE_FORMAT_R8G8B8A8_UNORM:
 144       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
 145
 146    case PIPE_FORMAT_R8_USCALED:
 147       return BRW_SURFACEFORMAT_R8_USCALED;
 148    case PIPE_FORMAT_R8G8_USCALED:
 149       return BRW_SURFACEFORMAT_R8G8_USCALED;
 150    case PIPE_FORMAT_R8G8B8_USCALED:
 151       return BRW_SURFACEFORMAT_R8G8B8_USCALED;
 152    case PIPE_FORMAT_R8G8B8A8_USCALED:
 153       return BRW_SURFACEFORMAT_R8G8B8A8_USCALED;
 154
 155    case PIPE_FORMAT_R8_SNORM:
 156       return BRW_SURFACEFORMAT_R8_SNORM;
 157    case PIPE_FORMAT_R8G8_SNORM:
 158       return BRW_SURFACEFORMAT_R8G8_SNORM;
 159    case PIPE_FORMAT_R8G8B8_SNORM:
 160       return BRW_SURFACEFORMAT_R8G8B8_SNORM;
 161    case PIPE_FORMAT_R8G8B8A8_SNORM:
 162       return BRW_SURFACEFORMAT_R8G8B8A8_SNORM;
 163
 164    case PIPE_FORMAT_R8_SSCALED:
 165       return BRW_SURFACEFORMAT_R8_SSCALED;
 166    case PIPE_FORMAT_R8G8_SSCALED:
 167       return BRW_SURFACEFORMAT_R8G8_SSCALED;
 168    case PIPE_FORMAT_R8G8B8_SSCALED:
 169       return BRW_SURFACEFORMAT_R8G8B8_SSCALED;
 170    case PIPE_FORMAT_R8G8B8A8_SSCALED:
 171       return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED;
 172
 173    default:
 174       assert(0);
 175       return 0;
 176    }
 177 }
 178
 179 static unsigned get_index_type(int type)
 180 {
 181    switch (type) {
 182    case 1: return BRW_INDEX_BYTE;
 183    case 2: return BRW_INDEX_WORD;
 184    case 4: return BRW_INDEX_DWORD;
 185    default: assert(0); return 0;
 186    }
 187 }
 188
 189
 190 static int brw_prepare_vertices(struct brw_context *brw)
 191 {
 192    unsigned int min_index = brw->curr.min_index;
 193    unsigned int max_index = brw->curr.max_index;
 194    GLuint i;
 195    int ret;
 196
 197    if (BRW_DEBUG & DEBUG_VERTS)
 198       debug_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 199
 200
 201    for (i = 0; i < brw->curr.num_vertex_buffers; i++) {
 202       struct pipe_vertex_buffer *vb = &brw->curr.vertex_buffer[i];
 203       struct brw_winsys_buffer *bo;
 204       struct pipe_buffer *upload_buf = NULL;
 205       unsigned offset;
 206
 207       if (BRW_DEBUG & DEBUG_VERTS)
 208          debug_printf("%s vb[%d] user:%d offset:0x%x sz:0x%x stride:0x%x\n",
 209                       __FUNCTION__, i,
 210                       brw_buffer_is_user_buffer(vb->buffer),
 211                       vb->buffer_offset,
 212                       vb->buffer->size,
 213                       vb->stride);
 214
 215       if (brw_buffer_is_user_buffer(vb->buffer)) {
 216
 217          /* XXX: simplify this.  Stop the state trackers from generating
 218           * zero-stride buffers & have them use additional constants (or
 219           * add support for >1 constant buffer) instead.
 220           */
 221          unsigned size = (vb->stride == 0 ?
 222                           vb->buffer->size - vb->buffer_offset :
 223                           MAX2(vb->buffer->size - vb->buffer_offset,
 224                                vb->stride * (max_index + 1 - min_index)));
 225
 226          ret = u_upload_buffer( brw->vb.upload_vertex,
 227                                 vb->buffer_offset + min_index * vb->stride,
 228                                 size,
 229                                 vb->buffer,
 230                                 &offset,
 231                                 &upload_buf );
 232          if (ret)
 233             return ret;
 234
 235          bo = brw_buffer(upload_buf)->bo;
 236
 237          assert(offset + size <= bo->size);
 238       }
 239       else
 240       {
 241          offset = vb->buffer_offset;
 242          bo = brw_buffer(vb->buffer)->bo;
 243       }
 244
 245       assert(offset < bo->size);
 246
 247       /* Set up post-upload info about this vertex buffer:
 248        */
 249       brw->vb.vb[i].offset = offset;
 250       brw->vb.vb[i].stride = vb->stride;
 251       brw->vb.vb[i].vertex_count = (vb->stride == 0 ?
 252                                     1 :
 253                                     (bo->size - offset) / vb->stride);
 254
 255       bo_reference( &brw->vb.vb[i].bo,  bo );
 256
 257       /* Don't need to retain this reference.  We have a reference on
 258        * the underlying winsys buffer:
 259        */
 260       pipe_buffer_reference( &upload_buf, NULL );
 261    }
 262
 263    brw->vb.nr_vb = i;
 264    brw_prepare_query_begin(brw);
 265
 266    for (i = 0; i < brw->vb.nr_vb; i++) {
 267       brw_add_validated_bo(brw, brw->vb.vb[i].bo);
 268    }
 269
 270    return 0;
 271 }
 272
 273 static int brw_emit_vertex_buffers( struct brw_context *brw )
 274 {
 275    int i;
 276
 277    /* If the VS doesn't read any inputs (calculating vertex position from
 278     * a state variable for some reason, for example), just bail.
 279     *
 280     * The stale VB state stays in place, but they don't do anything unless
 281     * a VE loads from them.
 282     */
 283    if (brw->vb.nr_vb == 0) {
 284       if (BRW_DEBUG & DEBUG_VERTS)
 285          debug_printf("%s: no active vertex buffers\n", __FUNCTION__);
 286
 287       return 0;
 288    }
 289
 290    /* Emit VB state packets.
 291     */
 292    BEGIN_BATCH(1 + brw->vb.nr_vb * 4, IGNORE_CLIPRECTS);
 293    OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
 294              ((1 + brw->vb.nr_vb * 4) - 2));
 295
 296    for (i = 0; i < brw->vb.nr_vb; i++) {
 297       OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
 298                 BRW_VB0_ACCESS_VERTEXDATA |
 299                 (brw->vb.vb[i].stride << BRW_VB0_PITCH_SHIFT));
 300       OUT_RELOC(brw->vb.vb[i].bo,
 301                 BRW_USAGE_VERTEX,
 302                 brw->vb.vb[i].offset);
 303       if (BRW_IS_IGDNG(brw)) {
 304          OUT_RELOC(brw->vb.vb[i].bo,
 305                    BRW_USAGE_VERTEX,
 306                    brw->vb.vb[i].bo->size - 1);
 307       } else
 308          OUT_BATCH(brw->vb.vb[i].stride ? brw->vb.vb[i].vertex_count : 0);
 309       OUT_BATCH(0); /* Instance data step rate */
 310    }
 311    ADVANCE_BATCH();
 312    return 0;
 313 }
 314
 315
 316
 317
 318 static int brw_emit_vertex_elements(struct brw_context *brw)
 319 {
 320    GLuint nr = brw->curr.num_vertex_elements;
 321    GLuint i;
 322
 323    brw_emit_query_begin(brw);
 324
 325    /* If the VS doesn't read any inputs (calculating vertex position from
 326     * a state variable for some reason, for example), emit a single pad
 327     * VERTEX_ELEMENT struct and bail.
 328     *
 329     * The stale VB state stays in place, but they don't do anything unless
 330     * a VE loads from them.
 331     */
 332    if (nr == 0) {
 333       BEGIN_BATCH(3, IGNORE_CLIPRECTS);
 334       OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
 335       OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 336                 BRW_VE0_VALID |
 337                 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 338                 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 339       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 340                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 341                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 342                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 343       ADVANCE_BATCH();
 344       return 0;
 345    }
 346
 347    /* Now emit vertex element (VEP) state packets.
 348     *
 349     */
 350    BEGIN_BATCH(1 + nr * 2, IGNORE_CLIPRECTS);
 351    OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + nr * 2) - 2));
 352    for (i = 0; i < nr; i++) {
 353       const struct pipe_vertex_element *input = &brw->curr.vertex_element[i];
 354       uint32_t format = brw_translate_surface_format( input->src_format );
 355       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 356       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 357       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 358       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 359
 360       switch (input->nr_components) {
 361       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 362       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 363       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 364       case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
 365          break;
 366       }
 367
 368       OUT_BATCH((input->vertex_buffer_index << BRW_VE0_INDEX_SHIFT) |
 369                 BRW_VE0_VALID |
 370                 (format << BRW_VE0_FORMAT_SHIFT) |
 371                 (input->src_offset << BRW_VE0_SRC_OFFSET_SHIFT));
 372
 373       if (BRW_IS_IGDNG(brw))
 374           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 375                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 376                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 377                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 378       else
 379           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 380                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 381                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 382                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 383                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 384    }
 385    ADVANCE_BATCH();
 386    return 0;
 387 }
 388
 389
 390 static int brw_emit_vertices( struct brw_context *brw )
 391 {
 392    int ret;
 393
 394    ret = brw_emit_vertex_buffers( brw );
 395    if (ret)
 396       return ret;
 397
 398    ret = brw_emit_vertex_elements( brw );
 399    if (ret)
 400       return ret;
 401
 402    return 0;
 403 }
 404
 405
 406 const struct brw_tracked_state brw_vertices = {
 407    .dirty = {
 408       .mesa = (PIPE_NEW_INDEX_RANGE |
 409                PIPE_NEW_VERTEX_BUFFER),
 410       .brw = BRW_NEW_BATCH,
 411       .cache = 0,
 412    },
 413    .prepare = brw_prepare_vertices,
 414    .emit = brw_emit_vertices,
 415 };
 416
 417
 418 static int brw_prepare_indices(struct brw_context *brw)
 419 {
 420    struct pipe_buffer *index_buffer = brw->curr.index_buffer;
 421    struct pipe_buffer *upload_buf = NULL;
 422    struct brw_winsys_buffer *bo = NULL;
 423    GLuint offset;
 424    GLuint index_size;
 425    GLuint ib_size;
 426    int ret;
 427
 428    if (index_buffer == NULL)
 429       return 0;
 430
 431    if (BRW_DEBUG & DEBUG_VERTS)
 432       debug_printf("%s: index_size:%d index_buffer->size:%d\n",
 433                    __FUNCTION__,
 434                    brw->curr.index_size,
 435                    brw->curr.index_buffer->size);
 436
 437    ib_size = index_buffer->size;
 438    index_size = brw->curr.index_size;
 439
 440    /* Turn userbuffer into a proper hardware buffer?
 441     */
 442    if (brw_buffer_is_user_buffer(index_buffer)) {
 443
 444       ret = u_upload_buffer( brw->vb.upload_index,
 445                              0,
 446                              ib_size,
 447                              index_buffer,
 448                              &offset,
 449                              &upload_buf );
 450       if (ret)
 451          return ret;
 452
 453       bo = brw_buffer(upload_buf)->bo;
 454
 455       /* XXX: annotate the userbuffer with the upload information so
 456        * that successive calls don't get re-uploaded.
 457        */
 458    }
 459    else {
 460       bo = brw_buffer(index_buffer)->bo;
 461       ib_size = bo->size;
 462       offset = 0;
 463    }
 464
 465    /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading the
 466     * index buffer state when we're just moving the start index of our
 467     * drawing.
 468     *
 469     * In gallium this will happen in the case where successive draw
 470     * calls are made with (distinct?) userbuffers, but the upload_mgr
 471     * places the data into a single winsys buffer.
 472     *
 473     * This statechange doesn't raise any state flags and is always
 474     * just merged into the final draw packet:
 475     */
 476    if (1) {
 477       assert((offset & (index_size - 1)) == 0);
 478       brw->ib.start_vertex_offset = offset / index_size;
 479    }
 480
 481    /* These statechanges trigger a new CMD_INDEX_BUFFER packet:
 482     */
 483    if (brw->ib.bo != bo ||
 484        brw->ib.size != ib_size)
 485    {
 486       bo_reference(&brw->ib.bo, bo);
 487       brw->ib.size = ib_size;
 488       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 489    }
 490
 491    pipe_buffer_reference( &upload_buf, NULL );
 492    brw_add_validated_bo(brw, brw->ib.bo);
 493    return 0;
 494 }
 495
 496 const struct brw_tracked_state brw_indices = {
 497    .dirty = {
 498       .mesa = PIPE_NEW_INDEX_BUFFER,
 499       .brw = 0,
 500       .cache = 0,
 501    },
 502    .prepare = brw_prepare_indices,
 503 };
 504
 505 static int brw_emit_index_buffer(struct brw_context *brw)
 506 {
 507    /* Emit the indexbuffer packet:
 508     */
 509    if (brw->ib.bo)
 510    {
 511       struct brw_indexbuffer ib;
 512
 513       memset(&ib, 0, sizeof(ib));
 514
 515       ib.header.bits.opcode = CMD_INDEX_BUFFER;
 516       ib.header.bits.length = sizeof(ib)/4 - 2;
 517       ib.header.bits.index_format = get_index_type(brw->ib.size);
 518       ib.header.bits.cut_index_enable = 0;
 519
 520       BEGIN_BATCH(4, IGNORE_CLIPRECTS);
 521       OUT_BATCH( ib.header.dword );
 522       OUT_RELOC(brw->ib.bo,
 523                 BRW_USAGE_VERTEX,
 524                 brw->ib.offset);
 525       OUT_RELOC(brw->ib.bo,
 526                 BRW_USAGE_VERTEX,
 527                 brw->ib.offset + brw->ib.size - 1);
 528       OUT_BATCH( 0 );
 529       ADVANCE_BATCH();
 530    }
 531
 532    return 0;
 533 }
 534
 535 const struct brw_tracked_state brw_index_buffer = {
 536    .dirty = {
 537       .mesa = 0,
 538       .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
 539       .cache = 0,
 540    },
 541    .emit = brw_emit_index_buffer,
 542 };