src/gallium/drivers/i965/brw_state_debug.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27
  28
  29
  30 #include "brw_context.h"
  31 #include "brw_state.h"
  32
  33
  34 struct dirty_bit_map {
  35    uint32_t bit;
  36    char *name;
  37    uint32_t count;
  38 };
  39
  40 #define DEFINE_BIT(name) {name, #name, 0}
  41
  42 static struct dirty_bit_map mesa_bits[] = {
  43    DEFINE_BIT(PIPE_NEW_DEPTH_STENCIL_ALPHA),
  44    DEFINE_BIT(PIPE_NEW_RAST),
  45    DEFINE_BIT(PIPE_NEW_BLEND),
  46    DEFINE_BIT(PIPE_NEW_VIEWPORT),
  47    DEFINE_BIT(PIPE_NEW_SAMPLERS),
  48    DEFINE_BIT(PIPE_NEW_VERTEX_BUFFER),
  49    DEFINE_BIT(PIPE_NEW_VERTEX_ELEMENT),
  50    DEFINE_BIT(PIPE_NEW_FRAGMENT_SHADER),
  51    DEFINE_BIT(PIPE_NEW_VERTEX_SHADER),
  52    DEFINE_BIT(PIPE_NEW_FRAGMENT_CONSTANTS),
  53    DEFINE_BIT(PIPE_NEW_VERTEX_CONSTANTS),
  54    DEFINE_BIT(PIPE_NEW_CLIP),
  55    DEFINE_BIT(PIPE_NEW_INDEX_BUFFER),
  56    DEFINE_BIT(PIPE_NEW_INDEX_RANGE),
  57    DEFINE_BIT(PIPE_NEW_BLEND_COLOR),
  58    DEFINE_BIT(PIPE_NEW_POLYGON_STIPPLE),
  59    DEFINE_BIT(PIPE_NEW_FRAMEBUFFER_DIMENSIONS),
  60    DEFINE_BIT(PIPE_NEW_DEPTH_BUFFER),
  61    DEFINE_BIT(PIPE_NEW_COLOR_BUFFERS),
  62    DEFINE_BIT(PIPE_NEW_QUERY),
  63    DEFINE_BIT(PIPE_NEW_SCISSOR),
  64    DEFINE_BIT(PIPE_NEW_BOUND_TEXTURES),
  65    DEFINE_BIT(PIPE_NEW_NR_CBUFS),
  66    {0, 0, 0}
  67 };
  68
  69 static struct dirty_bit_map brw_bits[] = {
  70    DEFINE_BIT(BRW_NEW_URB_FENCE),
  71    DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
  72    DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
  73    DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS),
  74    DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
  75    DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
  76    DEFINE_BIT(BRW_NEW_PRIMITIVE),
  77    DEFINE_BIT(BRW_NEW_CONTEXT),
  78    DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
  79    DEFINE_BIT(BRW_NEW_PSP),
  80    DEFINE_BIT(BRW_NEW_WM_SURFACES),
  81    DEFINE_BIT(BRW_NEW_xxx),
  82    DEFINE_BIT(BRW_NEW_INDICES),
  83    {0, 0, 0}
  84 };
  85
  86 static struct dirty_bit_map cache_bits[] = {
  87    DEFINE_BIT(CACHE_NEW_CC_VP),
  88    DEFINE_BIT(CACHE_NEW_CC_UNIT),
  89    DEFINE_BIT(CACHE_NEW_WM_PROG),
  90    DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR),
  91    DEFINE_BIT(CACHE_NEW_SAMPLER),
  92    DEFINE_BIT(CACHE_NEW_WM_UNIT),
  93    DEFINE_BIT(CACHE_NEW_SF_PROG),
  94    DEFINE_BIT(CACHE_NEW_SF_VP),
  95    DEFINE_BIT(CACHE_NEW_SF_UNIT),
  96    DEFINE_BIT(CACHE_NEW_VS_UNIT),
  97    DEFINE_BIT(CACHE_NEW_VS_PROG),
  98    DEFINE_BIT(CACHE_NEW_GS_UNIT),
  99    DEFINE_BIT(CACHE_NEW_GS_PROG),
 100    DEFINE_BIT(CACHE_NEW_CLIP_VP),
 101    DEFINE_BIT(CACHE_NEW_CLIP_UNIT),
 102    DEFINE_BIT(CACHE_NEW_CLIP_PROG),
 103    DEFINE_BIT(CACHE_NEW_SURFACE),
 104    DEFINE_BIT(CACHE_NEW_SURF_BIND),
 105    {0, 0, 0}
 106 };
 107
 108
 109 static void
 110 brw_update_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
 111 {
 112    int i;
 113
 114    for (i = 0; i < 32; i++) {
 115       if (bit_map[i].bit == 0)
 116          return;
 117
 118       if (bit_map[i].bit & bits)
 119          bit_map[i].count++;
 120    }
 121 }
 122
 123 static void
 124 brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
 125 {
 126    int i;
 127
 128    for (i = 0; i < 32; i++) {
 129       if (bit_map[i].bit == 0)
 130          return;
 131
 132       debug_printf("0x%08x: %12d (%s)\n",
 133               bit_map[i].bit, bit_map[i].count, bit_map[i].name);
 134    }
 135 }
 136
 137 void
 138 brw_update_dirty_counts( unsigned mesa,
 139                          unsigned brw,
 140                          unsigned cache )
 141 {
 142    static int dirty_count = 0;
 143
 144    brw_update_dirty_count(mesa_bits, mesa);
 145    brw_update_dirty_count(brw_bits, brw);
 146    brw_update_dirty_count(cache_bits, cache);
 147       if (dirty_count++ % 1000 == 0) {
 148          brw_print_dirty_count(mesa_bits, mesa);
 149          brw_print_dirty_count(brw_bits, brw);
 150          brw_print_dirty_count(cache_bits, cache);
 151          debug_printf("\n");
 152       }
 153 }