src/gallium/drivers/i965simple/brw_gs_emit.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "brw_defines.h"
  33 #include "brw_context.h"
  34 #include "brw_eu.h"
  35 #include "brw_util.h"
  36 #include "brw_gs.h"
  37
  38 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
  39                                unsigned nr_verts )
  40 {
  41    unsigned i = 0,j;
  42
  43    /* Register usage is static, precompute here:
  44     */
  45    c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
  46
  47    /* Payload vertices plus space for more generated vertices:
  48     */
  49    for (j = 0; j < nr_verts; j++) {
  50       c->reg.vertex[j] = brw_vec4_grf(i, 0);
  51       i += c->nr_regs;
  52    }
  53
  54    c->prog_data.urb_read_length = c->nr_regs;
  55    c->prog_data.total_grf = i;
  56 }
  57
  58
  59 static void brw_gs_emit_vue(struct brw_gs_compile *c,
  60                             struct brw_reg vert,
  61                             boolean last,
  62                             unsigned header)
  63 {
  64    struct brw_compile *p = &c->func;
  65    boolean allocate = !last;
  66
  67    /* Overwrite PrimType and PrimStart in the message header, for
  68     * each vertex in turn:
  69     */
  70    brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
  71
  72    /* Copy the vertex from vertn into m1..mN+1:
  73     */
  74    brw_copy8(p, brw_message_reg(1), vert, c->nr_regs);
  75
  76    /* Send each vertex as a seperate write to the urb.  This is
  77     * different to the concept in brw_sf_emit.c, where subsequent
  78     * writes are used to build up a single urb entry.  Each of these
  79     * writes instantiates a seperate urb entry, and a new one must be
  80     * allocated each time.
  81     */
  82    brw_urb_WRITE(p,
  83                  allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
  84                  0,
  85                  c->reg.R0,
  86                  allocate,
  87                  1,             /* used */
  88                  c->nr_regs + 1, /* msg length */
  89                  allocate ? 1 : 0, /* response length */
  90                  allocate ? 0 : 1, /* eot */
  91                  1,             /* writes_complete */
  92                  0,             /* urb offset */
  93                  BRW_URB_SWIZZLE_NONE);
  94 }
  95
  96
  97
  98 void brw_gs_quads( struct brw_gs_compile *c )
  99 {
 100    brw_gs_alloc_regs(c, 4);
 101
 102    /* Use polygons for correct edgeflag behaviour. Note that vertex 3
 103     * is the PV for quads, but vertex 0 for polygons:
 104     */
 105    brw_gs_emit_vue(c, c->reg.vertex[3], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 106    brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 107    brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 108    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 109 }
 110
 111 void brw_gs_quad_strip( struct brw_gs_compile *c )
 112 {
 113    brw_gs_alloc_regs(c, 4);
 114
 115    brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 116    brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
 117    brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 118    brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 119 }
 120
 121 void brw_gs_tris( struct brw_gs_compile *c )
 122 {
 123    brw_gs_alloc_regs(c, 3);
 124    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_TRILIST << 2) | R02_PRIM_START));
 125    brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_TRILIST << 2));
 126    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_TRILIST << 2) | R02_PRIM_END));
 127 }
 128
 129 void brw_gs_lines( struct brw_gs_compile *c )
 130 {
 131    brw_gs_alloc_regs(c, 2);
 132    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_START));
 133    brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_END));
 134 }
 135
 136 void brw_gs_points( struct brw_gs_compile *c )
 137 {
 138    brw_gs_alloc_regs(c, 1);
 139    brw_gs_emit_vue(c, c->reg.vertex[0], 1, ((_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END));
 140 }
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