src/gallium/drivers/iris/iris_clear.c

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include "pipe/p_defines.h"
  26 #include "pipe/p_state.h"
  27 #include "pipe/p_context.h"
  28 #include "pipe/p_screen.h"
  29 #include "util/u_inlines.h"
  30 #include "util/u_format.h"
  31 #include "util/u_upload_mgr.h"
  32 #include "util/ralloc.h"
  33 #include "iris_context.h"
  34 #include "iris_resource.h"
  35 #include "iris_screen.h"
  36 #include "intel/compiler/brw_compiler.h"
  37
  38 static void
  39 clear_color(struct iris_context *ice,
  40             struct pipe_resource *p_res,
  41             unsigned level,
  42             const struct pipe_box *box,
  43             bool render_condition_enabled,
  44             enum isl_format format,
  45             union isl_color_value color)
  46 {
  47    struct iris_resource *res = (void *) p_res;
  48
  49    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
  50    const struct gen_device_info *devinfo = &batch->screen->devinfo;
  51    enum blorp_batch_flags blorp_flags = 0;
  52
  53    if (render_condition_enabled) {
  54       if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
  55          return;
  56
  57       if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
  58          blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
  59    }
  60
  61    iris_batch_maybe_flush(batch, 1500);
  62
  63    struct blorp_batch blorp_batch;
  64    blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
  65
  66    bool color_write_disable[4] = { false, false, false, false };
  67    enum isl_aux_usage aux_usage =
  68       iris_resource_render_aux_usage(ice, res, format,
  69                                      false, false);
  70
  71    iris_resource_prepare_render(ice, batch, res, level,
  72                                 box->z, box->depth, aux_usage);
  73
  74    struct blorp_surf surf;
  75    iris_blorp_surf_for_resource(&surf, p_res, aux_usage, true);
  76
  77    if (!isl_format_supports_rendering(devinfo, format) &&
  78        isl_format_is_rgbx(format))
  79       format = isl_format_rgbx_to_rgba(format);
  80
  81    blorp_clear(&blorp_batch, &surf, format, ISL_SWIZZLE_IDENTITY,
  82                level, box->z, box->depth, box->x, box->y,
  83                box->x + box->width, box->y + box->height,
  84                color, color_write_disable);
  85
  86    blorp_batch_finish(&blorp_batch);
  87    iris_flush_and_dirty_for_history(ice, batch, res);
  88
  89    iris_resource_finish_render(ice, res, level,
  90                                box->z, box->depth, aux_usage);
  91 }
  92
  93
  94 static void
  95 clear_depth_stencil(struct iris_context *ice,
  96                     struct pipe_resource *p_res,
  97                     unsigned level,
  98                     const struct pipe_box *box,
  99                     bool render_condition_enabled,
 100                     bool clear_depth,
 101                     bool clear_stencil,
 102                     float depth,
 103                     uint8_t stencil)
 104 {
 105    struct iris_resource *res = (void *) p_res;
 106
 107    struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
 108    enum blorp_batch_flags blorp_flags = 0;
 109
 110    if (render_condition_enabled) {
 111       if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
 112          return;
 113
 114       if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
 115          blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
 116    }
 117
 118    iris_batch_maybe_flush(batch, 1500);
 119
 120    struct blorp_batch blorp_batch;
 121    blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
 122
 123    struct iris_resource *z_res;
 124    struct iris_resource *stencil_res;
 125    struct blorp_surf z_surf;
 126    struct blorp_surf stencil_surf;
 127
 128    iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);
 129
 130    if (z_res) {
 131       iris_resource_prepare_depth(ice, batch, z_res, level, box->z, box->depth);
 132       iris_blorp_surf_for_resource(&z_surf, &z_res->base,
 133                                    z_res->aux.usage, true);
 134    }
 135
 136    if (stencil_res) {
 137       iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
 138                                    stencil_res->aux.usage, true);
 139    }
 140
 141    blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
 142                              level, box->z, box->depth,
 143                              box->x, box->y,
 144                              box->x + box->width,
 145                              box->y + box->height,
 146                              clear_depth && z_res, depth,
 147                              clear_stencil && stencil_res ? 0xff : 0, stencil);
 148
 149    blorp_batch_finish(&blorp_batch);
 150    iris_flush_and_dirty_for_history(ice, batch, res);
 151
 152    if (z_res) {
 153       iris_resource_finish_depth(ice, z_res, level,
 154                                  box->z, box->depth, true);
 155    }
 156 }
 157
 158 /**
 159  * The pipe->clear() driver hook.
 160  *
 161  * This clears buffers attached to the current draw framebuffer.
 162  */
 163 static void
 164 iris_clear(struct pipe_context *ctx,
 165            unsigned buffers,
 166            const union pipe_color_union *p_color,
 167            double depth,
 168            unsigned stencil)
 169 {
 170    struct iris_context *ice = (void *) ctx;
 171    struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
 172
 173    assert(buffers != 0);
 174
 175    if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
 176       struct pipe_surface *psurf = cso_fb->zsbuf;
 177       struct pipe_box box = {
 178          .width = cso_fb->width,
 179          .height = cso_fb->height,
 180          .depth = psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1,
 181          .z = psurf->u.tex.first_layer,
 182       };
 183
 184       clear_depth_stencil(ice, psurf->texture, psurf->u.tex.level, &box, true,
 185                           buffers & PIPE_CLEAR_DEPTH,
 186                           buffers & PIPE_CLEAR_STENCIL,
 187                           depth, stencil);
 188    }
 189
 190    if (buffers & PIPE_CLEAR_COLOR) {
 191       /* pipe_color_union and isl_color_value are interchangeable */
 192       union isl_color_value *color = (void *) p_color;
 193
 194       for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
 195          if (buffers & (PIPE_CLEAR_COLOR0 << i)) {
 196             struct pipe_surface *psurf = cso_fb->cbufs[i];
 197             struct iris_surface *isurf = (void *) psurf;
 198             struct pipe_box box = {
 199                .width = cso_fb->width,
 200                .height = cso_fb->height,
 201                .depth = psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1,
 202                .z = psurf->u.tex.first_layer,
 203             };
 204
 205             clear_color(ice, psurf->texture, psurf->u.tex.level, &box,
 206                         true, isurf->view.format, *color);
 207          }
 208       }
 209    }
 210 }
 211
 212 /**
 213  * The pipe->clear_texture() driver hook.
 214  *
 215  * This clears the given texture resource.
 216  */
 217 static void
 218 iris_clear_texture(struct pipe_context *ctx,
 219                    struct pipe_resource *p_res,
 220                    unsigned level,
 221                    const struct pipe_box *box,
 222                    const void *data)
 223 {
 224    struct iris_context *ice = (void *) ctx;
 225    struct iris_screen *screen = (void *) ctx->screen;
 226    const struct gen_device_info *devinfo = &screen->devinfo;
 227
 228    if (util_format_is_depth_or_stencil(p_res->format)) {
 229       const struct util_format_description *fmt_desc =
 230          util_format_description(p_res->format);
 231
 232       float depth = 0.0;
 233       uint8_t stencil = 0;
 234
 235       if (fmt_desc->unpack_z_float)
 236          fmt_desc->unpack_z_float(&depth, 0, data, 0, 1, 1);
 237
 238       if (fmt_desc->unpack_s_8uint)
 239          fmt_desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1);
 240
 241       clear_depth_stencil(ice, p_res, level, box, true, true, true,
 242                           depth, stencil);
 243    } else {
 244       union isl_color_value color;
 245       struct iris_resource *res = (void *) p_res;
 246       enum isl_format format = res->surf.format;
 247
 248       if (!isl_format_supports_rendering(devinfo, format)) {
 249          const struct isl_format_layout *fmtl = isl_format_get_layout(format);
 250          // XXX: actually just get_copy_format_for_bpb from BLORP
 251          // XXX: don't cut and paste this
 252          switch (fmtl->bpb) {
 253          case 8:   format = ISL_FORMAT_R8_UINT;           break;
 254          case 16:  format = ISL_FORMAT_R8G8_UINT;         break;
 255          case 24:  format = ISL_FORMAT_R8G8B8_UINT;       break;
 256          case 32:  format = ISL_FORMAT_R8G8B8A8_UINT;     break;
 257          case 48:  format = ISL_FORMAT_R16G16B16_UINT;    break;
 258          case 64:  format = ISL_FORMAT_R16G16B16A16_UINT; break;
 259          case 96:  format = ISL_FORMAT_R32G32B32_UINT;    break;
 260          case 128: format = ISL_FORMAT_R32G32B32A32_UINT; break;
 261          default:
 262             unreachable("Unknown format bpb");
 263          }
 264
 265          /* No aux surfaces for non-renderable surfaces */
 266          assert(res->aux.usage == ISL_AUX_USAGE_NONE);
 267       }
 268
 269       isl_color_value_unpack(&color, format, data);
 270
 271       clear_color(ice, p_res, level, box, true, format, color);
 272    }
 273 }
 274
 275 /**
 276  * The pipe->clear_render_target() driver hook.
 277  *
 278  * This clears the given render target surface.
 279  */
 280 static void
 281 iris_clear_render_target(struct pipe_context *ctx,
 282                          struct pipe_surface *psurf,
 283                          const union pipe_color_union *p_color,
 284                          unsigned dst_x, unsigned dst_y,
 285                          unsigned width, unsigned height,
 286                          bool render_condition_enabled)
 287 {
 288    struct iris_context *ice = (void *) ctx;
 289    struct iris_surface *isurf = (void *) psurf;
 290    struct pipe_box box = {
 291       .x = dst_x,
 292       .y = dst_y,
 293       .z = psurf->u.tex.first_layer,
 294       .width = width,
 295       .height = height,
 296       .depth = psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1
 297    };
 298
 299    /* pipe_color_union and isl_color_value are interchangeable */
 300    union isl_color_value *color = (void *) p_color;
 301
 302    clear_color(ice, psurf->texture, psurf->u.tex.level, &box, true,
 303                isurf->view.format, *color);
 304 }
 305
 306 /**
 307  * The pipe->clear_depth_stencil() driver hook.
 308  *
 309  * This clears the given depth/stencil surface.
 310  */
 311 static void
 312 iris_clear_depth_stencil(struct pipe_context *ctx,
 313                          struct pipe_surface *psurf,
 314                          unsigned flags,
 315                          double depth,
 316                          unsigned stencil,
 317                          unsigned dst_x, unsigned dst_y,
 318                          unsigned width, unsigned height,
 319                          bool render_condition_enabled)
 320 {
 321    struct iris_context *ice = (void *) ctx;
 322    struct pipe_box box = {
 323       .x = dst_x,
 324       .y = dst_y,
 325       .z = psurf->u.tex.first_layer,
 326       .width = width,
 327       .height = height,
 328       .depth = psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1
 329    };
 330
 331    assert(util_format_is_depth_or_stencil(psurf->texture->format));
 332
 333    clear_depth_stencil(ice, psurf->texture, psurf->u.tex.level, &box, true,
 334                        flags & PIPE_CLEAR_DEPTH, flags & PIPE_CLEAR_STENCIL,
 335                        depth, stencil);
 336 }
 337
 338 void
 339 iris_init_clear_functions(struct pipe_context *ctx)
 340 {
 341    ctx->clear = iris_clear;
 342    ctx->clear_texture = iris_clear_texture;
 343    ctx->clear_render_target = iris_clear_render_target;
 344    ctx->clear_depth_stencil = iris_clear_depth_stencil;
 345 }