src/gallium/drivers/iris/iris_clear.c

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include "pipe/p_defines.h"
  26 #include "pipe/p_state.h"
  27 #include "pipe/p_context.h"
  28 #include "pipe/p_screen.h"
  29 #include "util/u_inlines.h"
  30 #include "util/u_format.h"
  31 #include "util/u_upload_mgr.h"
  32 #include "util/ralloc.h"
  33 #include "iris_context.h"
  34 #include "iris_resource.h"
  35 #include "iris_screen.h"
  36 #include "intel/compiler/brw_compiler.h"
  37
  38 /**
  39  * The pipe->clear() driver hook.
  40  *
  41  * This clears buffers attached to the current draw framebuffer.
  42  */
  43 static void
  44 iris_clear(struct pipe_context *ctx,
  45            unsigned buffers,
  46            const union pipe_color_union *p_color,
  47            double depth,
  48            unsigned stencil)
  49 {
  50    struct iris_context *ice = (void *) ctx;
  51    struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
  52    assert(buffers != 0);
  53
  54    struct iris_batch *batch = &ice->render_batch;
  55
  56    iris_batch_maybe_flush(batch, 1500);
  57
  58    struct blorp_batch blorp_batch;
  59    blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
  60
  61    if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
  62       struct pipe_surface *psurf = cso_fb->zsbuf;
  63       struct iris_resource *z_res;
  64       struct iris_resource *stencil_res;
  65       struct blorp_surf z_surf;
  66       struct blorp_surf stencil_surf;
  67       const unsigned num_layers =
  68          psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1;
  69
  70       iris_get_depth_stencil_resources(psurf->texture, &z_res, &stencil_res);
  71
  72       if (z_res) {
  73          iris_blorp_surf_for_resource(&z_surf, &z_res->base,
  74                                       ISL_AUX_USAGE_NONE, true);
  75       }
  76
  77       if (stencil_res) {
  78          iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
  79                                       ISL_AUX_USAGE_NONE, true);
  80       }
  81
  82       blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
  83                                 psurf->u.tex.level, psurf->u.tex.first_layer,
  84                                 num_layers, 0, 0, psurf->width, psurf->height,
  85                                 (buffers & PIPE_CLEAR_DEPTH) != 0, depth,
  86                                 (buffers & PIPE_CLEAR_STENCIL) ? 0xff : 0,
  87                                 stencil);
  88    }
  89
  90    if (buffers & PIPE_CLEAR_COLOR) {
  91       /* pipe_color_union and isl_color_value are interchangeable */
  92       union isl_color_value *clear_color = (void *) p_color;
  93       bool color_write_disable[4] = { false, false, false, false };
  94
  95       for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
  96          if (buffers & (PIPE_CLEAR_COLOR0 << i)) {
  97             struct pipe_surface *psurf = cso_fb->cbufs[i];
  98             struct iris_surface *isurf = (void *) psurf;
  99             struct blorp_surf surf;
 100
 101             iris_blorp_surf_for_resource(&surf, psurf->texture,
 102                                          ISL_AUX_USAGE_NONE, true);
 103
 104             blorp_clear(&blorp_batch, &surf, isurf->view.format,
 105                         ISL_SWIZZLE_IDENTITY,
 106                         psurf->u.tex.level, psurf->u.tex.first_layer,
 107                         psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1,
 108                         0, 0, psurf->width, psurf->height,
 109                         *clear_color, color_write_disable);
 110          }
 111       }
 112    }
 113
 114    blorp_batch_finish(&blorp_batch);
 115 }
 116
 117 static void
 118 iris_clear_texture(struct pipe_context *ctx,
 119                    struct pipe_resource *p_res,
 120                    unsigned level,
 121                    const struct pipe_box *box,
 122                    const void *data)
 123 {
 124    struct iris_context *ice = (void *) ctx;
 125    struct iris_resource *res = (void *) p_res;
 126
 127    struct iris_batch *batch = &ice->render_batch;
 128    const struct gen_device_info *devinfo = &batch->screen->devinfo;
 129
 130    iris_batch_maybe_flush(batch, 1500);
 131
 132    struct blorp_batch blorp_batch;
 133    blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
 134
 135    if (util_format_is_depth_or_stencil(p_res->format)) {
 136       const struct util_format_description *fmt_desc =
 137          util_format_description(p_res->format);
 138
 139       struct iris_resource *z_res;
 140       struct iris_resource *stencil_res;
 141       struct blorp_surf z_surf;
 142       struct blorp_surf stencil_surf;
 143
 144       float depth = 0.0;
 145       uint8_t stencil = 0;
 146
 147       iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);
 148
 149       if (z_res) {
 150          iris_blorp_surf_for_resource(&z_surf, &z_res->base,
 151                                       ISL_AUX_USAGE_NONE, true);
 152          fmt_desc->unpack_z_float(&depth, 0, data, 0, 1, 1);
 153       }
 154
 155       if (stencil_res) {
 156          iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
 157                                       ISL_AUX_USAGE_NONE, true);
 158          fmt_desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1);
 159       }
 160
 161       blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
 162                                 level, box->z, box->depth,
 163                                 box->x, box->y,
 164                                 box->x + box->width,
 165                                 box->y + box->height,
 166                                 z_res != NULL, depth,
 167                                 stencil_res ? 0xff : 0, stencil);
 168    } else {
 169       union isl_color_value color;
 170       bool color_write_disable[4] = { false, false, false, false };
 171       struct blorp_surf surf;
 172       iris_blorp_surf_for_resource(&surf, p_res, ISL_AUX_USAGE_NONE, true);
 173
 174       enum isl_format format = res->surf.format;
 175
 176       if (!isl_format_supports_rendering(devinfo, format) &&
 177           isl_format_is_rgbx(format))
 178          format = isl_format_rgbx_to_rgba(format);
 179
 180       if (!isl_format_supports_rendering(devinfo, format)) {
 181          const struct isl_format_layout *fmtl = isl_format_get_layout(format);
 182          // XXX: actually just get_copy_format_for_bpb from BLORP
 183          // XXX: don't cut and paste this
 184          switch (fmtl->bpb) {
 185          case 8:   format = ISL_FORMAT_R8_UINT;           break;
 186          case 16:  format = ISL_FORMAT_R8G8_UINT;         break;
 187          case 24:  format = ISL_FORMAT_R8G8B8_UINT;       break;
 188          case 32:  format = ISL_FORMAT_R8G8B8A8_UINT;     break;
 189          case 48:  format = ISL_FORMAT_R16G16B16_UINT;    break;
 190          case 64:  format = ISL_FORMAT_R16G16B16A16_UINT; break;
 191          case 96:  format = ISL_FORMAT_R32G32B32_UINT;    break;
 192          case 128: format = ISL_FORMAT_R32G32B32A32_UINT; break;
 193          default:
 194             unreachable("Unknown format bpb");
 195          }
 196       }
 197
 198       isl_color_value_unpack(&color, format, data);
 199
 200       blorp_clear(&blorp_batch, &surf, format, ISL_SWIZZLE_IDENTITY,
 201                   level, box->z, box->depth, box->x, box->y,
 202                   box->x + box->width, box->y + box->height,
 203                   color, color_write_disable);
 204    }
 205
 206    blorp_batch_finish(&blorp_batch);
 207 }
 208
 209
 210 static void
 211 iris_clear_render_target(struct pipe_context *ctx,
 212                          struct pipe_surface *dst,
 213                          const union pipe_color_union *color,
 214                          unsigned dst_x, unsigned dst_y,
 215                          unsigned width, unsigned height,
 216                          bool render_condition_enabled)
 217 {
 218    fprintf(stderr, "XXX: iris_clear_render_target\n");
 219 }
 220
 221 static void
 222 iris_clear_depth_stencil(struct pipe_context *ctx,
 223                          struct pipe_surface *dst,
 224                          unsigned clear_flags,
 225                          double depth,
 226                          unsigned stencil,
 227                          unsigned dst_x, unsigned dst_y,
 228                          unsigned width, unsigned height,
 229                          bool render_condition_enabled)
 230 {
 231    fprintf(stderr, "XXX: iris_clear_depth_stencil\n");
 232 }
 233
 234 void
 235 iris_init_clear_functions(struct pipe_context *ctx)
 236 {
 237    ctx->clear = iris_clear;
 238    ctx->clear_texture = iris_clear_texture;
 239    ctx->clear_render_target = iris_clear_render_target;
 240    ctx->clear_depth_stencil = iris_clear_depth_stencil;
 241 }