iris: fix conditional compute, don't stomp predicate for pipelined queries
[mesa.git] / src / gallium / drivers / iris / iris_clear.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <errno.h>
25 #include "pipe/p_defines.h"
26 #include "pipe/p_state.h"
27 #include "pipe/p_context.h"
28 #include "pipe/p_screen.h"
29 #include "util/u_inlines.h"
30 #include "util/u_format.h"
31 #include "util/u_upload_mgr.h"
32 #include "util/ralloc.h"
33 #include "iris_context.h"
34 #include "iris_resource.h"
35 #include "iris_screen.h"
36 #include "intel/compiler/brw_compiler.h"
37
38 /**
39 * The pipe->clear() driver hook.
40 *
41 * This clears buffers attached to the current draw framebuffer.
42 */
43 static void
44 iris_clear(struct pipe_context *ctx,
45 unsigned buffers,
46 const union pipe_color_union *p_color,
47 double depth,
48 unsigned stencil)
49 {
50 struct iris_context *ice = (void *) ctx;
51 struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
52 assert(buffers != 0);
53
54 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
55
56 if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
57 return;
58
59 enum blorp_batch_flags blorp_flags = 0;
60 if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT)
61 blorp_flags |= BLORP_BATCH_PREDICATE_ENABLE;
62
63 iris_batch_maybe_flush(batch, 1500);
64
65 struct blorp_batch blorp_batch;
66 blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
67
68 if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
69 struct pipe_surface *psurf = cso_fb->zsbuf;
70 struct iris_resource *z_res;
71 struct iris_resource *stencil_res;
72 struct blorp_surf z_surf;
73 struct blorp_surf stencil_surf;
74 const unsigned num_layers =
75 psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1;
76
77 iris_get_depth_stencil_resources(psurf->texture, &z_res, &stencil_res);
78
79 if (z_res) {
80 iris_blorp_surf_for_resource(&z_surf, &z_res->base,
81 ISL_AUX_USAGE_NONE, true);
82 }
83
84 if (stencil_res) {
85 iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
86 ISL_AUX_USAGE_NONE, true);
87 }
88
89 blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
90 psurf->u.tex.level, psurf->u.tex.first_layer,
91 num_layers, 0, 0, psurf->width, psurf->height,
92 (buffers & PIPE_CLEAR_DEPTH) != 0, depth,
93 (buffers & PIPE_CLEAR_STENCIL) ? 0xff : 0,
94 stencil);
95 }
96
97 if (buffers & PIPE_CLEAR_COLOR) {
98 /* pipe_color_union and isl_color_value are interchangeable */
99 union isl_color_value *clear_color = (void *) p_color;
100 bool color_write_disable[4] = { false, false, false, false };
101
102 for (unsigned i = 0; i < cso_fb->nr_cbufs; i++) {
103 if (buffers & (PIPE_CLEAR_COLOR0 << i)) {
104 struct pipe_surface *psurf = cso_fb->cbufs[i];
105 struct iris_surface *isurf = (void *) psurf;
106 struct blorp_surf surf;
107
108 iris_blorp_surf_for_resource(&surf, psurf->texture,
109 ISL_AUX_USAGE_NONE, true);
110
111 blorp_clear(&blorp_batch, &surf, isurf->view.format,
112 ISL_SWIZZLE_IDENTITY,
113 psurf->u.tex.level, psurf->u.tex.first_layer,
114 psurf->u.tex.last_layer - psurf->u.tex.first_layer + 1,
115 0, 0, psurf->width, psurf->height,
116 *clear_color, color_write_disable);
117 }
118 }
119 }
120
121 blorp_batch_finish(&blorp_batch);
122 }
123
124 static void
125 iris_clear_texture(struct pipe_context *ctx,
126 struct pipe_resource *p_res,
127 unsigned level,
128 const struct pipe_box *box,
129 const void *data)
130 {
131 struct iris_context *ice = (void *) ctx;
132 struct iris_resource *res = (void *) p_res;
133
134 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
135 const struct gen_device_info *devinfo = &batch->screen->devinfo;
136
137 iris_batch_maybe_flush(batch, 1500);
138
139 struct blorp_batch blorp_batch;
140 blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
141
142 if (util_format_is_depth_or_stencil(p_res->format)) {
143 const struct util_format_description *fmt_desc =
144 util_format_description(p_res->format);
145
146 struct iris_resource *z_res;
147 struct iris_resource *stencil_res;
148 struct blorp_surf z_surf;
149 struct blorp_surf stencil_surf;
150
151 float depth = 0.0;
152 uint8_t stencil = 0;
153
154 iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);
155
156 if (z_res) {
157 iris_blorp_surf_for_resource(&z_surf, &z_res->base,
158 ISL_AUX_USAGE_NONE, true);
159 fmt_desc->unpack_z_float(&depth, 0, data, 0, 1, 1);
160 }
161
162 if (stencil_res) {
163 iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
164 ISL_AUX_USAGE_NONE, true);
165 fmt_desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1);
166 }
167
168 blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
169 level, box->z, box->depth,
170 box->x, box->y,
171 box->x + box->width,
172 box->y + box->height,
173 z_res != NULL, depth,
174 stencil_res ? 0xff : 0, stencil);
175 } else {
176 union isl_color_value color;
177 bool color_write_disable[4] = { false, false, false, false };
178 struct blorp_surf surf;
179 iris_blorp_surf_for_resource(&surf, p_res, ISL_AUX_USAGE_NONE, true);
180
181 enum isl_format format = res->surf.format;
182
183 if (!isl_format_supports_rendering(devinfo, format) &&
184 isl_format_is_rgbx(format))
185 format = isl_format_rgbx_to_rgba(format);
186
187 if (!isl_format_supports_rendering(devinfo, format)) {
188 const struct isl_format_layout *fmtl = isl_format_get_layout(format);
189 // XXX: actually just get_copy_format_for_bpb from BLORP
190 // XXX: don't cut and paste this
191 switch (fmtl->bpb) {
192 case 8: format = ISL_FORMAT_R8_UINT; break;
193 case 16: format = ISL_FORMAT_R8G8_UINT; break;
194 case 24: format = ISL_FORMAT_R8G8B8_UINT; break;
195 case 32: format = ISL_FORMAT_R8G8B8A8_UINT; break;
196 case 48: format = ISL_FORMAT_R16G16B16_UINT; break;
197 case 64: format = ISL_FORMAT_R16G16B16A16_UINT; break;
198 case 96: format = ISL_FORMAT_R32G32B32_UINT; break;
199 case 128: format = ISL_FORMAT_R32G32B32A32_UINT; break;
200 default:
201 unreachable("Unknown format bpb");
202 }
203 }
204
205 isl_color_value_unpack(&color, format, data);
206
207 blorp_clear(&blorp_batch, &surf, format, ISL_SWIZZLE_IDENTITY,
208 level, box->z, box->depth, box->x, box->y,
209 box->x + box->width, box->y + box->height,
210 color, color_write_disable);
211 }
212
213 blorp_batch_finish(&blorp_batch);
214 }
215
216
217 static void
218 iris_clear_render_target(struct pipe_context *ctx,
219 struct pipe_surface *dst,
220 const union pipe_color_union *color,
221 unsigned dst_x, unsigned dst_y,
222 unsigned width, unsigned height,
223 bool render_condition_enabled)
224 {
225 fprintf(stderr, "XXX: iris_clear_render_target\n");
226 }
227
228 static void
229 iris_clear_depth_stencil(struct pipe_context *ctx,
230 struct pipe_surface *dst,
231 unsigned clear_flags,
232 double depth,
233 unsigned stencil,
234 unsigned dst_x, unsigned dst_y,
235 unsigned width, unsigned height,
236 bool render_condition_enabled)
237 {
238 fprintf(stderr, "XXX: iris_clear_depth_stencil\n");
239 }
240
241 void
242 iris_init_clear_functions(struct pipe_context *ctx)
243 {
244 ctx->clear = iris_clear;
245 ctx->clear_texture = iris_clear_texture;
246 ctx->clear_render_target = iris_clear_render_target;
247 ctx->clear_depth_stencil = iris_clear_depth_stencil;
248 }