2 * Copyright (c) 2017 Lima Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
27 #include "util/ralloc.h"
28 #include "util/bitscan.h"
29 #include "compiler/nir/nir.h"
30 #include "pipe/p_state.h"
35 static void *ppir_node_create_ssa(ppir_block
*block
, ppir_op op
, nir_ssa_def
*ssa
)
37 ppir_node
*node
= ppir_node_create(block
, op
, ssa
->index
, 0);
41 ppir_dest
*dest
= ppir_node_get_dest(node
);
42 dest
->type
= ppir_target_ssa
;
43 dest
->ssa
.num_components
= ssa
->num_components
;
44 dest
->ssa
.live_in
= INT_MAX
;
45 dest
->ssa
.live_out
= 0;
46 dest
->write_mask
= u_bit_consecutive(0, ssa
->num_components
);
48 if (node
->type
== ppir_node_type_load
||
49 node
->type
== ppir_node_type_store
)
50 dest
->ssa
.is_head
= true;
55 static void *ppir_node_create_reg(ppir_block
*block
, ppir_op op
,
56 nir_reg_dest
*reg
, unsigned mask
)
58 ppir_node
*node
= ppir_node_create(block
, op
, reg
->reg
->index
, mask
);
62 ppir_dest
*dest
= ppir_node_get_dest(node
);
64 list_for_each_entry(ppir_reg
, r
, &block
->comp
->reg_list
, list
) {
65 if (r
->index
== reg
->reg
->index
) {
71 dest
->type
= ppir_target_register
;
72 dest
->write_mask
= mask
;
74 if (node
->type
== ppir_node_type_load
||
75 node
->type
== ppir_node_type_store
)
76 dest
->reg
->is_head
= true;
81 static void *ppir_node_create_dest(ppir_block
*block
, ppir_op op
,
82 nir_dest
*dest
, unsigned mask
)
88 return ppir_node_create_ssa(block
, op
, &dest
->ssa
);
90 return ppir_node_create_reg(block
, op
, &dest
->reg
, mask
);
93 return ppir_node_create(block
, op
, index
, 0);
96 static void ppir_node_add_src(ppir_compiler
*comp
, ppir_node
*node
,
97 ppir_src
*ps
, nir_src
*ns
, unsigned mask
)
99 ppir_node
*child
= NULL
;
102 child
= comp
->var_nodes
[ns
->ssa
->index
];
103 /* Clone consts for each successor */
104 if (child
->type
== ppir_node_type_const
)
105 child
= ppir_node_clone_const(node
->block
, child
);
107 ppir_node_add_dep(node
, child
);
110 nir_register
*reg
= ns
->reg
.reg
;
112 int swizzle
= ps
->swizzle
[u_bit_scan(&mask
)];
113 child
= comp
->var_nodes
[(reg
->index
<< 2) + comp
->reg_base
+ swizzle
];
114 ppir_node_add_dep(node
, child
);
118 ppir_node_target_assign(ps
, child
);
121 static int nir_to_ppir_opcodes
[nir_num_opcodes
] = {
123 [0 ... nir_last_opcode
] = -1,
125 [nir_op_mov
] = ppir_op_mov
,
126 [nir_op_fmul
] = ppir_op_mul
,
127 [nir_op_fabs
] = ppir_op_abs
,
128 [nir_op_fneg
] = ppir_op_neg
,
129 [nir_op_fadd
] = ppir_op_add
,
130 [nir_op_fsum3
] = ppir_op_sum3
,
131 [nir_op_fsum4
] = ppir_op_sum4
,
132 [nir_op_frsq
] = ppir_op_rsqrt
,
133 [nir_op_flog2
] = ppir_op_log2
,
134 [nir_op_fexp2
] = ppir_op_exp2
,
135 [nir_op_fsqrt
] = ppir_op_sqrt
,
136 [nir_op_fsin
] = ppir_op_sin
,
137 [nir_op_fcos
] = ppir_op_cos
,
138 [nir_op_fmax
] = ppir_op_max
,
139 [nir_op_fmin
] = ppir_op_min
,
140 [nir_op_frcp
] = ppir_op_rcp
,
141 [nir_op_ffloor
] = ppir_op_floor
,
142 [nir_op_fceil
] = ppir_op_ceil
,
143 [nir_op_ffract
] = ppir_op_fract
,
144 [nir_op_sge
] = ppir_op_ge
,
145 [nir_op_fge
] = ppir_op_ge
,
146 [nir_op_slt
] = ppir_op_lt
,
147 [nir_op_flt
] = ppir_op_lt
,
148 [nir_op_seq
] = ppir_op_eq
,
149 [nir_op_feq
] = ppir_op_eq
,
150 [nir_op_sne
] = ppir_op_ne
,
151 [nir_op_fne
] = ppir_op_ne
,
152 [nir_op_fcsel
] = ppir_op_select
,
153 [nir_op_inot
] = ppir_op_not
,
154 [nir_op_ftrunc
] = ppir_op_trunc
,
155 [nir_op_fsat
] = ppir_op_sat
,
156 [nir_op_fddx
] = ppir_op_ddx
,
157 [nir_op_fddy
] = ppir_op_ddy
,
160 static ppir_node
*ppir_emit_alu(ppir_block
*block
, nir_instr
*ni
)
162 nir_alu_instr
*instr
= nir_instr_as_alu(ni
);
163 int op
= nir_to_ppir_opcodes
[instr
->op
];
166 ppir_error("unsupported nir_op: %s\n", nir_op_infos
[instr
->op
].name
);
170 ppir_alu_node
*node
= ppir_node_create_dest(block
, op
, &instr
->dest
.dest
,
171 instr
->dest
.write_mask
);
175 ppir_dest
*pd
= &node
->dest
;
176 nir_alu_dest
*nd
= &instr
->dest
;
178 pd
->modifier
= ppir_outmod_clamp_fraction
;
189 src_mask
= pd
->write_mask
;
193 unsigned num_child
= nir_op_infos
[instr
->op
].num_inputs
;
194 node
->num_src
= num_child
;
196 for (int i
= 0; i
< num_child
; i
++) {
197 nir_alu_src
*ns
= instr
->src
+ i
;
198 ppir_src
*ps
= node
->src
+ i
;
199 memcpy(ps
->swizzle
, ns
->swizzle
, sizeof(ps
->swizzle
));
200 ppir_node_add_src(block
->comp
, &node
->node
, ps
, &ns
->src
, src_mask
);
202 ps
->absolute
= ns
->abs
;
203 ps
->negate
= ns
->negate
;
209 static ppir_block
*ppir_block_create(ppir_compiler
*comp
);
211 static bool ppir_emit_discard_block(ppir_compiler
*comp
)
213 ppir_block
*block
= ppir_block_create(comp
);
214 ppir_discard_node
*discard
;
218 comp
->discard_block
= block
;
221 discard
= ppir_node_create(block
, ppir_op_discard
, -1, 0);
223 list_addtail(&discard
->node
.list
, &block
->node_list
);
230 static ppir_node
*ppir_emit_discard_if(ppir_block
*block
, nir_instr
*ni
)
232 nir_intrinsic_instr
*instr
= nir_instr_as_intrinsic(ni
);
234 ppir_compiler
*comp
= block
->comp
;
235 ppir_branch_node
*branch
;
237 if (!comp
->discard_block
&& !ppir_emit_discard_block(comp
))
240 node
= ppir_node_create(block
, ppir_op_branch
, -1, 0);
243 branch
= ppir_node_to_branch(node
);
245 /* second src and condition will be updated during lowering */
246 ppir_node_add_src(block
->comp
, node
, &branch
->src
[0],
247 &instr
->src
[0], u_bit_consecutive(0, instr
->num_components
));
248 branch
->target
= comp
->discard_block
;
253 static ppir_node
*ppir_emit_discard(ppir_block
*block
, nir_instr
*ni
)
255 ppir_node
*node
= ppir_node_create(block
, ppir_op_discard
, -1, 0);
260 static ppir_node
*ppir_emit_intrinsic(ppir_block
*block
, nir_instr
*ni
)
262 nir_intrinsic_instr
*instr
= nir_instr_as_intrinsic(ni
);
264 ppir_load_node
*lnode
;
265 ppir_store_node
*snode
;
267 switch (instr
->intrinsic
) {
268 case nir_intrinsic_load_input
:
269 if (!instr
->dest
.is_ssa
)
270 mask
= u_bit_consecutive(0, instr
->num_components
);
272 lnode
= ppir_node_create_dest(block
, ppir_op_load_varying
, &instr
->dest
, mask
);
276 lnode
->num_components
= instr
->num_components
;
277 lnode
->index
= nir_intrinsic_base(instr
) * 4 + nir_intrinsic_component(instr
);
280 case nir_intrinsic_load_frag_coord
:
281 case nir_intrinsic_load_point_coord
:
282 case nir_intrinsic_load_front_face
:
283 if (!instr
->dest
.is_ssa
)
284 mask
= u_bit_consecutive(0, instr
->num_components
);
287 switch (instr
->intrinsic
) {
288 case nir_intrinsic_load_frag_coord
:
289 op
= ppir_op_load_fragcoord
;
291 case nir_intrinsic_load_point_coord
:
292 op
= ppir_op_load_pointcoord
;
294 case nir_intrinsic_load_front_face
:
295 op
= ppir_op_load_frontface
;
302 lnode
= ppir_node_create_dest(block
, op
, &instr
->dest
, mask
);
306 lnode
->num_components
= instr
->num_components
;
309 case nir_intrinsic_load_uniform
:
310 if (!instr
->dest
.is_ssa
)
311 mask
= u_bit_consecutive(0, instr
->num_components
);
313 lnode
= ppir_node_create_dest(block
, ppir_op_load_uniform
, &instr
->dest
, mask
);
317 lnode
->num_components
= instr
->num_components
;
318 lnode
->index
= nir_intrinsic_base(instr
);
319 lnode
->index
+= (uint32_t)nir_src_as_float(instr
->src
[0]);
323 case nir_intrinsic_store_output
:
324 snode
= ppir_node_create_dest(block
, ppir_op_store_color
, NULL
, 0);
328 snode
->index
= nir_intrinsic_base(instr
);
330 for (int i
= 0; i
< instr
->num_components
; i
++)
331 snode
->src
.swizzle
[i
] = i
;
333 ppir_node_add_src(block
->comp
, &snode
->node
, &snode
->src
, instr
->src
,
334 u_bit_consecutive(0, instr
->num_components
));
338 case nir_intrinsic_discard
:
339 return ppir_emit_discard(block
, ni
);
341 case nir_intrinsic_discard_if
:
342 return ppir_emit_discard_if(block
, ni
);
345 ppir_error("unsupported nir_intrinsic_instr %s\n",
346 nir_intrinsic_infos
[instr
->intrinsic
].name
);
351 static ppir_node
*ppir_emit_load_const(ppir_block
*block
, nir_instr
*ni
)
353 nir_load_const_instr
*instr
= nir_instr_as_load_const(ni
);
354 ppir_const_node
*node
= ppir_node_create_ssa(block
, ppir_op_const
, &instr
->def
);
358 assert(instr
->def
.bit_size
== 32);
360 for (int i
= 0; i
< instr
->def
.num_components
; i
++)
361 node
->constant
.value
[i
].i
= instr
->value
[i
].i32
;
362 node
->constant
.num
= instr
->def
.num_components
;
367 static ppir_node
*ppir_emit_ssa_undef(ppir_block
*block
, nir_instr
*ni
)
369 ppir_error("nir_ssa_undef_instr not support\n");
373 static ppir_node
*ppir_emit_tex(ppir_block
*block
, nir_instr
*ni
)
375 nir_tex_instr
*instr
= nir_instr_as_tex(ni
);
376 ppir_load_texture_node
*node
;
378 if (instr
->op
!= nir_texop_tex
) {
379 ppir_error("unsupported texop %d\n", instr
->op
);
383 node
= ppir_node_create_dest(block
, ppir_op_load_texture
, &instr
->dest
, 0);
387 node
->sampler
= instr
->texture_index
;
389 switch (instr
->sampler_dim
) {
390 case GLSL_SAMPLER_DIM_2D
:
391 case GLSL_SAMPLER_DIM_RECT
:
392 case GLSL_SAMPLER_DIM_EXTERNAL
:
395 ppir_error("unsupported sampler dim: %d\n", instr
->sampler_dim
);
399 node
->sampler_dim
= instr
->sampler_dim
;
401 for (int i
= 0; i
< instr
->coord_components
; i
++)
402 node
->src_coords
.swizzle
[i
] = i
;
404 for (int i
= 0; i
< instr
->num_srcs
; i
++) {
405 switch (instr
->src
[i
].src_type
) {
406 case nir_tex_src_coord
:
407 ppir_node_add_src(block
->comp
, &node
->node
, &node
->src_coords
, &instr
->src
[i
].src
,
408 u_bit_consecutive(0, instr
->coord_components
));
411 ppir_error("unsupported texture source type\n");
420 static ppir_node
*ppir_emit_jump(ppir_block
*block
, nir_instr
*ni
)
422 ppir_error("nir_jump_instr not support\n");
426 static ppir_node
*(*ppir_emit_instr
[nir_instr_type_phi
])(ppir_block
*, nir_instr
*) = {
427 [nir_instr_type_alu
] = ppir_emit_alu
,
428 [nir_instr_type_intrinsic
] = ppir_emit_intrinsic
,
429 [nir_instr_type_load_const
] = ppir_emit_load_const
,
430 [nir_instr_type_ssa_undef
] = ppir_emit_ssa_undef
,
431 [nir_instr_type_tex
] = ppir_emit_tex
,
432 [nir_instr_type_jump
] = ppir_emit_jump
,
435 static ppir_block
*ppir_block_create(ppir_compiler
*comp
)
437 ppir_block
*block
= rzalloc(comp
, ppir_block
);
441 list_inithead(&block
->node_list
);
442 list_inithead(&block
->instr_list
);
447 static bool ppir_emit_block(ppir_compiler
*comp
, nir_block
*nblock
)
449 ppir_block
*block
= ppir_block_create(comp
);
453 list_addtail(&block
->list
, &comp
->block_list
);
456 nir_foreach_instr(instr
, nblock
) {
457 assert(instr
->type
< nir_instr_type_phi
);
458 ppir_node
*node
= ppir_emit_instr
[instr
->type
](block
, instr
);
462 list_addtail(&node
->list
, &block
->node_list
);
468 static bool ppir_emit_if(ppir_compiler
*comp
, nir_if
*nif
)
470 ppir_error("if nir_cf_node not support\n");
474 static bool ppir_emit_loop(ppir_compiler
*comp
, nir_loop
*nloop
)
476 ppir_error("loop nir_cf_node not support\n");
480 static bool ppir_emit_function(ppir_compiler
*comp
, nir_function_impl
*nfunc
)
482 ppir_error("function nir_cf_node not support\n");
486 static bool ppir_emit_cf_list(ppir_compiler
*comp
, struct exec_list
*list
)
488 foreach_list_typed(nir_cf_node
, node
, node
, list
) {
491 switch (node
->type
) {
492 case nir_cf_node_block
:
493 ret
= ppir_emit_block(comp
, nir_cf_node_as_block(node
));
496 ret
= ppir_emit_if(comp
, nir_cf_node_as_if(node
));
498 case nir_cf_node_loop
:
499 ret
= ppir_emit_loop(comp
, nir_cf_node_as_loop(node
));
501 case nir_cf_node_function
:
502 ret
= ppir_emit_function(comp
, nir_cf_node_as_function(node
));
505 ppir_error("unknown NIR node type %d\n", node
->type
);
516 static ppir_compiler
*ppir_compiler_create(void *prog
, unsigned num_reg
, unsigned num_ssa
)
518 ppir_compiler
*comp
= rzalloc_size(
519 prog
, sizeof(*comp
) + ((num_reg
<< 2) + num_ssa
) * sizeof(ppir_node
*));
523 list_inithead(&comp
->block_list
);
524 list_inithead(&comp
->reg_list
);
526 comp
->var_nodes
= (ppir_node
**)(comp
+ 1);
527 comp
->reg_base
= num_ssa
;
532 static void ppir_add_ordering_deps(ppir_compiler
*comp
)
534 /* Some intrinsics do not have explicit dependencies and thus depend
535 * on instructions order. Consider discard_if and store_ouput as
536 * example. If we don't add fake dependency of discard_if to store_output
537 * scheduler may put store_output first and since store_output terminates
538 * shader on Utgard PP, rest of it will never be executed.
539 * Add fake dependencies for discard/branch/store to preserve
542 * TODO: scheduler should schedule discard_if as early as possible otherwise
543 * we may end up with suboptimal code for cases like this:
550 * In this case store depends on discard_if and s4, but since dependencies can
551 * be scheduled in any order it can result in code like this:
553 * instr1: s3 = s1 < s3
554 * instr2: s4 = s1 + s2
555 * instr3: discard_if s3
558 list_for_each_entry(ppir_block
, block
, &comp
->block_list
, list
) {
559 ppir_node
*prev_node
= NULL
;
560 list_for_each_entry(ppir_node
, node
, &block
->node_list
, list
) {
561 if (node
->type
== ppir_node_type_discard
||
562 node
->type
== ppir_node_type_store
||
563 node
->type
== ppir_node_type_branch
) {
565 ppir_node_add_dep(node
, prev_node
);
572 static void ppir_print_shader_db(struct nir_shader
*nir
, ppir_compiler
*comp
,
573 struct pipe_debug_callback
*debug
)
575 const struct shader_info
*info
= &nir
->info
;
577 int ret
= asprintf(&shaderdb
,
578 "%s shader: %d inst, %d loops, %d:%d spills:fills\n",
579 gl_shader_stage_name(info
->stage
),
580 comp
->cur_instr_index
,
586 if (lima_debug
& LIMA_DEBUG_SHADERDB
)
587 fprintf(stderr
, "SHADER-DB: %s\n", shaderdb
);
589 pipe_debug_message(debug
, SHADER_INFO
, "%s", shaderdb
);
593 bool ppir_compile_nir(struct lima_fs_shader_state
*prog
, struct nir_shader
*nir
,
595 struct pipe_debug_callback
*debug
)
597 nir_function_impl
*func
= nir_shader_get_entrypoint(nir
);
598 ppir_compiler
*comp
= ppir_compiler_create(prog
, func
->reg_alloc
, func
->ssa_alloc
);
604 foreach_list_typed(nir_register
, reg
, node
, &func
->registers
) {
605 ppir_reg
*r
= rzalloc(comp
, ppir_reg
);
609 r
->index
= reg
->index
;
610 r
->num_components
= reg
->num_components
;
611 r
->live_in
= INT_MAX
;
614 list_addtail(&r
->list
, &comp
->reg_list
);
617 if (!ppir_emit_cf_list(comp
, &func
->body
))
620 /* If we have discard block add it to the very end */
621 if (comp
->discard_block
)
622 list_addtail(&comp
->discard_block
->list
, &comp
->block_list
);
624 ppir_add_ordering_deps(comp
);
626 ppir_node_print_prog(comp
);
628 if (!ppir_lower_prog(comp
))
631 ppir_node_print_prog(comp
);
633 if (!ppir_node_to_instr(comp
))
636 if (!ppir_schedule_prog(comp
))
639 if (!ppir_regalloc_prog(comp
))
642 if (!ppir_codegen_prog(comp
))
645 ppir_print_shader_db(nir
, comp
, debug
);