lima: lower bool to float when building shaders
[mesa.git] / src / gallium / drivers / lima / ir / pp / nir.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/bitscan.h"
29 #include "compiler/nir/nir.h"
30
31 #include "ppir.h"
32
33 static void *ppir_node_create_ssa(ppir_block *block, ppir_op op, nir_ssa_def *ssa)
34 {
35 ppir_node *node = ppir_node_create(block, op, ssa->index, 0);
36 if (!node)
37 return NULL;
38
39 ppir_dest *dest = ppir_node_get_dest(node);
40 dest->type = ppir_target_ssa;
41 dest->ssa.num_components = ssa->num_components;
42 dest->ssa.live_in = INT_MAX;
43 dest->ssa.live_out = 0;
44 dest->write_mask = u_bit_consecutive(0, ssa->num_components);
45
46 if (node->type == ppir_node_type_load ||
47 node->type == ppir_node_type_store)
48 dest->ssa.is_head = true;
49
50 return node;
51 }
52
53 static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
54 nir_reg_dest *reg, unsigned mask)
55 {
56 ppir_node *node = ppir_node_create(block, op, reg->reg->index, mask);
57 if (!node)
58 return NULL;
59
60 ppir_dest *dest = ppir_node_get_dest(node);
61
62 list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
63 if (r->index == reg->reg->index) {
64 dest->reg = r;
65 break;
66 }
67 }
68
69 dest->type = ppir_target_register;
70 dest->write_mask = mask;
71
72 if (node->type == ppir_node_type_load ||
73 node->type == ppir_node_type_store)
74 dest->reg->is_head = true;
75
76 return node;
77 }
78
79 static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
80 nir_dest *dest, unsigned mask)
81 {
82 unsigned index = -1;
83
84 if (dest) {
85 if (dest->is_ssa)
86 return ppir_node_create_ssa(block, op, &dest->ssa);
87 else
88 return ppir_node_create_reg(block, op, &dest->reg, mask);
89 }
90
91 return ppir_node_create(block, op, index, 0);
92 }
93
94 static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
95 ppir_src *ps, nir_src *ns, unsigned mask)
96 {
97 ppir_node *child = NULL;
98
99 if (ns->is_ssa) {
100 child = comp->var_nodes[ns->ssa->index];
101 ppir_node_add_dep(node, child);
102 }
103 else {
104 nir_register *reg = ns->reg.reg;
105 while (mask) {
106 int swizzle = ps->swizzle[u_bit_scan(&mask)];
107 child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
108 ppir_node_add_dep(node, child);
109 }
110 }
111
112 ppir_dest *dest = ppir_node_get_dest(child);
113 ppir_node_target_assign(ps, dest);
114 }
115
116 static int nir_to_ppir_opcodes[nir_num_opcodes] = {
117 /* not supported */
118 [0 ... nir_last_opcode] = -1,
119
120 [nir_op_fmov] = ppir_op_mov,
121 [nir_op_imov] = ppir_op_mov,
122 [nir_op_fmul] = ppir_op_mul,
123 [nir_op_fadd] = ppir_op_add,
124 [nir_op_fdot2] = ppir_op_dot2,
125 [nir_op_fdot3] = ppir_op_dot3,
126 [nir_op_fdot4] = ppir_op_dot4,
127 [nir_op_frsq] = ppir_op_rsqrt,
128 [nir_op_flog2] = ppir_op_log2,
129 [nir_op_fexp2] = ppir_op_exp2,
130 [nir_op_fsqrt] = ppir_op_sqrt,
131 [nir_op_fsin] = ppir_op_sin,
132 [nir_op_fcos] = ppir_op_cos,
133 [nir_op_fmax] = ppir_op_max,
134 [nir_op_fmin] = ppir_op_min,
135 [nir_op_frcp] = ppir_op_rcp,
136 [nir_op_ffloor] = ppir_op_floor,
137 [nir_op_ffract] = ppir_op_fract,
138 [nir_op_fand] = ppir_op_and,
139 [nir_op_for] = ppir_op_or,
140 [nir_op_fxor] = ppir_op_xor,
141 [nir_op_sge] = ppir_op_ge,
142 [nir_op_fge] = ppir_op_ge,
143 [nir_op_slt] = ppir_op_lt,
144 [nir_op_flt] = ppir_op_lt,
145 [nir_op_seq] = ppir_op_eq,
146 [nir_op_feq] = ppir_op_eq,
147 [nir_op_sne] = ppir_op_ne,
148 [nir_op_fne] = ppir_op_ne,
149 [nir_op_fnot] = ppir_op_not,
150 [nir_op_fcsel] = ppir_op_select,
151 [nir_op_inot] = ppir_op_not,
152 };
153
154 static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
155 {
156 nir_alu_instr *instr = nir_instr_as_alu(ni);
157 int op = nir_to_ppir_opcodes[instr->op];
158
159 if (op < 0) {
160 ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
161 return NULL;
162 }
163
164 ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
165 instr->dest.write_mask);
166 if (!node)
167 return NULL;
168
169 ppir_dest *pd = &node->dest;
170 nir_alu_dest *nd = &instr->dest;
171 if (nd->saturate)
172 pd->modifier = ppir_outmod_clamp_fraction;
173
174 unsigned src_mask;
175 switch (op) {
176 case ppir_op_dot2:
177 src_mask = 0b0011;
178 break;
179 case ppir_op_dot3:
180 src_mask = 0b0111;
181 break;
182 case ppir_op_dot4:
183 src_mask = 0b1111;
184 break;
185 default:
186 src_mask = pd->write_mask;
187 break;
188 }
189
190 unsigned num_child = nir_op_infos[instr->op].num_inputs;
191 node->num_src = num_child;
192
193 for (int i = 0; i < num_child; i++) {
194 nir_alu_src *ns = instr->src + i;
195 ppir_src *ps = node->src + i;
196 memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
197 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
198
199 ps->absolute = ns->abs;
200 ps->negate = ns->negate;
201 }
202
203 return &node->node;
204 }
205
206 static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
207 {
208 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
209 unsigned mask = 0;
210 ppir_load_node *lnode;
211 ppir_store_node *snode;
212 nir_const_value *const_offset;
213
214 switch (instr->intrinsic) {
215 case nir_intrinsic_load_input:
216 if (!instr->dest.is_ssa)
217 mask = u_bit_consecutive(0, instr->num_components);
218
219 lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
220 if (!lnode)
221 return NULL;
222
223 lnode->num_components = instr->num_components;
224 lnode->index = nir_intrinsic_base(instr) * 4 + nir_intrinsic_component(instr);
225 return &lnode->node;
226
227 case nir_intrinsic_load_uniform:
228 if (!instr->dest.is_ssa)
229 mask = u_bit_consecutive(0, instr->num_components);
230
231 lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
232 if (!lnode)
233 return NULL;
234
235 lnode->num_components = instr->num_components;
236 lnode->index = nir_intrinsic_base(instr);
237
238 const_offset = nir_src_as_const_value(instr->src[0]);
239 assert(const_offset);
240 lnode->index += (uint32_t)const_offset->f32[0];
241
242 return &lnode->node;
243
244 case nir_intrinsic_store_output:
245 snode = ppir_node_create_dest(block, ppir_op_store_color, NULL, 0);
246 if (!snode)
247 return NULL;
248
249 snode->index = nir_intrinsic_base(instr);
250
251 for (int i = 0; i < instr->num_components; i++)
252 snode->src.swizzle[i] = i;
253
254 ppir_node_add_src(block->comp, &snode->node, &snode->src, instr->src,
255 u_bit_consecutive(0, instr->num_components));
256
257 return &snode->node;
258
259 default:
260 ppir_error("unsupported nir_intrinsic_instr %d\n", instr->intrinsic);
261 return NULL;
262 }
263 }
264
265 static ppir_node *ppir_emit_load_const(ppir_block *block, nir_instr *ni)
266 {
267 nir_load_const_instr *instr = nir_instr_as_load_const(ni);
268 ppir_const_node *node = ppir_node_create_ssa(block, ppir_op_const, &instr->def);
269 if (!node)
270 return NULL;
271
272 assert(instr->def.bit_size == 32);
273
274 for (int i = 0; i < instr->def.num_components; i++)
275 node->constant.value[i].i = instr->value.i32[i];
276 node->constant.num = instr->def.num_components;
277
278 return &node->node;
279 }
280
281 static ppir_node *ppir_emit_ssa_undef(ppir_block *block, nir_instr *ni)
282 {
283 ppir_error("nir_ssa_undef_instr not support\n");
284 return NULL;
285 }
286
287 static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
288 {
289 nir_tex_instr *instr = nir_instr_as_tex(ni);
290 ppir_load_texture_node *node;
291
292 if (instr->op != nir_texop_tex) {
293 ppir_error("unsupported texop %d\n", instr->op);
294 return NULL;
295 }
296
297 node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, 0);
298 if (!node)
299 return NULL;
300
301 node->sampler = instr->texture_index;
302
303 switch (instr->sampler_dim) {
304 case GLSL_SAMPLER_DIM_2D:
305 case GLSL_SAMPLER_DIM_RECT:
306 case GLSL_SAMPLER_DIM_EXTERNAL:
307 break;
308 default:
309 ppir_debug("unsupported sampler dim: %d\n", instr->sampler_dim);
310 return NULL;
311 }
312
313 node->sampler_dim = instr->sampler_dim;
314
315 for (int i = 0; i < instr->coord_components; i++)
316 node->src_coords.swizzle[i] = i;
317
318 assert(instr->num_srcs == 1);
319 for (int i = 0; i < instr->num_srcs; i++) {
320 switch (instr->src[i].src_type) {
321 case nir_tex_src_coord:
322 ppir_node_add_src(block->comp, &node->node, &node->src_coords, &instr->src[i].src,
323 u_bit_consecutive(0, instr->coord_components));
324 break;
325 default:
326 ppir_debug("unknown texture source");
327 return NULL;
328 }
329 }
330
331 return &node->node;
332 }
333
334 static ppir_node *ppir_emit_jump(ppir_block *block, nir_instr *ni)
335 {
336 ppir_error("nir_jump_instr not support\n");
337 return NULL;
338 }
339
340 static ppir_node *(*ppir_emit_instr[nir_instr_type_phi])(ppir_block *, nir_instr *) = {
341 [nir_instr_type_alu] = ppir_emit_alu,
342 [nir_instr_type_intrinsic] = ppir_emit_intrinsic,
343 [nir_instr_type_load_const] = ppir_emit_load_const,
344 [nir_instr_type_ssa_undef] = ppir_emit_ssa_undef,
345 [nir_instr_type_tex] = ppir_emit_tex,
346 [nir_instr_type_jump] = ppir_emit_jump,
347 };
348
349 static ppir_block *ppir_block_create(ppir_compiler *comp)
350 {
351 ppir_block *block = rzalloc(comp, ppir_block);
352 if (!block)
353 return NULL;
354
355 list_inithead(&block->node_list);
356 list_inithead(&block->instr_list);
357
358 return block;
359 }
360
361 static bool ppir_emit_block(ppir_compiler *comp, nir_block *nblock)
362 {
363 ppir_block *block = ppir_block_create(comp);
364 if (!block)
365 return false;
366
367 list_addtail(&block->list, &comp->block_list);
368 block->comp = comp;
369
370 nir_foreach_instr(instr, nblock) {
371 assert(instr->type < nir_instr_type_phi);
372 ppir_node *node = ppir_emit_instr[instr->type](block, instr);
373 if (node)
374 list_addtail(&node->list, &block->node_list);
375 }
376
377 return true;
378 }
379
380 static bool ppir_emit_if(ppir_compiler *comp, nir_if *nif)
381 {
382 ppir_error("if nir_cf_node not support\n");
383 return false;
384 }
385
386 static bool ppir_emit_loop(ppir_compiler *comp, nir_loop *nloop)
387 {
388 ppir_error("loop nir_cf_node not support\n");
389 return false;
390 }
391
392 static bool ppir_emit_function(ppir_compiler *comp, nir_function_impl *nfunc)
393 {
394 ppir_error("function nir_cf_node not support\n");
395 return false;
396 }
397
398 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list)
399 {
400 foreach_list_typed(nir_cf_node, node, node, list) {
401 bool ret;
402
403 switch (node->type) {
404 case nir_cf_node_block:
405 ret = ppir_emit_block(comp, nir_cf_node_as_block(node));
406 break;
407 case nir_cf_node_if:
408 ret = ppir_emit_if(comp, nir_cf_node_as_if(node));
409 break;
410 case nir_cf_node_loop:
411 ret = ppir_emit_loop(comp, nir_cf_node_as_loop(node));
412 break;
413 case nir_cf_node_function:
414 ret = ppir_emit_function(comp, nir_cf_node_as_function(node));
415 break;
416 default:
417 ppir_error("unknown NIR node type %d\n", node->type);
418 return false;
419 }
420
421 if (!ret)
422 return false;
423 }
424
425 return true;
426 }
427
428 static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
429 {
430 ppir_compiler *comp = rzalloc_size(
431 prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
432 if (!comp)
433 return NULL;
434
435 list_inithead(&comp->block_list);
436 list_inithead(&comp->reg_list);
437
438 comp->var_nodes = (ppir_node **)(comp + 1);
439 comp->reg_base = num_ssa;
440 comp->prog = prog;
441 return comp;
442 }
443
444 bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
445 struct ra_regs *ra)
446 {
447 nir_function_impl *func = nir_shader_get_entrypoint(nir);
448 ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
449 if (!comp)
450 return false;
451
452 comp->ra = ra;
453
454 foreach_list_typed(nir_register, reg, node, &func->registers) {
455 ppir_reg *r = rzalloc(comp, ppir_reg);
456 if (!r)
457 return false;
458
459 r->index = reg->index;
460 r->num_components = reg->num_components;
461 r->live_in = INT_MAX;
462 r->live_out = 0;
463 r->is_head = false;
464 list_addtail(&r->list, &comp->reg_list);
465 }
466
467 if (!ppir_emit_cf_list(comp, &func->body))
468 goto err_out0;
469 ppir_node_print_prog(comp);
470
471 if (!ppir_lower_prog(comp))
472 goto err_out0;
473
474 if (!ppir_node_to_instr(comp))
475 goto err_out0;
476
477 if (!ppir_schedule_prog(comp))
478 goto err_out0;
479
480 if (!ppir_regalloc_prog(comp))
481 goto err_out0;
482
483 if (!ppir_codegen_prog(comp))
484 goto err_out0;
485
486 ralloc_free(comp);
487 return true;
488
489 err_out0:
490 ralloc_free(comp);
491 return false;
492 }
493