lima/ppir: Add fneg op
[mesa.git] / src / gallium / drivers / lima / ir / pp / nir.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/bitscan.h"
29 #include "compiler/nir/nir.h"
30
31 #include "ppir.h"
32
33 static void *ppir_node_create_ssa(ppir_block *block, ppir_op op, nir_ssa_def *ssa)
34 {
35 ppir_node *node = ppir_node_create(block, op, ssa->index, 0);
36 if (!node)
37 return NULL;
38
39 ppir_dest *dest = ppir_node_get_dest(node);
40 dest->type = ppir_target_ssa;
41 dest->ssa.num_components = ssa->num_components;
42 dest->ssa.live_in = INT_MAX;
43 dest->ssa.live_out = 0;
44 dest->write_mask = u_bit_consecutive(0, ssa->num_components);
45
46 if (node->type == ppir_node_type_load ||
47 node->type == ppir_node_type_store)
48 dest->ssa.is_head = true;
49
50 return node;
51 }
52
53 static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
54 nir_reg_dest *reg, unsigned mask)
55 {
56 ppir_node *node = ppir_node_create(block, op, reg->reg->index, mask);
57 if (!node)
58 return NULL;
59
60 ppir_dest *dest = ppir_node_get_dest(node);
61
62 list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
63 if (r->index == reg->reg->index) {
64 dest->reg = r;
65 break;
66 }
67 }
68
69 dest->type = ppir_target_register;
70 dest->write_mask = mask;
71
72 if (node->type == ppir_node_type_load ||
73 node->type == ppir_node_type_store)
74 dest->reg->is_head = true;
75
76 return node;
77 }
78
79 static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
80 nir_dest *dest, unsigned mask)
81 {
82 unsigned index = -1;
83
84 if (dest) {
85 if (dest->is_ssa)
86 return ppir_node_create_ssa(block, op, &dest->ssa);
87 else
88 return ppir_node_create_reg(block, op, &dest->reg, mask);
89 }
90
91 return ppir_node_create(block, op, index, 0);
92 }
93
94 static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
95 ppir_src *ps, nir_src *ns, unsigned mask)
96 {
97 ppir_node *child = NULL;
98
99 if (ns->is_ssa) {
100 child = comp->var_nodes[ns->ssa->index];
101 ppir_node_add_dep(node, child);
102 }
103 else {
104 nir_register *reg = ns->reg.reg;
105 while (mask) {
106 int swizzle = ps->swizzle[u_bit_scan(&mask)];
107 child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
108 ppir_node_add_dep(node, child);
109 }
110 }
111
112 ppir_dest *dest = ppir_node_get_dest(child);
113 ppir_node_target_assign(ps, dest);
114 }
115
116 static int nir_to_ppir_opcodes[nir_num_opcodes] = {
117 /* not supported */
118 [0 ... nir_last_opcode] = -1,
119
120 [nir_op_mov] = ppir_op_mov,
121 [nir_op_fmul] = ppir_op_mul,
122 [nir_op_fabs] = ppir_op_abs,
123 [nir_op_fneg] = ppir_op_neg,
124 [nir_op_fadd] = ppir_op_add,
125 [nir_op_fdot2] = ppir_op_dot2,
126 [nir_op_fdot3] = ppir_op_dot3,
127 [nir_op_fdot4] = ppir_op_dot4,
128 [nir_op_frsq] = ppir_op_rsqrt,
129 [nir_op_flog2] = ppir_op_log2,
130 [nir_op_fexp2] = ppir_op_exp2,
131 [nir_op_fsqrt] = ppir_op_sqrt,
132 [nir_op_fsin] = ppir_op_sin,
133 [nir_op_fcos] = ppir_op_cos,
134 [nir_op_fmax] = ppir_op_max,
135 [nir_op_fmin] = ppir_op_min,
136 [nir_op_frcp] = ppir_op_rcp,
137 [nir_op_ffloor] = ppir_op_floor,
138 [nir_op_fceil] = ppir_op_ceil,
139 [nir_op_ffract] = ppir_op_fract,
140 [nir_op_fand] = ppir_op_and,
141 [nir_op_for] = ppir_op_or,
142 [nir_op_fxor] = ppir_op_xor,
143 [nir_op_sge] = ppir_op_ge,
144 [nir_op_fge] = ppir_op_ge,
145 [nir_op_slt] = ppir_op_lt,
146 [nir_op_flt] = ppir_op_lt,
147 [nir_op_seq] = ppir_op_eq,
148 [nir_op_feq] = ppir_op_eq,
149 [nir_op_sne] = ppir_op_ne,
150 [nir_op_fne] = ppir_op_ne,
151 [nir_op_fnot] = ppir_op_not,
152 [nir_op_fcsel] = ppir_op_select,
153 [nir_op_inot] = ppir_op_not,
154 [nir_op_ftrunc] = ppir_op_trunc,
155 };
156
157 static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
158 {
159 nir_alu_instr *instr = nir_instr_as_alu(ni);
160 int op = nir_to_ppir_opcodes[instr->op];
161
162 if (op < 0) {
163 ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
164 return NULL;
165 }
166
167 ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
168 instr->dest.write_mask);
169 if (!node)
170 return NULL;
171
172 ppir_dest *pd = &node->dest;
173 nir_alu_dest *nd = &instr->dest;
174 if (nd->saturate)
175 pd->modifier = ppir_outmod_clamp_fraction;
176
177 unsigned src_mask;
178 switch (op) {
179 case ppir_op_dot2:
180 src_mask = 0b0011;
181 break;
182 case ppir_op_dot3:
183 src_mask = 0b0111;
184 break;
185 case ppir_op_dot4:
186 src_mask = 0b1111;
187 break;
188 default:
189 src_mask = pd->write_mask;
190 break;
191 }
192
193 unsigned num_child = nir_op_infos[instr->op].num_inputs;
194 node->num_src = num_child;
195
196 for (int i = 0; i < num_child; i++) {
197 nir_alu_src *ns = instr->src + i;
198 ppir_src *ps = node->src + i;
199 memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
200 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
201
202 ps->absolute = ns->abs;
203 ps->negate = ns->negate;
204 }
205
206 return &node->node;
207 }
208
209 static ppir_block *ppir_block_create(ppir_compiler *comp);
210
211 static bool ppir_emit_discard_block(ppir_compiler *comp)
212 {
213 ppir_block *block = ppir_block_create(comp);
214 ppir_discard_node *discard;
215 if (!block)
216 return false;
217
218 comp->discard_block = block;
219 block->comp = comp;
220
221 discard = ppir_node_create(block, ppir_op_discard, -1, 0);
222 if (discard)
223 list_addtail(&discard->node.list, &block->node_list);
224 else
225 return false;
226
227 return true;
228 }
229
230 static ppir_node *ppir_emit_discard_if(ppir_block *block, nir_instr *ni)
231 {
232 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
233 ppir_node *node;
234 ppir_compiler *comp = block->comp;
235 ppir_branch_node *branch;
236
237 if (!comp->discard_block && !ppir_emit_discard_block(comp))
238 return NULL;
239
240 node = ppir_node_create(block, ppir_op_branch, -1, 0);
241 if (!node)
242 return NULL;
243 branch = ppir_node_to_branch(node);
244
245 /* second src and condition will be updated during lowering */
246 ppir_node_add_src(block->comp, node, &branch->src[0],
247 &instr->src[0], u_bit_consecutive(0, instr->num_components));
248 branch->target = comp->discard_block;
249
250 return node;
251 }
252
253 static ppir_node *ppir_emit_discard(ppir_block *block, nir_instr *ni)
254 {
255 ppir_node *node = ppir_node_create(block, ppir_op_discard, -1, 0);
256
257 return node;
258 }
259
260 static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
261 {
262 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
263 unsigned mask = 0;
264 ppir_load_node *lnode;
265 ppir_store_node *snode;
266
267 switch (instr->intrinsic) {
268 case nir_intrinsic_load_input:
269 if (!instr->dest.is_ssa)
270 mask = u_bit_consecutive(0, instr->num_components);
271
272 lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
273 if (!lnode)
274 return NULL;
275
276 lnode->num_components = instr->num_components;
277 lnode->index = nir_intrinsic_base(instr) * 4 + nir_intrinsic_component(instr);
278 return &lnode->node;
279
280 case nir_intrinsic_load_frag_coord:
281 if (!instr->dest.is_ssa)
282 mask = u_bit_consecutive(0, instr->num_components);
283
284 lnode = ppir_node_create_dest(block, ppir_op_load_fragcoord, &instr->dest, mask);
285 if (!lnode)
286 return NULL;
287
288 lnode->num_components = instr->num_components;
289 return &lnode->node;
290
291 case nir_intrinsic_load_uniform:
292 if (!instr->dest.is_ssa)
293 mask = u_bit_consecutive(0, instr->num_components);
294
295 lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
296 if (!lnode)
297 return NULL;
298
299 lnode->num_components = instr->num_components;
300 lnode->index = nir_intrinsic_base(instr);
301 lnode->index += (uint32_t)nir_src_as_float(instr->src[0]);
302
303 return &lnode->node;
304
305 case nir_intrinsic_store_output:
306 snode = ppir_node_create_dest(block, ppir_op_store_color, NULL, 0);
307 if (!snode)
308 return NULL;
309
310 snode->index = nir_intrinsic_base(instr);
311
312 for (int i = 0; i < instr->num_components; i++)
313 snode->src.swizzle[i] = i;
314
315 ppir_node_add_src(block->comp, &snode->node, &snode->src, instr->src,
316 u_bit_consecutive(0, instr->num_components));
317
318 return &snode->node;
319
320 case nir_intrinsic_discard:
321 return ppir_emit_discard(block, ni);
322
323 case nir_intrinsic_discard_if:
324 return ppir_emit_discard_if(block, ni);
325
326 default:
327 ppir_error("unsupported nir_intrinsic_instr %s\n",
328 nir_intrinsic_infos[instr->intrinsic].name);
329 return NULL;
330 }
331 }
332
333 static ppir_node *ppir_emit_load_const(ppir_block *block, nir_instr *ni)
334 {
335 nir_load_const_instr *instr = nir_instr_as_load_const(ni);
336 ppir_const_node *node = ppir_node_create_ssa(block, ppir_op_const, &instr->def);
337 if (!node)
338 return NULL;
339
340 assert(instr->def.bit_size == 32);
341
342 for (int i = 0; i < instr->def.num_components; i++)
343 node->constant.value[i].i = instr->value[i].i32;
344 node->constant.num = instr->def.num_components;
345
346 return &node->node;
347 }
348
349 static ppir_node *ppir_emit_ssa_undef(ppir_block *block, nir_instr *ni)
350 {
351 ppir_error("nir_ssa_undef_instr not support\n");
352 return NULL;
353 }
354
355 static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
356 {
357 nir_tex_instr *instr = nir_instr_as_tex(ni);
358 ppir_load_texture_node *node;
359
360 if (instr->op != nir_texop_tex) {
361 ppir_error("unsupported texop %d\n", instr->op);
362 return NULL;
363 }
364
365 node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, 0);
366 if (!node)
367 return NULL;
368
369 node->sampler = instr->texture_index;
370
371 switch (instr->sampler_dim) {
372 case GLSL_SAMPLER_DIM_2D:
373 case GLSL_SAMPLER_DIM_RECT:
374 case GLSL_SAMPLER_DIM_EXTERNAL:
375 break;
376 default:
377 ppir_debug("unsupported sampler dim: %d\n", instr->sampler_dim);
378 return NULL;
379 }
380
381 node->sampler_dim = instr->sampler_dim;
382
383 for (int i = 0; i < instr->coord_components; i++)
384 node->src_coords.swizzle[i] = i;
385
386 assert(instr->num_srcs == 1);
387 for (int i = 0; i < instr->num_srcs; i++) {
388 switch (instr->src[i].src_type) {
389 case nir_tex_src_coord:
390 ppir_node_add_src(block->comp, &node->node, &node->src_coords, &instr->src[i].src,
391 u_bit_consecutive(0, instr->coord_components));
392 break;
393 default:
394 ppir_debug("unknown texture source");
395 return NULL;
396 }
397 }
398
399 return &node->node;
400 }
401
402 static ppir_node *ppir_emit_jump(ppir_block *block, nir_instr *ni)
403 {
404 ppir_error("nir_jump_instr not support\n");
405 return NULL;
406 }
407
408 static ppir_node *(*ppir_emit_instr[nir_instr_type_phi])(ppir_block *, nir_instr *) = {
409 [nir_instr_type_alu] = ppir_emit_alu,
410 [nir_instr_type_intrinsic] = ppir_emit_intrinsic,
411 [nir_instr_type_load_const] = ppir_emit_load_const,
412 [nir_instr_type_ssa_undef] = ppir_emit_ssa_undef,
413 [nir_instr_type_tex] = ppir_emit_tex,
414 [nir_instr_type_jump] = ppir_emit_jump,
415 };
416
417 static ppir_block *ppir_block_create(ppir_compiler *comp)
418 {
419 ppir_block *block = rzalloc(comp, ppir_block);
420 if (!block)
421 return NULL;
422
423 list_inithead(&block->node_list);
424 list_inithead(&block->instr_list);
425
426 return block;
427 }
428
429 static bool ppir_emit_block(ppir_compiler *comp, nir_block *nblock)
430 {
431 ppir_block *block = ppir_block_create(comp);
432 if (!block)
433 return false;
434
435 list_addtail(&block->list, &comp->block_list);
436 block->comp = comp;
437
438 nir_foreach_instr(instr, nblock) {
439 assert(instr->type < nir_instr_type_phi);
440 ppir_node *node = ppir_emit_instr[instr->type](block, instr);
441 if (!node)
442 return false;
443
444 list_addtail(&node->list, &block->node_list);
445 }
446
447 return true;
448 }
449
450 static bool ppir_emit_if(ppir_compiler *comp, nir_if *nif)
451 {
452 ppir_error("if nir_cf_node not support\n");
453 return false;
454 }
455
456 static bool ppir_emit_loop(ppir_compiler *comp, nir_loop *nloop)
457 {
458 ppir_error("loop nir_cf_node not support\n");
459 return false;
460 }
461
462 static bool ppir_emit_function(ppir_compiler *comp, nir_function_impl *nfunc)
463 {
464 ppir_error("function nir_cf_node not support\n");
465 return false;
466 }
467
468 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list)
469 {
470 foreach_list_typed(nir_cf_node, node, node, list) {
471 bool ret;
472
473 switch (node->type) {
474 case nir_cf_node_block:
475 ret = ppir_emit_block(comp, nir_cf_node_as_block(node));
476 break;
477 case nir_cf_node_if:
478 ret = ppir_emit_if(comp, nir_cf_node_as_if(node));
479 break;
480 case nir_cf_node_loop:
481 ret = ppir_emit_loop(comp, nir_cf_node_as_loop(node));
482 break;
483 case nir_cf_node_function:
484 ret = ppir_emit_function(comp, nir_cf_node_as_function(node));
485 break;
486 default:
487 ppir_error("unknown NIR node type %d\n", node->type);
488 return false;
489 }
490
491 if (!ret)
492 return false;
493 }
494
495 return true;
496 }
497
498 static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
499 {
500 ppir_compiler *comp = rzalloc_size(
501 prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
502 if (!comp)
503 return NULL;
504
505 list_inithead(&comp->block_list);
506 list_inithead(&comp->reg_list);
507
508 comp->var_nodes = (ppir_node **)(comp + 1);
509 comp->reg_base = num_ssa;
510 comp->prog = prog;
511 return comp;
512 }
513
514 static void ppir_add_ordering_deps(ppir_compiler *comp)
515 {
516 /* Some intrinsics do not have explicit dependencies and thus depend
517 * on instructions order. Consider discard_if and store_ouput as
518 * example. If we don't add fake dependency of discard_if to store_output
519 * scheduler may put store_output first and since store_output terminates
520 * shader on Utgard PP, rest of it will never be executed.
521 * Add fake dependencies for discard/branch/store to preserve
522 * instruction order.
523 *
524 * TODO: scheduler should schedule discard_if as early as possible otherwise
525 * we may end up with suboptimal code for cases like this:
526 *
527 * s3 = s1 < s2
528 * discard_if s3
529 * s4 = s1 + s2
530 * store s4
531 *
532 * In this case store depends on discard_if and s4, but since dependencies can
533 * be scheduled in any order it can result in code like this:
534 *
535 * instr1: s3 = s1 < s3
536 * instr2: s4 = s1 + s2
537 * instr3: discard_if s3
538 * instr4: store s4
539 */
540 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
541 ppir_node *prev_node = NULL;
542 list_for_each_entry(ppir_node, node, &block->node_list, list) {
543 if (node->type == ppir_node_type_discard ||
544 node->type == ppir_node_type_store ||
545 node->type == ppir_node_type_branch) {
546 if (prev_node)
547 ppir_node_add_dep(node, prev_node);
548 prev_node = node;
549 }
550 }
551 }
552 }
553
554 bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
555 struct ra_regs *ra)
556 {
557 nir_function_impl *func = nir_shader_get_entrypoint(nir);
558 ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
559 if (!comp)
560 return false;
561
562 comp->ra = ra;
563
564 foreach_list_typed(nir_register, reg, node, &func->registers) {
565 ppir_reg *r = rzalloc(comp, ppir_reg);
566 if (!r)
567 return false;
568
569 r->index = reg->index;
570 r->num_components = reg->num_components;
571 r->live_in = INT_MAX;
572 r->live_out = 0;
573 r->is_head = false;
574 list_addtail(&r->list, &comp->reg_list);
575 }
576
577 if (!ppir_emit_cf_list(comp, &func->body))
578 goto err_out0;
579
580 /* If we have discard block add it to the very end */
581 if (comp->discard_block)
582 list_addtail(&comp->discard_block->list, &comp->block_list);
583
584 ppir_add_ordering_deps(comp);
585
586 ppir_node_print_prog(comp);
587
588 if (!ppir_lower_prog(comp))
589 goto err_out0;
590
591 if (!ppir_node_to_instr(comp))
592 goto err_out0;
593
594 if (!ppir_schedule_prog(comp))
595 goto err_out0;
596
597 if (!ppir_regalloc_prog(comp))
598 goto err_out0;
599
600 if (!ppir_codegen_prog(comp))
601 goto err_out0;
602
603 ralloc_free(comp);
604 return true;
605
606 err_out0:
607 ralloc_free(comp);
608 return false;
609 }
610