lima/ppir: drop fge/flt/feq/fne options
[mesa.git] / src / gallium / drivers / lima / ir / pp / nir.c
1 /*
2 * Copyright (c) 2017 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/hash_table.h"
28 #include "util/ralloc.h"
29 #include "util/bitscan.h"
30 #include "compiler/nir/nir.h"
31 #include "pipe/p_state.h"
32
33
34 #include "ppir.h"
35
36 static void *ppir_node_create_ssa(ppir_block *block, ppir_op op, nir_ssa_def *ssa)
37 {
38 ppir_node *node = ppir_node_create(block, op, ssa->index, 0);
39 if (!node)
40 return NULL;
41
42 ppir_dest *dest = ppir_node_get_dest(node);
43 dest->type = ppir_target_ssa;
44 dest->ssa.num_components = ssa->num_components;
45 dest->ssa.live_in = INT_MAX;
46 dest->ssa.live_out = 0;
47 dest->write_mask = u_bit_consecutive(0, ssa->num_components);
48
49 if (node->type == ppir_node_type_load ||
50 node->type == ppir_node_type_store)
51 dest->ssa.is_head = true;
52
53 return node;
54 }
55
56 static void *ppir_node_create_reg(ppir_block *block, ppir_op op,
57 nir_register *reg, unsigned mask)
58 {
59 ppir_node *node = ppir_node_create(block, op, reg->index, mask);
60 if (!node)
61 return NULL;
62
63 ppir_dest *dest = ppir_node_get_dest(node);
64
65 list_for_each_entry(ppir_reg, r, &block->comp->reg_list, list) {
66 if (r->index == reg->index) {
67 dest->reg = r;
68 break;
69 }
70 }
71
72 dest->type = ppir_target_register;
73 dest->write_mask = mask;
74
75 if (node->type == ppir_node_type_load ||
76 node->type == ppir_node_type_store)
77 dest->reg->is_head = true;
78
79 return node;
80 }
81
82 static void *ppir_node_create_dest(ppir_block *block, ppir_op op,
83 nir_dest *dest, unsigned mask)
84 {
85 unsigned index = -1;
86
87 if (dest) {
88 if (dest->is_ssa)
89 return ppir_node_create_ssa(block, op, &dest->ssa);
90 else
91 return ppir_node_create_reg(block, op, dest->reg.reg, mask);
92 }
93
94 return ppir_node_create(block, op, index, 0);
95 }
96
97 static void ppir_node_add_src(ppir_compiler *comp, ppir_node *node,
98 ppir_src *ps, nir_src *ns, unsigned mask)
99 {
100 ppir_node *child = NULL;
101
102 if (ns->is_ssa) {
103 child = comp->var_nodes[ns->ssa->index];
104 /* Clone consts for each successor */
105 switch (child->op) {
106 case ppir_op_const:
107 child = ppir_node_clone(node->block, child);
108 break;
109 case ppir_op_load_texture:
110 /* Clone texture loads for each block */
111 if (child->block != node->block) {
112 child = ppir_node_clone(node->block, child);
113 comp->var_nodes[ns->ssa->index] = child;
114 }
115 break;
116 case ppir_op_load_varying:
117 if ((node->op != ppir_op_load_texture)) {
118 /* Clone varying loads for each block */
119 if (child->block != node->block) {
120 child = ppir_node_clone(node->block, child);
121 comp->var_nodes[ns->ssa->index] = child;
122 }
123 break;
124 }
125 /* At least one successor is load_texture, promote it to load_coords
126 * to ensure that is has exactly one successor */
127 child->op = ppir_op_load_coords;
128 /* Fallthrough */
129 case ppir_op_load_uniform:
130 case ppir_op_load_coords:
131 /* Clone uniform and texture coord loads for each block.
132 * Also ensure that each load has a single successor.
133 * Let's do a fetch each time and hope for a cache hit instead
134 * of increasing reg pressure.
135 */
136 if (child->block != node->block || !ppir_node_is_root(child)) {
137 child = ppir_node_clone(node->block, child);
138 comp->var_nodes[ns->ssa->index] = child;
139 }
140 break;
141 default:
142 break;
143 }
144
145 ppir_node_add_dep(node, child);
146 }
147 else {
148 nir_register *reg = ns->reg.reg;
149 while (mask) {
150 int swizzle = ps->swizzle[u_bit_scan(&mask)];
151 child = comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle];
152 /* Reg is read before it was written, create a dummy node for it */
153 if (!child) {
154 child = ppir_node_create_reg(node->block, ppir_op_dummy, reg,
155 u_bit_consecutive(0, 4));
156 comp->var_nodes[(reg->index << 2) + comp->reg_base + swizzle] = child;
157 }
158 /* Don't add dummies or recursive deps for ops like r1 = r1 + ssa1 */
159 if (child && node != child && child->op != ppir_op_dummy)
160 ppir_node_add_dep(node, child);
161 }
162 }
163
164 ppir_node_target_assign(ps, child);
165 }
166
167 static int nir_to_ppir_opcodes[nir_num_opcodes] = {
168 /* not supported */
169 [0 ... nir_last_opcode] = -1,
170
171 [nir_op_mov] = ppir_op_mov,
172 [nir_op_fmul] = ppir_op_mul,
173 [nir_op_fabs] = ppir_op_abs,
174 [nir_op_fneg] = ppir_op_neg,
175 [nir_op_fadd] = ppir_op_add,
176 [nir_op_fsum3] = ppir_op_sum3,
177 [nir_op_fsum4] = ppir_op_sum4,
178 [nir_op_frsq] = ppir_op_rsqrt,
179 [nir_op_flog2] = ppir_op_log2,
180 [nir_op_fexp2] = ppir_op_exp2,
181 [nir_op_fsqrt] = ppir_op_sqrt,
182 [nir_op_fsin] = ppir_op_sin,
183 [nir_op_fcos] = ppir_op_cos,
184 [nir_op_fmax] = ppir_op_max,
185 [nir_op_fmin] = ppir_op_min,
186 [nir_op_frcp] = ppir_op_rcp,
187 [nir_op_ffloor] = ppir_op_floor,
188 [nir_op_fceil] = ppir_op_ceil,
189 [nir_op_ffract] = ppir_op_fract,
190 [nir_op_sge] = ppir_op_ge,
191 [nir_op_slt] = ppir_op_lt,
192 [nir_op_seq] = ppir_op_eq,
193 [nir_op_sne] = ppir_op_ne,
194 [nir_op_fcsel] = ppir_op_select,
195 [nir_op_inot] = ppir_op_not,
196 [nir_op_ftrunc] = ppir_op_trunc,
197 [nir_op_fsat] = ppir_op_sat,
198 [nir_op_fddx] = ppir_op_ddx,
199 [nir_op_fddy] = ppir_op_ddy,
200 };
201
202 static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
203 {
204 nir_alu_instr *instr = nir_instr_as_alu(ni);
205 int op = nir_to_ppir_opcodes[instr->op];
206
207 if (op < 0) {
208 ppir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name);
209 return NULL;
210 }
211
212 ppir_alu_node *node = ppir_node_create_dest(block, op, &instr->dest.dest,
213 instr->dest.write_mask);
214 if (!node)
215 return NULL;
216
217 ppir_dest *pd = &node->dest;
218 nir_alu_dest *nd = &instr->dest;
219 if (nd->saturate)
220 pd->modifier = ppir_outmod_clamp_fraction;
221
222 unsigned src_mask;
223 switch (op) {
224 case ppir_op_sum3:
225 src_mask = 0b0111;
226 break;
227 case ppir_op_sum4:
228 src_mask = 0b1111;
229 break;
230 default:
231 src_mask = pd->write_mask;
232 break;
233 }
234
235 unsigned num_child = nir_op_infos[instr->op].num_inputs;
236 node->num_src = num_child;
237
238 for (int i = 0; i < num_child; i++) {
239 nir_alu_src *ns = instr->src + i;
240 ppir_src *ps = node->src + i;
241 memcpy(ps->swizzle, ns->swizzle, sizeof(ps->swizzle));
242 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask);
243
244 ps->absolute = ns->abs;
245 ps->negate = ns->negate;
246 }
247
248 return &node->node;
249 }
250
251 static ppir_block *ppir_block_create(ppir_compiler *comp);
252
253 static bool ppir_emit_discard_block(ppir_compiler *comp)
254 {
255 ppir_block *block = ppir_block_create(comp);
256 ppir_discard_node *discard;
257 if (!block)
258 return false;
259
260 comp->discard_block = block;
261 block->comp = comp;
262
263 discard = ppir_node_create(block, ppir_op_discard, -1, 0);
264 if (discard)
265 list_addtail(&discard->node.list, &block->node_list);
266 else
267 return false;
268
269 return true;
270 }
271
272 static ppir_node *ppir_emit_discard_if(ppir_block *block, nir_instr *ni)
273 {
274 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
275 ppir_node *node;
276 ppir_compiler *comp = block->comp;
277 ppir_branch_node *branch;
278
279 if (!comp->discard_block && !ppir_emit_discard_block(comp))
280 return NULL;
281
282 node = ppir_node_create(block, ppir_op_branch, -1, 0);
283 if (!node)
284 return NULL;
285 branch = ppir_node_to_branch(node);
286
287 /* second src and condition will be updated during lowering */
288 ppir_node_add_src(block->comp, node, &branch->src[0],
289 &instr->src[0], u_bit_consecutive(0, instr->num_components));
290 branch->num_src = 1;
291 branch->target = comp->discard_block;
292
293 return node;
294 }
295
296 static ppir_node *ppir_emit_discard(ppir_block *block, nir_instr *ni)
297 {
298 ppir_node *node = ppir_node_create(block, ppir_op_discard, -1, 0);
299
300 return node;
301 }
302
303 static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
304 {
305 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
306 unsigned mask = 0;
307 ppir_load_node *lnode;
308 ppir_alu_node *alu_node;
309
310 switch (instr->intrinsic) {
311 case nir_intrinsic_load_input:
312 if (!instr->dest.is_ssa)
313 mask = u_bit_consecutive(0, instr->num_components);
314
315 lnode = ppir_node_create_dest(block, ppir_op_load_varying, &instr->dest, mask);
316 if (!lnode)
317 return NULL;
318
319 lnode->num_components = instr->num_components;
320 lnode->index = nir_intrinsic_base(instr) * 4 + nir_intrinsic_component(instr);
321 return &lnode->node;
322
323 case nir_intrinsic_load_frag_coord:
324 case nir_intrinsic_load_point_coord:
325 case nir_intrinsic_load_front_face:
326 if (!instr->dest.is_ssa)
327 mask = u_bit_consecutive(0, instr->num_components);
328
329 ppir_op op;
330 switch (instr->intrinsic) {
331 case nir_intrinsic_load_frag_coord:
332 op = ppir_op_load_fragcoord;
333 break;
334 case nir_intrinsic_load_point_coord:
335 op = ppir_op_load_pointcoord;
336 break;
337 case nir_intrinsic_load_front_face:
338 op = ppir_op_load_frontface;
339 break;
340 default:
341 assert(0);
342 break;
343 }
344
345 lnode = ppir_node_create_dest(block, op, &instr->dest, mask);
346 if (!lnode)
347 return NULL;
348
349 lnode->num_components = instr->num_components;
350 return &lnode->node;
351
352 case nir_intrinsic_load_uniform:
353 if (!instr->dest.is_ssa)
354 mask = u_bit_consecutive(0, instr->num_components);
355
356 lnode = ppir_node_create_dest(block, ppir_op_load_uniform, &instr->dest, mask);
357 if (!lnode)
358 return NULL;
359
360 lnode->num_components = instr->num_components;
361 lnode->index = nir_intrinsic_base(instr);
362 lnode->index += (uint32_t)nir_src_as_float(instr->src[0]);
363
364 return &lnode->node;
365
366 case nir_intrinsic_store_output: {
367 alu_node = ppir_node_create_dest(block, ppir_op_store_color, NULL, 0);
368 if (!alu_node)
369 return NULL;
370
371 ppir_dest *dest = ppir_node_get_dest(&alu_node->node);
372 dest->type = ppir_target_ssa;
373 dest->ssa.num_components = instr->num_components;
374 dest->ssa.live_in = INT_MAX;
375 dest->ssa.live_out = 0;
376 dest->ssa.index = 0;
377 dest->write_mask = u_bit_consecutive(0, instr->num_components);
378
379 alu_node->num_src = 1;
380
381 for (int i = 0; i < instr->num_components; i++)
382 alu_node->src[0].swizzle[i] = i;
383
384 ppir_node_add_src(block->comp, &alu_node->node, alu_node->src, instr->src,
385 u_bit_consecutive(0, instr->num_components));
386
387 return &alu_node->node;
388 }
389
390 case nir_intrinsic_discard:
391 return ppir_emit_discard(block, ni);
392
393 case nir_intrinsic_discard_if:
394 return ppir_emit_discard_if(block, ni);
395
396 default:
397 ppir_error("unsupported nir_intrinsic_instr %s\n",
398 nir_intrinsic_infos[instr->intrinsic].name);
399 return NULL;
400 }
401 }
402
403 static ppir_node *ppir_emit_load_const(ppir_block *block, nir_instr *ni)
404 {
405 nir_load_const_instr *instr = nir_instr_as_load_const(ni);
406 ppir_const_node *node = ppir_node_create_ssa(block, ppir_op_const, &instr->def);
407 if (!node)
408 return NULL;
409
410 assert(instr->def.bit_size == 32);
411
412 for (int i = 0; i < instr->def.num_components; i++)
413 node->constant.value[i].i = instr->value[i].i32;
414 node->constant.num = instr->def.num_components;
415
416 return &node->node;
417 }
418
419 static ppir_node *ppir_emit_ssa_undef(ppir_block *block, nir_instr *ni)
420 {
421 ppir_error("nir_ssa_undef_instr not support\n");
422 return NULL;
423 }
424
425 static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
426 {
427 nir_tex_instr *instr = nir_instr_as_tex(ni);
428 ppir_load_texture_node *node;
429
430 if (instr->op != nir_texop_tex) {
431 ppir_error("unsupported texop %d\n", instr->op);
432 return NULL;
433 }
434
435 unsigned mask = 0;
436 if (!instr->dest.is_ssa)
437 mask = u_bit_consecutive(0, nir_tex_instr_dest_size(instr));
438
439 node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, mask);
440 if (!node)
441 return NULL;
442
443 node->sampler = instr->texture_index;
444
445 switch (instr->sampler_dim) {
446 case GLSL_SAMPLER_DIM_2D:
447 case GLSL_SAMPLER_DIM_RECT:
448 case GLSL_SAMPLER_DIM_EXTERNAL:
449 break;
450 default:
451 ppir_error("unsupported sampler dim: %d\n", instr->sampler_dim);
452 return NULL;
453 }
454
455 node->sampler_dim = instr->sampler_dim;
456
457 for (int i = 0; i < instr->coord_components; i++)
458 node->src_coords.swizzle[i] = i;
459
460 for (int i = 0; i < instr->num_srcs; i++) {
461 switch (instr->src[i].src_type) {
462 case nir_tex_src_coord:
463 ppir_node_add_src(block->comp, &node->node, &node->src_coords, &instr->src[i].src,
464 u_bit_consecutive(0, instr->coord_components));
465 break;
466 default:
467 ppir_error("unsupported texture source type\n");
468 assert(0);
469 return NULL;
470 }
471 }
472
473 return &node->node;
474 }
475
476 static ppir_block *ppir_get_block(ppir_compiler *comp, nir_block *nblock)
477 {
478 ppir_block *block = _mesa_hash_table_u64_search(comp->blocks, (uint64_t)nblock);
479
480 return block;
481 }
482
483 static ppir_node *ppir_emit_jump(ppir_block *block, nir_instr *ni)
484 {
485 ppir_node *node;
486 ppir_compiler *comp = block->comp;
487 ppir_branch_node *branch;
488 ppir_block *jump_block;
489 nir_jump_instr *jump = nir_instr_as_jump(ni);
490
491 switch (jump->type) {
492 case nir_jump_break: {
493 assert(comp->current_block->successors[0]);
494 assert(!comp->current_block->successors[1]);
495 jump_block = comp->current_block->successors[0];
496 }
497 break;
498 case nir_jump_continue:
499 jump_block = comp->loop_cont_block;
500 break;
501 default:
502 ppir_error("nir_jump_instr not support\n");
503 return NULL;
504 }
505
506 assert(jump_block != NULL);
507
508 node = ppir_node_create(block, ppir_op_branch, -1, 0);
509 if (!node)
510 return NULL;
511 branch = ppir_node_to_branch(node);
512
513 /* Unconditional */
514 branch->num_src = 0;
515 branch->target = jump_block;
516
517 return node;
518 }
519
520 static ppir_node *(*ppir_emit_instr[nir_instr_type_phi])(ppir_block *, nir_instr *) = {
521 [nir_instr_type_alu] = ppir_emit_alu,
522 [nir_instr_type_intrinsic] = ppir_emit_intrinsic,
523 [nir_instr_type_load_const] = ppir_emit_load_const,
524 [nir_instr_type_ssa_undef] = ppir_emit_ssa_undef,
525 [nir_instr_type_tex] = ppir_emit_tex,
526 [nir_instr_type_jump] = ppir_emit_jump,
527 };
528
529 static ppir_block *ppir_block_create(ppir_compiler *comp)
530 {
531 ppir_block *block = rzalloc(comp, ppir_block);
532 if (!block)
533 return NULL;
534
535 list_inithead(&block->node_list);
536 list_inithead(&block->instr_list);
537
538 block->comp = comp;
539
540 return block;
541 }
542
543 static bool ppir_emit_block(ppir_compiler *comp, nir_block *nblock)
544 {
545 ppir_block *block = ppir_get_block(comp, nblock);
546
547 comp->current_block = block;
548
549 list_addtail(&block->list, &comp->block_list);
550
551 nir_foreach_instr(instr, nblock) {
552 assert(instr->type < nir_instr_type_phi);
553 ppir_node *node = ppir_emit_instr[instr->type](block, instr);
554 if (!node)
555 return false;
556
557 list_addtail(&node->list, &block->node_list);
558 }
559
560 return true;
561 }
562
563 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list);
564
565 static bool ppir_emit_if(ppir_compiler *comp, nir_if *if_stmt)
566 {
567 ppir_node *node;
568 ppir_branch_node *else_branch, *after_branch;
569 nir_block *nir_else_block = nir_if_first_else_block(if_stmt);
570 bool empty_else_block =
571 (nir_else_block == nir_if_last_else_block(if_stmt) &&
572 exec_list_is_empty(&nir_else_block->instr_list));
573 ppir_block *block = comp->current_block;
574
575 node = ppir_node_create(block, ppir_op_branch, -1, 0);
576 if (!node)
577 return false;
578 else_branch = ppir_node_to_branch(node);
579 ppir_node_add_src(block->comp, node, &else_branch->src[0],
580 &if_stmt->condition, 1);
581 else_branch->num_src = 1;
582 /* Negate condition to minimize branching. We're generating following:
583 * current_block: { ...; if (!statement) branch else_block; }
584 * then_block: { ...; branch after_block; }
585 * else_block: { ... }
586 * after_block: { ... }
587 *
588 * or if else list is empty:
589 * block: { if (!statement) branch else_block; }
590 * then_block: { ... }
591 * else_block: after_block: { ... }
592 */
593 else_branch->negate = true;
594 list_addtail(&else_branch->node.list, &block->node_list);
595
596 ppir_emit_cf_list(comp, &if_stmt->then_list);
597 if (empty_else_block) {
598 nir_block *nblock = nir_if_last_else_block(if_stmt);
599 assert(nblock->successors[0]);
600 assert(!nblock->successors[1]);
601 else_branch->target = ppir_get_block(comp, nblock->successors[0]);
602 /* Add empty else block to the list */
603 list_addtail(&block->successors[1]->list, &comp->block_list);
604 return true;
605 }
606
607 else_branch->target = ppir_get_block(comp, nir_if_first_else_block(if_stmt));
608
609 nir_block *last_then_block = nir_if_last_then_block(if_stmt);
610 assert(last_then_block->successors[0]);
611 assert(!last_then_block->successors[1]);
612 block = ppir_get_block(comp, last_then_block);
613 node = ppir_node_create(block, ppir_op_branch, -1, 0);
614 if (!node)
615 return false;
616 after_branch = ppir_node_to_branch(node);
617 /* Unconditional */
618 after_branch->num_src = 0;
619 after_branch->target = ppir_get_block(comp, last_then_block->successors[0]);
620 /* Target should be after_block, will fixup later */
621 list_addtail(&after_branch->node.list, &block->node_list);
622
623 ppir_emit_cf_list(comp, &if_stmt->else_list);
624
625 return true;
626 }
627
628 static bool ppir_emit_loop(ppir_compiler *comp, nir_loop *nloop)
629 {
630 ppir_block *save_loop_cont_block = comp->loop_cont_block;
631 ppir_block *block;
632 ppir_branch_node *loop_branch;
633 nir_block *loop_last_block;
634 ppir_node *node;
635
636 comp->loop_cont_block = ppir_get_block(comp, nir_loop_first_block(nloop));
637
638 ppir_emit_cf_list(comp, &nloop->body);
639
640 loop_last_block = nir_loop_last_block(nloop);
641 block = ppir_get_block(comp, loop_last_block);
642 node = ppir_node_create(block, ppir_op_branch, -1, 0);
643 if (!node)
644 return false;
645 loop_branch = ppir_node_to_branch(node);
646 /* Unconditional */
647 loop_branch->num_src = 0;
648 loop_branch->target = comp->loop_cont_block;
649 list_addtail(&loop_branch->node.list, &block->node_list);
650
651 comp->loop_cont_block = save_loop_cont_block;
652
653 comp->num_loops++;
654
655 return true;
656 }
657
658 static bool ppir_emit_function(ppir_compiler *comp, nir_function_impl *nfunc)
659 {
660 ppir_error("function nir_cf_node not support\n");
661 return false;
662 }
663
664 static bool ppir_emit_cf_list(ppir_compiler *comp, struct exec_list *list)
665 {
666 foreach_list_typed(nir_cf_node, node, node, list) {
667 bool ret;
668
669 switch (node->type) {
670 case nir_cf_node_block:
671 ret = ppir_emit_block(comp, nir_cf_node_as_block(node));
672 break;
673 case nir_cf_node_if:
674 ret = ppir_emit_if(comp, nir_cf_node_as_if(node));
675 break;
676 case nir_cf_node_loop:
677 ret = ppir_emit_loop(comp, nir_cf_node_as_loop(node));
678 break;
679 case nir_cf_node_function:
680 ret = ppir_emit_function(comp, nir_cf_node_as_function(node));
681 break;
682 default:
683 ppir_error("unknown NIR node type %d\n", node->type);
684 return false;
685 }
686
687 if (!ret)
688 return false;
689 }
690
691 return true;
692 }
693
694 static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigned num_ssa)
695 {
696 ppir_compiler *comp = rzalloc_size(
697 prog, sizeof(*comp) + ((num_reg << 2) + num_ssa) * sizeof(ppir_node *));
698 if (!comp)
699 return NULL;
700
701 list_inithead(&comp->block_list);
702 list_inithead(&comp->reg_list);
703 comp->blocks = _mesa_hash_table_u64_create(prog);
704
705 comp->var_nodes = (ppir_node **)(comp + 1);
706 comp->reg_base = num_ssa;
707 comp->prog = prog;
708 return comp;
709 }
710
711 static void ppir_add_ordering_deps(ppir_compiler *comp)
712 {
713 /* Some intrinsics do not have explicit dependencies and thus depend
714 * on instructions order. Consider discard_if and store_ouput as
715 * example. If we don't add fake dependency of discard_if to store_output
716 * scheduler may put store_output first and since store_output terminates
717 * shader on Utgard PP, rest of it will never be executed.
718 * Add fake dependencies for discard/branch/store to preserve
719 * instruction order.
720 *
721 * TODO: scheduler should schedule discard_if as early as possible otherwise
722 * we may end up with suboptimal code for cases like this:
723 *
724 * s3 = s1 < s2
725 * discard_if s3
726 * s4 = s1 + s2
727 * store s4
728 *
729 * In this case store depends on discard_if and s4, but since dependencies can
730 * be scheduled in any order it can result in code like this:
731 *
732 * instr1: s3 = s1 < s3
733 * instr2: s4 = s1 + s2
734 * instr3: discard_if s3
735 * instr4: store s4
736 */
737 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
738 ppir_node *prev_node = NULL;
739 list_for_each_entry_rev(ppir_node, node, &block->node_list, list) {
740 if (prev_node && ppir_node_is_root(node) && node->op != ppir_op_const) {
741 ppir_node_add_dep(prev_node, node);
742 }
743 if (node->op == ppir_op_discard ||
744 node->op == ppir_op_store_color ||
745 node->op == ppir_op_store_temp ||
746 node->op == ppir_op_branch) {
747 prev_node = node;
748 }
749 }
750 }
751 }
752
753 static void ppir_print_shader_db(struct nir_shader *nir, ppir_compiler *comp,
754 struct pipe_debug_callback *debug)
755 {
756 const struct shader_info *info = &nir->info;
757 char *shaderdb;
758 int ret = asprintf(&shaderdb,
759 "%s shader: %d inst, %d loops, %d:%d spills:fills\n",
760 gl_shader_stage_name(info->stage),
761 comp->cur_instr_index,
762 comp->num_loops,
763 comp->num_spills,
764 comp->num_fills);
765 assert(ret >= 0);
766
767 if (lima_debug & LIMA_DEBUG_SHADERDB)
768 fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
769
770 pipe_debug_message(debug, SHADER_INFO, "%s", shaderdb);
771 free(shaderdb);
772 }
773
774 static void ppir_add_write_after_read_deps(ppir_compiler *comp)
775 {
776 list_for_each_entry(ppir_block, block, &comp->block_list, list) {
777 list_for_each_entry(ppir_reg, reg, &comp->reg_list, list) {
778 ppir_node *write = NULL;
779 list_for_each_entry_rev(ppir_node, node, &block->node_list, list) {
780 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
781 ppir_src *src = ppir_node_get_src(node, i);
782 if (src && src->type == ppir_target_register &&
783 src->reg == reg &&
784 write)
785 ppir_node_add_dep(write, node);
786 }
787 ppir_dest *dest = ppir_node_get_dest(node);
788 if (dest && dest->type == ppir_target_register &&
789 dest->reg == reg)
790 write = node;
791 }
792 }
793 }
794 }
795
796 bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
797 struct ra_regs *ra,
798 struct pipe_debug_callback *debug)
799 {
800 nir_function_impl *func = nir_shader_get_entrypoint(nir);
801 ppir_compiler *comp = ppir_compiler_create(prog, func->reg_alloc, func->ssa_alloc);
802 if (!comp)
803 return false;
804
805 comp->ra = ra;
806
807 /* 1st pass: create ppir blocks */
808 nir_foreach_function(function, nir) {
809 if (!function->impl)
810 continue;
811
812 nir_foreach_block(nblock, function->impl) {
813 ppir_block *block = ppir_block_create(comp);
814 if (!block)
815 return false;
816 block->index = nblock->index;
817 _mesa_hash_table_u64_insert(comp->blocks, (uint64_t)nblock, block);
818 }
819 }
820
821 /* 2nd pass: populate successors */
822 nir_foreach_function(function, nir) {
823 if (!function->impl)
824 continue;
825
826 nir_foreach_block(nblock, function->impl) {
827 ppir_block *block = ppir_get_block(comp, nblock);
828 assert(block);
829
830 for (int i = 0; i < 2; i++) {
831 if (nblock->successors[i])
832 block->successors[i] = ppir_get_block(comp, nblock->successors[i]);
833 }
834 }
835 }
836
837 /* Validate outputs, we support only gl_FragColor */
838 nir_foreach_variable(var, &nir->outputs) {
839 switch (var->data.location) {
840 case FRAG_RESULT_COLOR:
841 case FRAG_RESULT_DATA0:
842 break;
843 default:
844 ppir_error("unsupported output type\n");
845 goto err_out0;
846 break;
847 }
848 }
849
850 foreach_list_typed(nir_register, reg, node, &func->registers) {
851 ppir_reg *r = rzalloc(comp, ppir_reg);
852 if (!r)
853 return false;
854
855 r->index = reg->index;
856 r->num_components = reg->num_components;
857 r->live_in = INT_MAX;
858 r->live_out = 0;
859 r->is_head = false;
860 list_addtail(&r->list, &comp->reg_list);
861 }
862
863 if (!ppir_emit_cf_list(comp, &func->body))
864 goto err_out0;
865
866 /* If we have discard block add it to the very end */
867 if (comp->discard_block)
868 list_addtail(&comp->discard_block->list, &comp->block_list);
869
870 ppir_node_print_prog(comp);
871
872 if (!ppir_lower_prog(comp))
873 goto err_out0;
874
875 ppir_add_ordering_deps(comp);
876 ppir_add_write_after_read_deps(comp);
877
878 ppir_node_print_prog(comp);
879
880 if (!ppir_node_to_instr(comp))
881 goto err_out0;
882
883 if (!ppir_schedule_prog(comp))
884 goto err_out0;
885
886 if (!ppir_regalloc_prog(comp))
887 goto err_out0;
888
889 if (!ppir_codegen_prog(comp))
890 goto err_out0;
891
892 ppir_print_shader_db(nir, comp, debug);
893
894 _mesa_hash_table_u64_destroy(comp->blocks, NULL);
895 ralloc_free(comp);
896 return true;
897
898 err_out0:
899 _mesa_hash_table_u64_destroy(comp->blocks, NULL);
900 ralloc_free(comp);
901 return false;
902 }
903