lima: add noheap debug option
[mesa.git] / src / gallium / drivers / lima / lima_screen.c
1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "lima_util.h"
43 #include "ir/lima_ir.h"
44
45 #include "xf86drm.h"
46
47 int lima_plb_max_blk = 0;
48
49 static void
50 lima_screen_destroy(struct pipe_screen *pscreen)
51 {
52 struct lima_screen *screen = lima_screen(pscreen);
53
54 lima_dump_file_close();
55
56 slab_destroy_parent(&screen->transfer_pool);
57
58 if (screen->ro)
59 free(screen->ro);
60
61 if (screen->pp_buffer)
62 lima_bo_unreference(screen->pp_buffer);
63
64 lima_bo_cache_fini(screen);
65 lima_bo_table_fini(screen);
66 ralloc_free(screen);
67 }
68
69 static const char *
70 lima_screen_get_name(struct pipe_screen *pscreen)
71 {
72 struct lima_screen *screen = lima_screen(pscreen);
73
74 switch (screen->gpu_type) {
75 case DRM_LIMA_PARAM_GPU_ID_MALI400:
76 return "Mali400";
77 case DRM_LIMA_PARAM_GPU_ID_MALI450:
78 return "Mali450";
79 }
80
81 return NULL;
82 }
83
84 static const char *
85 lima_screen_get_vendor(struct pipe_screen *pscreen)
86 {
87 return "lima";
88 }
89
90 static const char *
91 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
92 {
93 return "ARM";
94 }
95
96 static int
97 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
98 {
99 switch (param) {
100 case PIPE_CAP_NPOT_TEXTURES:
101 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
102 case PIPE_CAP_ACCELERATED:
103 case PIPE_CAP_UMA:
104 case PIPE_CAP_NATIVE_FENCE_FD:
105 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
106 return 1;
107
108 /* Unimplemented, but for exporting OpenGL 2.0 */
109 case PIPE_CAP_OCCLUSION_QUERY:
110 case PIPE_CAP_POINT_SPRITE:
111 return 1;
112
113 /* not clear supported */
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
118 return 1;
119
120 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
121 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
122 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
123 return 1;
124
125 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
126 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
127 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
128 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
129 return LIMA_MAX_MIP_LEVELS;
130
131 case PIPE_CAP_VENDOR_ID:
132 return 0x13B5;
133
134 case PIPE_CAP_VIDEO_MEMORY:
135 return 0;
136
137 case PIPE_CAP_PCI_GROUP:
138 case PIPE_CAP_PCI_BUS:
139 case PIPE_CAP_PCI_DEVICE:
140 case PIPE_CAP_PCI_FUNCTION:
141 return 0;
142
143 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
144 return 0;
145
146 case PIPE_CAP_ALPHA_TEST:
147 case PIPE_CAP_FLATSHADE:
148 case PIPE_CAP_TWO_SIDED_COLOR:
149 case PIPE_CAP_CLIP_PLANES:
150 return 0;
151
152 default:
153 return u_pipe_screen_get_param_defaults(pscreen, param);
154 }
155 }
156
157 static float
158 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
159 {
160 switch (param) {
161 case PIPE_CAPF_MAX_LINE_WIDTH:
162 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
163 case PIPE_CAPF_MAX_POINT_WIDTH:
164 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
165 return 100.0f;
166 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
167 return 16.0f;
168 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
169 return 15.0f;
170
171 default:
172 return 0.0f;
173 }
174 }
175
176 static int
177 get_vertex_shader_param(struct lima_screen *screen,
178 enum pipe_shader_cap param)
179 {
180 switch (param) {
181 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
182 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
183 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
184 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
185 return 16384; /* need investigate */
186
187 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
188 return 1024;
189
190 case PIPE_SHADER_CAP_MAX_INPUTS:
191 return 16; /* attributes */
192
193 case PIPE_SHADER_CAP_MAX_OUTPUTS:
194 return LIMA_MAX_VARYING_NUM; /* varying */
195
196 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
197 return 16 * 1024 * sizeof(float);
198
199 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
200 return 1;
201
202 case PIPE_SHADER_CAP_PREFERRED_IR:
203 return PIPE_SHADER_IR_NIR;
204
205 case PIPE_SHADER_CAP_MAX_TEMPS:
206 return 256; /* need investigate */
207
208 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
209 return 32;
210
211 default:
212 return 0;
213 }
214 }
215
216 static int
217 get_fragment_shader_param(struct lima_screen *screen,
218 enum pipe_shader_cap param)
219 {
220 switch (param) {
221 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
222 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
223 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
224 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
225 return 16384; /* need investigate */
226
227 case PIPE_SHADER_CAP_MAX_INPUTS:
228 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
229
230 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
231 return 1024;
232
233 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
234 return 16 * 1024 * sizeof(float);
235
236 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
237 return 1;
238
239 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
240 return 16; /* need investigate */
241
242 case PIPE_SHADER_CAP_PREFERRED_IR:
243 return PIPE_SHADER_IR_NIR;
244
245 case PIPE_SHADER_CAP_MAX_TEMPS:
246 return 256; /* need investigate */
247
248 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
249 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
250 return 1;
251
252 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
253 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
254 return 0;
255
256 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
257 return 32;
258
259 default:
260 return 0;
261 }
262 }
263
264 static int
265 lima_screen_get_shader_param(struct pipe_screen *pscreen,
266 enum pipe_shader_type shader,
267 enum pipe_shader_cap param)
268 {
269 struct lima_screen *screen = lima_screen(pscreen);
270
271 switch (shader) {
272 case PIPE_SHADER_FRAGMENT:
273 return get_fragment_shader_param(screen, param);
274 case PIPE_SHADER_VERTEX:
275 return get_vertex_shader_param(screen, param);
276
277 default:
278 return 0;
279 }
280 }
281
282 static bool
283 lima_screen_is_format_supported(struct pipe_screen *pscreen,
284 enum pipe_format format,
285 enum pipe_texture_target target,
286 unsigned sample_count,
287 unsigned storage_sample_count,
288 unsigned usage)
289 {
290 switch (target) {
291 case PIPE_BUFFER:
292 case PIPE_TEXTURE_1D:
293 case PIPE_TEXTURE_2D:
294 case PIPE_TEXTURE_RECT:
295 case PIPE_TEXTURE_CUBE:
296 break;
297 default:
298 return false;
299 }
300
301 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
302 return false;
303
304 /* be able to support 16, now limit to 4 */
305 if (sample_count > 1 && sample_count != 4)
306 return false;
307
308 if (usage & PIPE_BIND_RENDER_TARGET &&
309 !lima_format_pixel_supported(format))
310 return false;
311
312 if (usage & PIPE_BIND_DEPTH_STENCIL) {
313 switch (format) {
314 case PIPE_FORMAT_Z16_UNORM:
315 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
316 case PIPE_FORMAT_Z24X8_UNORM:
317 break;
318 default:
319 return false;
320 }
321 }
322
323 if (usage & PIPE_BIND_VERTEX_BUFFER) {
324 switch (format) {
325 case PIPE_FORMAT_R32G32B32_FLOAT:
326 break;
327 default:
328 return false;
329 }
330 }
331
332 if (usage & PIPE_BIND_INDEX_BUFFER) {
333 switch (format) {
334 case PIPE_FORMAT_I8_UINT:
335 case PIPE_FORMAT_I16_UINT:
336 case PIPE_FORMAT_I32_UINT:
337 break;
338 default:
339 return false;
340 }
341 }
342
343 if (usage & PIPE_BIND_SAMPLER_VIEW)
344 return lima_format_texel_supported(format);
345
346 return true;
347 }
348
349 static const void *
350 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
351 enum pipe_shader_ir ir,
352 enum pipe_shader_type shader)
353 {
354 return lima_program_get_compiler_options(shader);
355 }
356
357 static bool
358 lima_screen_set_plb_max_blk(struct lima_screen *screen)
359 {
360 if (lima_plb_max_blk) {
361 screen->plb_max_blk = lima_plb_max_blk;
362 return true;
363 }
364
365 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
366 screen->plb_max_blk = 4096;
367 else
368 screen->plb_max_blk = 512;
369
370 drmDevicePtr devinfo;
371
372 if (drmGetDevice2(screen->fd, 0, &devinfo))
373 return false;
374
375 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
376 char **compatible = devinfo->deviceinfo.platform->compatible;
377
378 if (compatible && *compatible)
379 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
380 screen->plb_max_blk = 2048;
381 }
382
383 drmFreeDevice(&devinfo);
384
385 return true;
386 }
387
388 static bool
389 lima_screen_query_info(struct lima_screen *screen)
390 {
391 drmVersionPtr version = drmGetVersion(screen->fd);
392 if (!version)
393 return false;
394
395 if (version->version_major > 1 || version->version_minor > 0)
396 screen->has_growable_heap_buffer = true;
397
398 drmFreeVersion(version);
399
400 if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
401 screen->has_growable_heap_buffer = false;
402
403 struct drm_lima_get_param param;
404
405 memset(&param, 0, sizeof(param));
406 param.param = DRM_LIMA_PARAM_GPU_ID;
407 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
408 return false;
409
410 switch (param.value) {
411 case DRM_LIMA_PARAM_GPU_ID_MALI400:
412 case DRM_LIMA_PARAM_GPU_ID_MALI450:
413 screen->gpu_type = param.value;
414 break;
415 default:
416 return false;
417 }
418
419 memset(&param, 0, sizeof(param));
420 param.param = DRM_LIMA_PARAM_NUM_PP;
421 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
422 return false;
423
424 screen->num_pp = param.value;
425
426 lima_screen_set_plb_max_blk(screen);
427
428 return true;
429 }
430
431 static void
432 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
433 enum pipe_format format, int max,
434 uint64_t *modifiers,
435 unsigned int *external_only,
436 int *count)
437 {
438 uint64_t available_modifiers[] = {
439 DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
440 DRM_FORMAT_MOD_LINEAR,
441 };
442
443 if (!modifiers) {
444 *count = ARRAY_SIZE(available_modifiers);
445 return;
446 }
447
448 for (int i = 0; i < *count; i++) {
449 modifiers[i] = available_modifiers[i];
450 if (external_only)
451 external_only = false;
452 }
453 }
454
455 static const struct debug_named_value debug_options[] = {
456 { "gp", LIMA_DEBUG_GP,
457 "print GP shader compiler result of each stage" },
458 { "pp", LIMA_DEBUG_PP,
459 "print PP shader compiler result of each stage" },
460 { "dump", LIMA_DEBUG_DUMP,
461 "dump GPU command stream to $PWD/lima.dump" },
462 { "shaderdb", LIMA_DEBUG_SHADERDB,
463 "print shader information for shaderdb" },
464 { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
465 "disable BO cache" },
466 { "bocache", LIMA_DEBUG_BO_CACHE,
467 "print debug info for BO cache" },
468 { "notiling", LIMA_DEBUG_NO_TILING,
469 "don't use tiled buffers" },
470 { "nogrowheap", LIMA_DEBUG_NO_GROW_HEAP,
471 "disable growable heap buffer" },
472 { NULL }
473 };
474
475 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
476 uint32_t lima_debug;
477
478 static void
479 lima_screen_parse_env(void)
480 {
481 lima_debug = debug_get_option_lima_debug();
482
483 if (lima_debug & LIMA_DEBUG_DUMP)
484 lima_dump_file_open();
485
486 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
487 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
488 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
489 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
490 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
491 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
492 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
493 }
494
495 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
496 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
497 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
498 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
499 lima_plb_max_blk = 0;
500 }
501
502 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
503 if (lima_ppir_force_spilling < 0) {
504 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
505 "reset to default 0\n", lima_ppir_force_spilling);
506 lima_ppir_force_spilling = 0;
507 }
508 }
509
510 struct pipe_screen *
511 lima_screen_create(int fd, struct renderonly *ro)
512 {
513 struct lima_screen *screen;
514
515 screen = rzalloc(NULL, struct lima_screen);
516 if (!screen)
517 return NULL;
518
519 screen->fd = fd;
520
521 lima_screen_parse_env();
522
523 if (!lima_screen_query_info(screen))
524 goto err_out0;
525
526 if (!lima_bo_cache_init(screen))
527 goto err_out0;
528
529 if (!lima_bo_table_init(screen))
530 goto err_out1;
531
532 screen->pp_ra = ppir_regalloc_init(screen);
533 if (!screen->pp_ra)
534 goto err_out2;
535
536 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
537 if (!screen->pp_buffer)
538 goto err_out2;
539 screen->pp_buffer->cacheable = false;
540
541 /* fs program for clear buffer?
542 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
543 */
544 static const uint32_t pp_clear_program[] = {
545 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
546 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
547 };
548 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
549 pp_clear_program, sizeof(pp_clear_program));
550
551 /* copy texture to framebuffer, used to reload gpu tile buffer
552 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
553 */
554 static const uint32_t pp_reload_program[] = {
555 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
556 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
557 };
558 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
559 pp_reload_program, sizeof(pp_reload_program));
560
561 /* 0/1/2 vertex index for reload/clear draw */
562 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
563 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
564 pp_shared_index, sizeof(pp_shared_index));
565
566 /* 4096x4096 gl pos used for partial clear */
567 static const float pp_clear_gl_pos[] = {
568 4096, 0, 1, 1,
569 0, 0, 1, 1,
570 0, 4096, 1, 1,
571 };
572 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
573 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
574
575 /* is pp frame render state static? */
576 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
577 memset(pp_frame_rsw, 0, 0x40);
578 pp_frame_rsw[8] = 0x0000f008;
579 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
580 pp_frame_rsw[13] = 0x00000100;
581
582 if (ro) {
583 screen->ro = renderonly_dup(ro);
584 if (!screen->ro) {
585 fprintf(stderr, "Failed to dup renderonly object\n");
586 goto err_out3;
587 }
588 }
589
590 screen->base.destroy = lima_screen_destroy;
591 screen->base.get_name = lima_screen_get_name;
592 screen->base.get_vendor = lima_screen_get_vendor;
593 screen->base.get_device_vendor = lima_screen_get_device_vendor;
594 screen->base.get_param = lima_screen_get_param;
595 screen->base.get_paramf = lima_screen_get_paramf;
596 screen->base.get_shader_param = lima_screen_get_shader_param;
597 screen->base.context_create = lima_context_create;
598 screen->base.is_format_supported = lima_screen_is_format_supported;
599 screen->base.get_compiler_options = lima_screen_get_compiler_options;
600 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
601
602 lima_resource_screen_init(screen);
603 lima_fence_screen_init(screen);
604
605 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
606
607 screen->refcnt = 1;
608
609 return &screen->base;
610
611 err_out3:
612 lima_bo_unreference(screen->pp_buffer);
613 err_out2:
614 lima_bo_table_fini(screen);
615 err_out1:
616 lima_bo_cache_fini(screen);
617 err_out0:
618 ralloc_free(screen);
619 return NULL;
620 }