2 * Copyright 2011 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "codegen/nv50_ir_target_nvc0.h"
27 Target
*getTargetNVC0(unsigned int chipset
)
29 return new TargetNVC0(chipset
);
32 TargetNVC0::TargetNVC0(unsigned int card
) :
33 Target(card
< 0x110, false, card
>= 0xe4)
39 // BULTINS / LIBRARY FUNCTIONS:
41 // lazyness -> will just hardcode everything for the time being
43 #include "lib/gf100.asm.h"
44 #include "lib/gk104.asm.h"
45 #include "lib/gk110.asm.h"
48 TargetNVC0::getBuiltinCode(const uint32_t **code
, uint32_t *size
) const
50 switch (chipset
& ~0xf) {
52 if (chipset
< NVISA_GK20A_CHIPSET
) {
53 *code
= (const uint32_t *)&gk104_builtin_code
[0];
54 *size
= sizeof(gk104_builtin_code
);
57 /* fall-through for GK20A */
60 *code
= (const uint32_t *)&gk110_builtin_code
[0];
61 *size
= sizeof(gk110_builtin_code
);
64 *code
= (const uint32_t *)&gf100_builtin_code
[0];
65 *size
= sizeof(gf100_builtin_code
);
71 TargetNVC0::getBuiltinOffset(int builtin
) const
73 assert(builtin
< NVC0_BUILTIN_COUNT
);
75 switch (chipset
& ~0xf) {
77 if (chipset
< NVISA_GK20A_CHIPSET
)
78 return gk104_builtin_offsets
[builtin
];
79 /* fall-through for GK20A */
82 return gk110_builtin_offsets
[builtin
];
84 return gf100_builtin_offsets
[builtin
];
91 unsigned int mNeg
: 4;
92 unsigned int mAbs
: 4;
93 unsigned int mNot
: 4;
94 unsigned int mSat
: 4;
95 unsigned int fConst
: 3;
96 unsigned int fImmd
: 4; // last bit indicates if full immediate is suppoted
99 static const struct opProperties _initProps
[] =
101 // neg abs not sat c[] imm
102 { OP_ADD
, 0x3, 0x3, 0x0, 0x8, 0x2, 0x2 | 0x8 },
103 { OP_SUB
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 | 0x8 },
104 { OP_MUL
, 0x3, 0x0, 0x0, 0x8, 0x2, 0x2 | 0x8 },
105 { OP_MAX
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
106 { OP_MIN
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
107 { OP_MAD
, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // special c[] constraint
108 { OP_MADSP
, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
109 { OP_ABS
, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 },
110 { OP_NEG
, 0x0, 0x1, 0x0, 0x0, 0x1, 0x0 },
111 { OP_CVT
, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
112 { OP_CEIL
, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
113 { OP_FLOOR
, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
114 { OP_TRUNC
, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
115 { OP_AND
, 0x0, 0x0, 0x3, 0x0, 0x2, 0x2 | 0x8 },
116 { OP_OR
, 0x0, 0x0, 0x3, 0x0, 0x2, 0x2 | 0x8 },
117 { OP_XOR
, 0x0, 0x0, 0x3, 0x0, 0x2, 0x2 | 0x8 },
118 { OP_SHL
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 },
119 { OP_SHR
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 },
120 { OP_SET
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
121 { OP_SLCT
, 0x4, 0x0, 0x0, 0x0, 0x6, 0x2 }, // special c[] constraint
122 { OP_PREEX2
, 0x1, 0x1, 0x0, 0x0, 0x1, 0x1 },
123 { OP_PRESIN
, 0x1, 0x1, 0x0, 0x0, 0x1, 0x1 },
124 { OP_COS
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
125 { OP_SIN
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
126 { OP_EX2
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
127 { OP_LG2
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
128 { OP_RCP
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
129 { OP_RSQ
, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
130 { OP_DFDX
, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0 },
131 { OP_DFDY
, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0 },
132 { OP_CALL
, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 },
133 { OP_POPCNT
, 0x0, 0x0, 0x3, 0x0, 0x2, 0x2 },
134 { OP_INSBF
, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
135 { OP_EXTBF
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 },
136 { OP_BFIND
, 0x0, 0x0, 0x1, 0x0, 0x1, 0x1 },
137 { OP_PERMT
, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
138 { OP_SET_AND
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
139 { OP_SET_OR
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
140 { OP_SET_XOR
, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
142 { OP_LINTERP
, 0x0, 0x0, 0x0, 0x8, 0x0, 0x0 },
143 { OP_PINTERP
, 0x0, 0x0, 0x0, 0x8, 0x0, 0x0 },
145 { OP_SULDB
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x0 },
146 { OP_SUSTB
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x0 },
147 { OP_SUSTP
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x0 },
148 { OP_SUCLAMP
, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 },
149 { OP_SUBFM
, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 },
150 { OP_SUEAU
, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }
153 void TargetNVC0::initOpInfo()
157 static const uint32_t commutative
[(OP_LAST
+ 31) / 32] =
159 // ADD, MAD, MUL, AND, OR, XOR, MAX, MIN
160 0x0670ca00, 0x0000003f, 0x00000000, 0x00000000
163 static const uint32_t shortForm
[(OP_LAST
+ 31) / 32] =
165 // ADD, MAD, MUL, AND, OR, XOR, PRESIN, PREEX2, SFN, CVT, PINTERP, MOV
166 0x0670ca00, 0x00000000, 0x00000000, 0x00000000
169 static const operation noDest
[] =
171 OP_STORE
, OP_WRSV
, OP_EXPORT
, OP_BRA
, OP_CALL
, OP_RET
, OP_EXIT
,
172 OP_DISCARD
, OP_CONT
, OP_BREAK
, OP_PRECONT
, OP_PREBREAK
, OP_PRERET
,
173 OP_JOIN
, OP_JOINAT
, OP_BRKPT
, OP_MEMBAR
, OP_EMIT
, OP_RESTART
,
174 OP_QUADON
, OP_QUADPOP
, OP_TEXBAR
, OP_SUSTB
, OP_SUSTP
, OP_SUREDP
,
178 static const operation noPred
[] =
180 OP_CALL
, OP_PRERET
, OP_QUADON
, OP_QUADPOP
,
181 OP_JOINAT
, OP_PREBREAK
, OP_PRECONT
, OP_BRKPT
184 for (i
= 0; i
< DATA_FILE_COUNT
; ++i
)
185 nativeFileMap
[i
] = (DataFile
)i
;
186 nativeFileMap
[FILE_ADDRESS
] = FILE_GPR
;
188 for (i
= 0; i
< OP_LAST
; ++i
) {
189 opInfo
[i
].variants
= NULL
;
190 opInfo
[i
].op
= (operation
)i
;
191 opInfo
[i
].srcTypes
= 1 << (int)TYPE_F32
;
192 opInfo
[i
].dstTypes
= 1 << (int)TYPE_F32
;
193 opInfo
[i
].immdBits
= 0;
194 opInfo
[i
].srcNr
= operationSrcNr
[i
];
196 for (j
= 0; j
< opInfo
[i
].srcNr
; ++j
) {
197 opInfo
[i
].srcMods
[j
] = 0;
198 opInfo
[i
].srcFiles
[j
] = 1 << (int)FILE_GPR
;
200 opInfo
[i
].dstMods
= 0;
201 opInfo
[i
].dstFiles
= 1 << (int)FILE_GPR
;
203 opInfo
[i
].hasDest
= 1;
204 opInfo
[i
].vector
= (i
>= OP_TEX
&& i
<= OP_TEXCSAA
);
205 opInfo
[i
].commutative
= (commutative
[i
/ 32] >> (i
% 32)) & 1;
206 opInfo
[i
].pseudo
= (i
< OP_MOV
);
207 opInfo
[i
].predicate
= !opInfo
[i
].pseudo
;
208 opInfo
[i
].flow
= (i
>= OP_BRA
&& i
<= OP_JOIN
);
209 opInfo
[i
].minEncSize
= (shortForm
[i
/ 32] & (1 << (i
% 32))) ? 4 : 8;
211 for (i
= 0; i
< sizeof(noDest
) / sizeof(noDest
[0]); ++i
)
212 opInfo
[noDest
[i
]].hasDest
= 0;
213 for (i
= 0; i
< sizeof(noPred
) / sizeof(noPred
[0]); ++i
)
214 opInfo
[noPred
[i
]].predicate
= 0;
216 for (i
= 0; i
< sizeof(_initProps
) / sizeof(_initProps
[0]); ++i
) {
217 const struct opProperties
*prop
= &_initProps
[i
];
219 for (int s
= 0; s
< 3; ++s
) {
220 if (prop
->mNeg
& (1 << s
))
221 opInfo
[prop
->op
].srcMods
[s
] |= NV50_IR_MOD_NEG
;
222 if (prop
->mAbs
& (1 << s
))
223 opInfo
[prop
->op
].srcMods
[s
] |= NV50_IR_MOD_ABS
;
224 if (prop
->mNot
& (1 << s
))
225 opInfo
[prop
->op
].srcMods
[s
] |= NV50_IR_MOD_NOT
;
226 if (prop
->fConst
& (1 << s
))
227 opInfo
[prop
->op
].srcFiles
[s
] |= 1 << (int)FILE_MEMORY_CONST
;
228 if (prop
->fImmd
& (1 << s
))
229 opInfo
[prop
->op
].srcFiles
[s
] |= 1 << (int)FILE_IMMEDIATE
;
231 opInfo
[prop
->op
].immdBits
= 0xffffffff;
234 opInfo
[prop
->op
].dstMods
= NV50_IR_MOD_SAT
;
239 TargetNVC0::getFileSize(DataFile file
) const
242 case FILE_NULL
: return 0;
243 case FILE_GPR
: return (chipset
>= NVISA_GK20A_CHIPSET
) ? 255 : 63;
244 case FILE_PREDICATE
: return 7;
245 case FILE_FLAGS
: return 1;
246 case FILE_ADDRESS
: return 0;
247 case FILE_IMMEDIATE
: return 0;
248 case FILE_MEMORY_CONST
: return 65536;
249 case FILE_SHADER_INPUT
: return 0x400;
250 case FILE_SHADER_OUTPUT
: return 0x400;
251 case FILE_MEMORY_GLOBAL
: return 0xffffffff;
252 case FILE_MEMORY_SHARED
: return 16 << 10;
253 case FILE_MEMORY_LOCAL
: return 48 << 10;
254 case FILE_SYSTEM_VALUE
: return 32;
256 assert(!"invalid file");
262 TargetNVC0::getFileUnit(DataFile file
) const
264 if (file
== FILE_GPR
|| file
== FILE_ADDRESS
|| file
== FILE_SYSTEM_VALUE
)
270 TargetNVC0::getSVAddress(DataFile shaderFile
, const Symbol
*sym
) const
272 const int idx
= sym
->reg
.data
.sv
.index
;
273 const SVSemantic sv
= sym
->reg
.data
.sv
.sv
;
275 const bool isInput
= shaderFile
== FILE_SHADER_INPUT
;
276 const bool kepler
= getChipset() >= NVISA_GK104_CHIPSET
;
279 case SV_POSITION
: return 0x070 + idx
* 4;
280 case SV_INSTANCE_ID
: return 0x2f8;
281 case SV_VERTEX_ID
: return 0x2fc;
282 case SV_PRIMITIVE_ID
: return isInput
? 0x060 : 0x040;
283 case SV_LAYER
: return 0x064;
284 case SV_VIEWPORT_INDEX
: return 0x068;
285 case SV_POINT_SIZE
: return 0x06c;
286 case SV_CLIP_DISTANCE
: return 0x2c0 + idx
* 4;
287 case SV_POINT_COORD
: return 0x2e0 + idx
* 4;
288 case SV_FACE
: return 0x3fc;
289 case SV_TESS_OUTER
: return 0x000 + idx
* 4;
290 case SV_TESS_INNER
: return 0x010 + idx
* 4;
291 case SV_TESS_COORD
: return 0x2f0 + idx
* 4;
292 case SV_NTID
: return kepler
? (0x00 + idx
* 4) : ~0;
293 case SV_NCTAID
: return kepler
? (0x0c + idx
* 4) : ~0;
294 case SV_GRIDID
: return kepler
? 0x18 : ~0;
295 case SV_SAMPLE_INDEX
: return 0;
296 case SV_SAMPLE_POS
: return 0;
297 case SV_SAMPLE_MASK
: return 0;
304 TargetNVC0::insnCanLoad(const Instruction
*i
, int s
,
305 const Instruction
*ld
) const
307 DataFile sf
= ld
->src(0).getFile();
309 // immediate 0 can be represented by GPR $r63/$r255
310 if (sf
== FILE_IMMEDIATE
&& ld
->getSrc(0)->reg
.data
.u64
== 0)
311 return (!i
->isPseudo() &&
313 i
->op
!= OP_EXPORT
&& i
->op
!= OP_STORE
);
315 if (s
>= opInfo
[i
->op
].srcNr
)
317 if (!(opInfo
[i
->op
].srcFiles
[s
] & (1 << (int)sf
)))
320 // indirect loads can only be done by OP_LOAD/VFETCH/INTERP on nvc0
321 if (ld
->src(0).isIndirect(0))
324 for (int k
= 0; i
->srcExists(k
); ++k
) {
325 if (i
->src(k
).getFile() == FILE_IMMEDIATE
) {
326 if (k
== 2 && i
->op
== OP_SUCLAMP
) // special case
328 if (i
->getSrc(k
)->reg
.data
.u64
!= 0)
331 if (i
->src(k
).getFile() != FILE_GPR
&&
332 i
->src(k
).getFile() != FILE_PREDICATE
) {
337 // not all instructions support full 32 bit immediates
338 if (sf
== FILE_IMMEDIATE
) {
339 Storage
®
= ld
->getSrc(0)->asImm()->reg
;
341 if (typeSizeof(i
->sType
) > 4)
343 if (opInfo
[i
->op
].immdBits
!= 0xffffffff) {
344 if (i
->sType
== TYPE_F32
) {
345 if (reg
.data
.u32
& 0xfff)
348 if (i
->sType
== TYPE_S32
|| i
->sType
== TYPE_U32
) {
349 // with u32, 0xfffff counts as 0xffffffff as well
350 if (reg
.data
.s32
> 0x7ffff || reg
.data
.s32
< -0x80000)
354 if (i
->op
== OP_MAD
|| i
->op
== OP_FMA
) {
355 // requires src == dst, cannot decide before RA
356 // (except if we implement more constraints)
357 if (ld
->getSrc(0)->asImm()->reg
.data
.u32
& 0xfff)
360 if (i
->op
== OP_ADD
&& i
->sType
== TYPE_F32
) {
361 // add f32 LIMM cannot saturate
362 if (i
->saturate
&& (reg
.data
.u32
& 0xfff))
371 TargetNVC0::isAccessSupported(DataFile file
, DataType ty
) const
375 if (file
== FILE_MEMORY_CONST
&& getChipset() >= 0xe0) // wrong encoding ?
376 return typeSizeof(ty
) <= 8;
383 TargetNVC0::isOpSupported(operation op
, DataType ty
) const
385 if ((op
== OP_MAD
|| op
== OP_FMA
) && (ty
!= TYPE_F32
))
387 if (op
== OP_SAD
&& ty
!= TYPE_S32
&& ty
!= TYPE_U32
)
389 if (op
== OP_POW
|| op
== OP_SQRT
|| op
== OP_DIV
|| op
== OP_MOD
)
395 TargetNVC0::isModSupported(const Instruction
*insn
, int s
, Modifier mod
) const
397 if (!isFloatType(insn
->dType
)) {
412 if (insn
->sType
!= TYPE_F32
)
418 if (insn
->src(s
? 0 : 1).mod
.neg())
423 return insn
->src(1).mod
.neg() ? false : true;
431 return (mod
& Modifier(opInfo
[insn
->op
].srcMods
[s
])) == mod
;
435 TargetNVC0::mayPredicate(const Instruction
*insn
, const Value
*pred
) const
437 if (insn
->getPredicate())
439 return opInfo
[insn
->op
].predicate
;
443 TargetNVC0::isSatSupported(const Instruction
*insn
) const
445 if (insn
->op
== OP_CVT
)
447 if (!(opInfo
[insn
->op
].dstMods
& NV50_IR_MOD_SAT
))
450 if (insn
->dType
== TYPE_U32
)
451 return (insn
->op
== OP_ADD
) || (insn
->op
== OP_MAD
);
453 // add f32 LIMM cannot saturate
454 if (insn
->op
== OP_ADD
&& insn
->sType
== TYPE_F32
) {
455 if (insn
->getSrc(1)->asImm() &&
456 insn
->getSrc(1)->reg
.data
.u32
& 0xfff)
460 return insn
->dType
== TYPE_F32
;
464 TargetNVC0::isPostMultiplySupported(operation op
, float f
, int& e
) const
469 e
= static_cast<int>(log2f(f
));
472 return f
== exp2f(static_cast<float>(e
));
475 // TODO: better values
476 // this could be more precise, e.g. depending on the issue-to-read/write delay
477 // of the depending instruction, but it's good enough
478 int TargetNVC0::getLatency(const Instruction
*i
) const
480 if (chipset
>= 0xe4) {
481 if (i
->dType
== TYPE_F64
|| i
->sType
== TYPE_F64
)
488 if (i
->src(0).getFile() == FILE_MEMORY_CONST
)
494 if (Target::getOpClass(i
->op
) == OPCLASS_TEXTURE
)
496 if (i
->op
== OP_MUL
&& i
->dType
!= TYPE_F32
)
501 if (i
->op
== OP_LOAD
) {
502 if (i
->cache
== CACHE_CV
)
511 // These are "inverse" throughput values, i.e. the number of cycles required
512 // to issue a specific instruction for a full warp (32 threads).
514 // Assuming we have more than 1 warp in flight, a higher issue latency results
515 // in a lower result latency since the MP will have spent more time with other
517 // This also helps to determine the number of cycles between instructions in
520 int TargetNVC0::getThroughput(const Instruction
*i
) const
522 // TODO: better values
523 if (i
->dType
== TYPE_F32
) {
550 if (i
->dType
== TYPE_U32
|| i
->dType
== TYPE_S32
) {
573 if (i
->dType
== TYPE_F64
) {
580 bool TargetNVC0::canDualIssue(const Instruction
*a
, const Instruction
*b
) const
582 const OpClass clA
= operationClass
[a
->op
];
583 const OpClass clB
= operationClass
[b
->op
];
585 if (getChipset() >= 0xe4) {
587 // not if the 2nd instruction isn't necessarily executed
588 if (clA
== OPCLASS_TEXTURE
|| clA
== OPCLASS_FLOW
)
591 if (a
->op
== OP_MOV
|| b
->op
== OP_MOV
)
594 // only F32 arith or integer additions
595 if (clA
!= OPCLASS_ARITH
)
597 return (a
->dType
== TYPE_F32
|| a
->op
== OP_ADD
||
598 b
->dType
== TYPE_F32
|| b
->op
== OP_ADD
);
600 // nothing with TEXBAR
601 if (a
->op
== OP_TEXBAR
|| b
->op
== OP_TEXBAR
)
603 // no loads and stores accessing the the same space
604 if ((clA
== OPCLASS_LOAD
&& clB
== OPCLASS_STORE
) ||
605 (clB
== OPCLASS_LOAD
&& clA
== OPCLASS_STORE
))
606 if (a
->src(0).getFile() == b
->src(0).getFile())
609 if (typeSizeof(a
->dType
) > 4 || typeSizeof(b
->dType
) > 4 ||
610 typeSizeof(a
->sType
) > 4 || typeSizeof(b
->sType
) > 4)
614 return false; // info not needed (yet)
618 } // namespace nv50_ir