1 #include "pipe/p_context.h"
2 #include "pipe/p_state.h"
3 #include "util/u_inlines.h"
4 #include "util/u_format.h"
6 #include "nouveau/nouveau_util.h"
7 #include "nv50_context.h"
8 #include "nv50_resource.h"
11 struct nv50_context
*nv50
;
27 void (*push
)(struct nouveau_channel
*, void *);
33 emit_b32_1(struct nouveau_channel
*chan
, void *data
)
41 emit_b32_2(struct nouveau_channel
*chan
, void *data
)
50 emit_b32_3(struct nouveau_channel
*chan
, void *data
)
60 emit_b32_4(struct nouveau_channel
*chan
, void *data
)
71 emit_b16_1(struct nouveau_channel
*chan
, void *data
)
79 emit_b16_3(struct nouveau_channel
*chan
, void *data
)
83 OUT_RING(chan
, (v
[1] << 16) | v
[0]);
88 emit_b08_1(struct nouveau_channel
*chan
, void *data
)
96 emit_b08_3(struct nouveau_channel
*chan
, void *data
)
100 OUT_RING(chan
, (v
[2] << 16) | (v
[1] << 8) | v
[0]);
104 emit_vertex(struct push_context
*ctx
, unsigned n
)
106 struct nouveau_grobj
*tesla
= ctx
->nv50
->screen
->tesla
;
107 struct nouveau_channel
*chan
= tesla
->channel
;
110 if (ctx
->edgeflag_attr
< 16) {
111 float *edgeflag
= ctx
->attr
[ctx
->edgeflag_attr
].map
+
112 ctx
->attr
[ctx
->edgeflag_attr
].stride
* n
;
114 if (*edgeflag
!= ctx
->edgeflag
) {
115 BEGIN_RING(chan
, tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
116 OUT_RING (chan
, *edgeflag
? 1 : 0);
117 ctx
->edgeflag
= *edgeflag
;
121 BEGIN_RING_NI(chan
, tesla
, NV50TCL_VERTEX_DATA
, ctx
->vtx_size
);
122 for (i
= 0; i
< ctx
->attr_nr
; i
++)
123 ctx
->attr
[i
].push(chan
, ctx
->attr
[i
].map
+ ctx
->attr
[i
].stride
* n
);
127 emit_edgeflag(void *priv
, boolean enabled
)
129 struct push_context
*ctx
= priv
;
130 struct nouveau_grobj
*tesla
= ctx
->nv50
->screen
->tesla
;
131 struct nouveau_channel
*chan
= tesla
->channel
;
133 BEGIN_RING(chan
, tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
134 OUT_RING (chan
, enabled
? 1 : 0);
138 emit_elt08(void *priv
, unsigned start
, unsigned count
)
140 struct push_context
*ctx
= priv
;
141 uint8_t *idxbuf
= ctx
->idxbuf
;
144 emit_vertex(ctx
, idxbuf
[start
++]);
148 emit_elt08_biased(void *priv
, unsigned start
, unsigned count
)
150 struct push_context
*ctx
= priv
;
151 uint8_t *idxbuf
= ctx
->idxbuf
;
154 emit_vertex(ctx
, idxbuf
[start
++] + ctx
->idxbias
);
158 emit_elt16(void *priv
, unsigned start
, unsigned count
)
160 struct push_context
*ctx
= priv
;
161 uint16_t *idxbuf
= ctx
->idxbuf
;
164 emit_vertex(ctx
, idxbuf
[start
++]);
168 emit_elt16_biased(void *priv
, unsigned start
, unsigned count
)
170 struct push_context
*ctx
= priv
;
171 uint16_t *idxbuf
= ctx
->idxbuf
;
174 emit_vertex(ctx
, idxbuf
[start
++] + ctx
->idxbias
);
178 emit_elt32(void *priv
, unsigned start
, unsigned count
)
180 struct push_context
*ctx
= priv
;
181 uint32_t *idxbuf
= ctx
->idxbuf
;
184 emit_vertex(ctx
, idxbuf
[start
++]);
188 emit_elt32_biased(void *priv
, unsigned start
, unsigned count
)
190 struct push_context
*ctx
= priv
;
191 uint32_t *idxbuf
= ctx
->idxbuf
;
194 emit_vertex(ctx
, idxbuf
[start
++] + ctx
->idxbias
);
198 emit_verts(void *priv
, unsigned start
, unsigned count
)
201 emit_vertex(priv
, start
++);
205 nv50_push_elements_instanced(struct pipe_context
*pipe
,
206 struct pipe_resource
*idxbuf
,
207 unsigned idxsize
, int idxbias
,
208 unsigned mode
, unsigned start
, unsigned count
,
209 unsigned i_start
, unsigned i_count
)
211 struct nv50_context
*nv50
= nv50_context(pipe
);
212 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
213 struct nouveau_channel
*chan
= tesla
->channel
;
214 struct push_context ctx
;
215 const unsigned p_overhead
= 4 + /* begin/end */
216 4; /* potential edgeflag enable/disable */
217 const unsigned v_overhead
= 1 + /* VERTEX_DATA packet header */
218 2; /* potential edgeflag modification */
219 struct u_split_prim s
;
229 ctx
.edgeflag_attr
= nv50
->vertprog
->cfg
.edgeflag_in
;
231 /* map vertex buffers, determine vertex size */
232 for (i
= 0; i
< nv50
->vtxelt
->num_elements
; i
++) {
233 struct pipe_vertex_element
*ve
= &nv50
->vtxelt
->pipe
[i
];
234 struct pipe_vertex_buffer
*vb
= &nv50
->vtxbuf
[ve
->vertex_buffer_index
];
235 struct nouveau_bo
*bo
= nv50_resource(vb
->buffer
)->bo
;
236 unsigned size
, nr_components
, n
;
238 if (!(nv50
->vbo_fifo
& (1 << i
)))
242 if (nouveau_bo_map(bo
, NOUVEAU_BO_RD
)) {
246 ctx
.attr
[n
].map
= bo
->map
+ vb
->buffer_offset
+ ve
->src_offset
;
247 nouveau_bo_unmap(bo
);
249 ctx
.attr
[n
].stride
= vb
->stride
;
250 ctx
.attr
[n
].divisor
= ve
->instance_divisor
;
251 if (ctx
.attr
[n
].divisor
) {
252 ctx
.attr
[n
].step
= i_start
% ve
->instance_divisor
;
253 ctx
.attr
[n
].map
+= i_start
* vb
->stride
;
256 size
= util_format_get_component_bits(ve
->src_format
,
257 UTIL_FORMAT_COLORSPACE_RGB
, 0);
258 nr_components
= util_format_get_nr_components(ve
->src_format
);
261 switch (nr_components
) {
262 case 1: ctx
.attr
[n
].push
= emit_b08_1
; break;
263 case 2: ctx
.attr
[n
].push
= emit_b16_1
; break;
264 case 3: ctx
.attr
[n
].push
= emit_b08_3
; break;
265 case 4: ctx
.attr
[n
].push
= emit_b32_1
; break;
270 switch (nr_components
) {
271 case 1: ctx
.attr
[n
].push
= emit_b16_1
; break;
272 case 2: ctx
.attr
[n
].push
= emit_b32_1
; break;
273 case 3: ctx
.attr
[n
].push
= emit_b16_3
; break;
274 case 4: ctx
.attr
[n
].push
= emit_b32_2
; break;
276 ctx
.vtx_size
+= (nr_components
+ 1) >> 1;
279 switch (nr_components
) {
280 case 1: ctx
.attr
[n
].push
= emit_b32_1
; break;
281 case 2: ctx
.attr
[n
].push
= emit_b32_2
; break;
282 case 3: ctx
.attr
[n
].push
= emit_b32_3
; break;
283 case 4: ctx
.attr
[n
].push
= emit_b32_4
; break;
285 ctx
.vtx_size
+= nr_components
;
292 vtx_size
= ctx
.vtx_size
+ v_overhead
;
294 /* map index buffer, if present */
296 struct nouveau_bo
*bo
= nv50_resource(idxbuf
)->bo
;
298 if (nouveau_bo_map(bo
, NOUVEAU_BO_RD
)) {
302 ctx
.idxbuf
= bo
->map
;
303 ctx
.idxbias
= idxbias
;
304 ctx
.idxsize
= idxsize
;
305 nouveau_bo_unmap(bo
);
309 s
.edge
= emit_edgeflag
;
312 s
.emit
= idxbias
? emit_elt08_biased
: emit_elt08
;
315 s
.emit
= idxbias
? emit_elt16_biased
: emit_elt16
;
317 s
.emit
= idxbias
? emit_elt32_biased
: emit_elt32
;
321 /* per-instance loop */
322 BEGIN_RING(chan
, tesla
, NV50TCL_CB_ADDR
, 2);
323 OUT_RING (chan
, NV50_CB_AUX
| (24 << 8));
324 OUT_RING (chan
, i_start
);
329 for (i
= 0; i
< ctx
.attr_nr
; i
++) {
330 if (!ctx
.attr
[i
].divisor
||
331 ctx
.attr
[i
].divisor
!= ++ctx
.attr
[i
].step
)
333 ctx
.attr
[i
].step
= 0;
334 ctx
.attr
[i
].map
+= ctx
.attr
[i
].stride
;
337 u_split_prim_init(&s
, mode
, start
, count
);
339 if (AVAIL_RING(chan
) < p_overhead
+ (6 * vtx_size
)) {
341 if (!nv50_state_validate(nv50
, p_overhead
+ (6 * vtx_size
))) {
347 max_verts
= AVAIL_RING(chan
);
348 max_verts
-= p_overhead
;
349 max_verts
/= vtx_size
;
351 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_BEGIN
, 1);
352 OUT_RING (chan
, nv50_prim(s
.mode
) | (nzi
? (1 << 28) : 0));
353 done
= u_split_prim_next(&s
, max_verts
);
354 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_END
, 1);