2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_screen.h"
25 #include "util/u_simple_screen.h"
27 #include "nv50_context.h"
28 #include "nv50_screen.h"
30 #include "nouveau/nouveau_stateobj.h"
32 #define NV5X_GRCLASS5097_CHIPSETS 0x00000001
33 #define NV8X_GRCLASS8297_CHIPSETS 0x00000050
34 #define NV9X_GRCLASS8297_CHIPSETS 0x00000014
37 nv50_screen_is_format_supported(struct pipe_screen
*pscreen
,
38 enum pipe_format format
,
39 enum pipe_texture_target target
,
40 unsigned tex_usage
, unsigned geom_flags
)
42 if (tex_usage
& PIPE_TEXTURE_USAGE_RENDER_TARGET
) {
44 case PIPE_FORMAT_A8R8G8B8_UNORM
:
45 case PIPE_FORMAT_R5G6B5_UNORM
:
46 case PIPE_FORMAT_Z24S8_UNORM
:
47 case PIPE_FORMAT_Z16_UNORM
:
54 case PIPE_FORMAT_A8R8G8B8_UNORM
:
55 case PIPE_FORMAT_A1R5G5B5_UNORM
:
56 case PIPE_FORMAT_A4R4G4B4_UNORM
:
57 case PIPE_FORMAT_R5G6B5_UNORM
:
58 case PIPE_FORMAT_L8_UNORM
:
59 case PIPE_FORMAT_A8_UNORM
:
60 case PIPE_FORMAT_I8_UNORM
:
61 case PIPE_FORMAT_A8L8_UNORM
:
62 case PIPE_FORMAT_DXT1_RGB
:
63 case PIPE_FORMAT_DXT1_RGBA
:
64 case PIPE_FORMAT_DXT3_RGBA
:
65 case PIPE_FORMAT_DXT5_RGBA
:
76 nv50_screen_get_name(struct pipe_screen
*pscreen
)
78 struct nv50_screen
*screen
= nv50_screen(pscreen
);
79 struct nouveau_device
*dev
= screen
->nvws
->channel
->device
;
80 static char buffer
[128];
82 snprintf(buffer
, sizeof(buffer
), "NV%02X", dev
->chipset
);
87 nv50_screen_get_vendor(struct pipe_screen
*pscreen
)
93 nv50_screen_get_param(struct pipe_screen
*pscreen
, int param
)
96 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
98 case PIPE_CAP_NPOT_TEXTURES
:
100 case PIPE_CAP_TWO_SIDED_STENCIL
:
106 case PIPE_CAP_ANISOTROPIC_FILTER
:
108 case PIPE_CAP_POINT_SPRITE
:
110 case PIPE_CAP_MAX_RENDER_TARGETS
:
112 case PIPE_CAP_OCCLUSION_QUERY
:
114 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
116 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
118 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
120 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
122 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
123 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
125 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
127 case NOUVEAU_CAP_HW_VTXBUF
:
129 case NOUVEAU_CAP_HW_IDXBUF
:
132 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
138 nv50_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
141 case PIPE_CAP_MAX_LINE_WIDTH
:
142 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
144 case PIPE_CAP_MAX_POINT_WIDTH
:
145 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
147 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
149 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
152 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
158 nv50_screen_destroy(struct pipe_screen
*pscreen
)
164 nv50_screen_create(struct pipe_winsys
*ws
, struct nouveau_winsys
*nvws
)
166 struct nv50_screen
*screen
= CALLOC_STRUCT(nv50_screen
);
167 struct nouveau_stateobj
*so
;
168 unsigned tesla_class
= 0, ret
;
169 unsigned chipset
= nvws
->channel
->device
->chipset
;
177 ret
= nvws
->grobj_alloc(nvws
, NV50_2D
, &screen
->eng2d
);
179 NOUVEAU_ERR("Error creating 2D object: %d\n", ret
);
180 nv50_screen_destroy(&screen
->pipe
);
185 if ((chipset
& 0xf0) != 0x50 && (chipset
& 0xf0) != 0x80) {
186 NOUVEAU_ERR("Not a G8x chipset\n");
187 nv50_screen_destroy(&screen
->pipe
);
191 switch (chipset
& 0xf0) {
193 if (NV5X_GRCLASS5097_CHIPSETS
& (1 << (chipset
& 0x0f)))
194 tesla_class
= 0x5097;
197 if (NV8X_GRCLASS8297_CHIPSETS
& (1 << (chipset
& 0x0f)))
198 tesla_class
= 0x8297;
201 if (NV9X_GRCLASS8297_CHIPSETS
& (1 << (chipset
& 0x0f)))
202 tesla_class
= 0x8297;
208 if (tesla_class
== 0) {
209 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset
);
210 nv50_screen_destroy(&screen
->pipe
);
214 ret
= nvws
->grobj_alloc(nvws
, tesla_class
, &screen
->tesla
);
216 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
217 nv50_screen_destroy(&screen
->pipe
);
222 ret
= nvws
->notifier_alloc(nvws
, 1, &screen
->sync
);
224 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
225 nv50_screen_destroy(&screen
->pipe
);
231 so_method(so
, screen
->eng2d
, NV50_2D_DMA_NOTIFY
, 4);
232 so_data (so
, screen
->sync
->handle
);
233 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
234 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
235 so_data (so
, screen
->nvws
->channel
->vram
->handle
);
236 so_method(so
, screen
->eng2d
, NV50_2D_OPERATION
, 1);
237 so_data (so
, NV50_2D_OPERATION_SRCCOPY
);
238 so_method(so
, screen
->eng2d
, 0x0290, 1);
240 so_method(so
, screen
->eng2d
, 0x0888, 1);
245 /* Static tesla init */
246 so
= so_new(256, 20);
248 so_method(so
, screen
->tesla
, 0x1558, 1);
250 so_method(so
, screen
->tesla
, NV50TCL_DMA_NOTIFY
, 1);
251 so_data (so
, screen
->sync
->handle
);
252 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK0(0),
253 NV50TCL_DMA_UNK0__SIZE
);
254 for (i
= 0; i
< NV50TCL_DMA_UNK0__SIZE
; i
++)
255 so_data(so
, nvws
->channel
->vram
->handle
);
256 so_method(so
, screen
->tesla
, NV50TCL_DMA_UNK1(0),
257 NV50TCL_DMA_UNK1__SIZE
);
258 for (i
= 0; i
< NV50TCL_DMA_UNK1__SIZE
; i
++)
259 so_data(so
, nvws
->channel
->vram
->handle
);
260 so_method(so
, screen
->tesla
, 0x121c, 1);
263 so_method(so
, screen
->tesla
, 0x13bc, 1);
265 so_method(so
, screen
->tesla
, 0x13ac, 1);
267 so_method(so
, screen
->tesla
, 0x16b8, 1);
270 /* Shared constant buffer */
271 screen
->constbuf
= ws
->buffer_create(ws
, 0, 0, 128 * 4 * 4);
272 if (nvws
->res_init(&screen
->vp_data_heap
, 0, 128)) {
273 NOUVEAU_ERR("Error initialising constant buffer\n");
274 nv50_screen_destroy(&screen
->pipe
);
278 so_method(so
, screen
->tesla
, 0x1280, 3);
279 so_reloc (so
, screen
->constbuf
, 0, NOUVEAU_BO_VRAM
|
280 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
281 so_reloc (so
, screen
->constbuf
, 0, NOUVEAU_BO_VRAM
|
282 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
283 so_data (so
, (NV50_CB_PMISC
<< 16) | 0x00001000);
285 /* Texture sampler/image unit setup - we abuse the constant buffer
286 * upload mechanism for the moment to upload data to the tex config
287 * blocks. At some point we *may* want to go the NVIDIA way of doing
290 screen
->tic
= ws
->buffer_create(ws
, 0, 0, 32 * 8 * 4);
291 so_method(so
, screen
->tesla
, 0x1280, 3);
292 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
293 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
294 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
295 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
296 so_data (so
, (NV50_CB_TIC
<< 16) | 0x0800);
297 so_method(so
, screen
->tesla
, 0x1574, 3);
298 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
299 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
300 so_reloc (so
, screen
->tic
, 0, NOUVEAU_BO_VRAM
|
301 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
302 so_data (so
, 0x00000800);
304 screen
->tsc
= ws
->buffer_create(ws
, 0, 0, 32 * 8 * 4);
305 so_method(so
, screen
->tesla
, 0x1280, 3);
306 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
307 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
308 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
309 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
310 so_data (so
, (NV50_CB_TSC
<< 16) | 0x0800);
311 so_method(so
, screen
->tesla
, 0x155c, 3);
312 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
313 NOUVEAU_BO_RD
| NOUVEAU_BO_HIGH
, 0, 0);
314 so_reloc (so
, screen
->tsc
, 0, NOUVEAU_BO_VRAM
|
315 NOUVEAU_BO_RD
| NOUVEAU_BO_LOW
, 0, 0);
316 so_data (so
, 0x00000800);
319 /* Vertex array limits - max them out */
320 for (i
= 0; i
< 16; i
++) {
321 so_method(so
, screen
->tesla
, 0x1080 + (i
* 8), 2);
322 so_data (so
, 0x000000ff);
323 so_data (so
, 0xffffffff);
326 so_method(so
, screen
->tesla
, NV50TCL_DEPTH_RANGE_NEAR
, 2);
327 so_data (so
, fui(0.0));
328 so_data (so
, fui(1.0));
330 so_method(so
, screen
->tesla
, 0x1234, 1);
332 so_method(so
, screen
->tesla
, 0x1458, 1);
336 so_ref(so
, &screen
->static_init
);
337 nvws
->push_flush(nvws
, 0, NULL
);
339 screen
->pipe
.winsys
= ws
;
341 screen
->pipe
.destroy
= nv50_screen_destroy
;
343 screen
->pipe
.get_name
= nv50_screen_get_name
;
344 screen
->pipe
.get_vendor
= nv50_screen_get_vendor
;
345 screen
->pipe
.get_param
= nv50_screen_get_param
;
346 screen
->pipe
.get_paramf
= nv50_screen_get_paramf
;
348 screen
->pipe
.is_format_supported
= nv50_screen_is_format_supported
;
350 nv50_screen_init_miptree_functions(&screen
->pipe
);
351 nv50_surface_init_screen_functions(&screen
->pipe
);
352 u_simple_screen_init(&screen
->pipe
);
354 return &screen
->pipe
;