2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "nv50_context.h"
24 #include "nv50_texture.h"
26 #include "nouveau/nouveau_stateobj.h"
27 #include "nouveau/nouveau_reloc.h"
29 #include "util/u_format.h"
31 #define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f) \
34 NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 | \
35 NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 | \
36 NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 | \
37 NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 | \
41 #define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
43 struct nv50_texture_format
{
48 #define NV50_TEX_FORMAT_LIST_SIZE \
49 (sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format))
51 static const struct nv50_texture_format nv50_tex_format_list
[] =
53 _(B8G8R8A8_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 8_8_8_8
),
54 _(B8G8R8A8_SRGB
, UNORM
, C2
, C1
, C0
, C3
, 8_8_8_8
),
55 _(B8G8R8X8_UNORM
, UNORM
, C2
, C1
, C0
, ONE
, 8_8_8_8
),
56 _(B8G8R8X8_SRGB
, UNORM
, C2
, C1
, C0
, ONE
, 8_8_8_8
),
57 _(B5G5R5A1_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 1_5_5_5
),
58 _(B4G4R4A4_UNORM
, UNORM
, C2
, C1
, C0
, C3
, 4_4_4_4
),
60 _(B5G6R5_UNORM
, UNORM
, C2
, C1
, C0
, ONE
, 5_6_5
),
62 _(L8_UNORM
, UNORM
, C0
, C0
, C0
, ONE
, 8),
63 _(A8_UNORM
, UNORM
, ZERO
, ZERO
, ZERO
, C0
, 8),
64 _(I8_UNORM
, UNORM
, C0
, C0
, C0
, C0
, 8),
66 _(L8A8_UNORM
, UNORM
, C0
, C0
, C0
, C1
, 8_8
),
68 _(DXT1_RGB
, UNORM
, C0
, C1
, C2
, ONE
, DXT1
),
69 _(DXT1_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT1
),
70 _(DXT3_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT3
),
71 _(DXT5_RGBA
, UNORM
, C0
, C1
, C2
, C3
, DXT5
),
73 _MIXED(S8Z24_UNORM
, UINT
, UNORM
, UINT
, UINT
, C1
, C1
, C1
, ONE
, 24_8
),
74 _MIXED(Z24S8_UNORM
, UNORM
, UINT
, UINT
, UINT
, C0
, C0
, C0
, ONE
, 8_24
),
76 _(R16G16B16A16_SNORM
, UNORM
, C0
, C1
, C2
, C3
, 16_16_16_16
),
77 _(R16G16B16A16_UNORM
, SNORM
, C0
, C1
, C2
, C3
, 16_16_16_16
),
78 _(R32G32B32A32_FLOAT
, FLOAT
, C0
, C1
, C2
, C3
, 32_32_32_32
),
80 _(R16G16_SNORM
, SNORM
, C0
, C1
, ZERO
, ONE
, 16_16
),
81 _(R16G16_UNORM
, UNORM
, C0
, C1
, ZERO
, ONE
, 16_16
),
83 _MIXED(Z32_FLOAT
, FLOAT
, UINT
, UINT
, UINT
, C0
, C0
, C0
, ONE
, 32_DEPTH
)
91 nv50_tex_construct(struct nv50_context
*nv50
, struct nouveau_stateobj
*so
,
92 struct nv50_miptree
*mt
, int unit
, unsigned p
)
96 const struct util_format_description
*desc
;
98 for (i
= 0; i
< NV50_TEX_FORMAT_LIST_SIZE
; i
++)
99 if (nv50_tex_format_list
[i
].pf
== mt
->base
.base
.format
)
101 if (i
== NV50_TEX_FORMAT_LIST_SIZE
)
104 if (nv50
->sampler
[p
][unit
]->normalized
)
105 mode
= 0x50001000 | (1 << 31);
107 mode
= 0x50001000 | (7 << 14);
108 assert(mt
->base
.base
.target
== PIPE_TEXTURE_2D
);
111 mode
|= ((mt
->base
.bo
->tile_mode
& 0x0f) << 22) |
112 ((mt
->base
.bo
->tile_mode
& 0xf0) << 21);
114 desc
= util_format_description(mt
->base
.base
.format
);
117 if (desc
->colorspace
== UTIL_FORMAT_COLORSPACE_SRGB
)
120 switch (mt
->base
.base
.target
) {
121 case PIPE_TEXTURE_1D
:
123 case PIPE_TEXTURE_2D
:
126 case PIPE_TEXTURE_3D
:
129 case PIPE_TEXTURE_CUBE
:
133 assert(!"unsupported texture target");
137 so_data (so
, nv50_tex_format_list
[i
].hw
);
138 so_reloc(so
, mt
->base
.bo
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_LOW
|
139 NOUVEAU_BO_RD
, 0, 0);
140 so_reloc(so
, mt
->base
.bo
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_HIGH
|
141 NOUVEAU_BO_RD
| NOUVEAU_BO_OR
, mode
, mode
);
142 so_data (so
, 0x00300000);
143 so_data (so
, mt
->base
.base
.width0
| (1 << 31));
144 so_data (so
, (mt
->base
.base
.last_level
<< 28) |
145 (mt
->base
.base
.depth0
<< 16) | mt
->base
.base
.height0
);
146 so_data (so
, 0x03000000);
147 so_data (so
, mt
->base
.base
.last_level
<< 4);
152 #ifndef NV50TCL_BIND_TIC
153 #define NV50TCL_BIND_TIC(n) (0x1448 + 8 * n)
157 nv50_validate_textures(struct nv50_context
*nv50
, struct nouveau_stateobj
*so
,
160 static const unsigned p_remap
[PIPE_SHADER_TYPES
] = { 0, 2, 1 };
162 struct nouveau_grobj
*eng2d
= nv50
->screen
->eng2d
;
163 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
164 unsigned unit
, j
, p_hw
= p_remap
[p
];
166 nv50_so_init_sifc(nv50
, so
, nv50
->screen
->tic
, NOUVEAU_BO_VRAM
,
167 p
* (32 * 8 * 4), nv50
->miptree_nr
[p
] * 8 * 4);
169 for (unit
= 0; unit
< nv50
->miptree_nr
[p
]; ++unit
) {
170 struct nv50_miptree
*mt
= nv50
->miptree
[p
][unit
];
172 so_method(so
, eng2d
, NV50_2D_SIFC_DATA
| (2 << 29), 8);
174 if (nv50_tex_construct(nv50
, so
, mt
, unit
, p
))
176 /* Set TEX insn $t src binding $unit in program type p
177 * to TIC, TSC entry (32 * p + unit), mark valid (1).
179 so_method(so
, tesla
, NV50TCL_BIND_TIC(p_hw
), 1);
180 so_data (so
, ((32 * p
+ unit
) << 9) | (unit
<< 1) | 1);
182 for (j
= 0; j
< 8; ++j
)
184 so_method(so
, tesla
, NV50TCL_BIND_TIC(p_hw
), 1);
185 so_data (so
, (unit
<< 1) | 0);
189 for (; unit
< nv50
->state
.miptree_nr
[p
]; unit
++) {
190 /* Make other bindings invalid. */
191 so_method(so
, tesla
, NV50TCL_BIND_TIC(p_hw
), 1);
192 so_data (so
, (unit
<< 1) | 0);
195 nv50
->state
.miptree_nr
[p
] = nv50
->miptree_nr
[p
];
200 nv50_tex_relocs(struct nv50_context
*nv50
)
202 struct nouveau_channel
*chan
= nv50
->screen
->tesla
->channel
;
205 p
= PIPE_SHADER_FRAGMENT
;
206 for (unit
= 0; unit
< nv50
->miptree_nr
[p
]; unit
++) {
207 if (!nv50
->miptree
[p
][unit
])
209 nouveau_reloc_emit(chan
, nv50
->screen
->tic
,
210 ((p
* 32) + unit
) * 32, NULL
,
211 nv50
->miptree
[p
][unit
]->base
.bo
, 0, 0,
212 NOUVEAU_BO_VRAM
| NOUVEAU_BO_LOW
|
213 NOUVEAU_BO_RD
, 0, 0);
216 p
= PIPE_SHADER_VERTEX
;
217 for (unit
= 0; unit
< nv50
->miptree_nr
[p
]; unit
++) {
218 if (!nv50
->miptree
[p
][unit
])
220 nouveau_reloc_emit(chan
, nv50
->screen
->tic
,
221 ((p
* 32) + unit
) * 32, NULL
,
222 nv50
->miptree
[p
][unit
]->base
.bo
, 0, 0,
223 NOUVEAU_BO_VRAM
| NOUVEAU_BO_LOW
|
224 NOUVEAU_BO_RD
, 0, 0);
228 struct nouveau_stateobj
*
229 nv50_tex_validate(struct nv50_context
*nv50
)
231 struct nouveau_stateobj
*so
;
232 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
233 unsigned p
, start
, push
, nrlc
;
235 for (nrlc
= 0, start
= 0, push
= 0, p
= 0; p
< PIPE_SHADER_TYPES
; ++p
) {
236 start
+= MAX2(nv50
->miptree_nr
[p
], nv50
->state
.miptree_nr
[p
]);
237 push
+= MAX2(nv50
->miptree_nr
[p
], nv50
->state
.miptree_nr
[p
]);
238 nrlc
+= nv50
->miptree_nr
[p
];
240 start
= start
* 2 + 4 * PIPE_SHADER_TYPES
+ 2;
241 push
= push
* 9 + 19 * PIPE_SHADER_TYPES
+ 2;
242 nrlc
= nrlc
* 2 + 2 * PIPE_SHADER_TYPES
;
244 so
= so_new(start
, push
, nrlc
);
246 if (nv50_validate_textures(nv50
, so
, PIPE_SHADER_VERTEX
) == FALSE
||
247 nv50_validate_textures(nv50
, so
, PIPE_SHADER_FRAGMENT
) == FALSE
) {
250 NOUVEAU_ERR("failed tex validate\n");
254 so_method(so
, tesla
, 0x1330, 1); /* flush TIC */