src/gallium/drivers/nv50/nv50_tex.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "nv50_context.h"
  24 #include "nv50_texture.h"
  25
  26 #include "nouveau/nouveau_stateobj.h"
  27 #include "nouveau/nouveau_reloc.h"
  28
  29 #include "util/u_format.h"
  30
  31 #define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f)           \
  32 [PIPE_FORMAT_##pf] = (                                          \
  33         NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 |        \
  34         NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 |        \
  35         NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 |        \
  36         NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 |        \
  37         NV50TIC_0_0_FMT_##f)
  38
  39 #define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
  40
  41 static const uint32_t nv50_texture_formats[PIPE_FORMAT_COUNT] =
  42 {
  43         _(B8G8R8A8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
  44         _(B8G8R8A8_SRGB,  UNORM, C2, C1, C0, C3,  8_8_8_8),
  45         _(B8G8R8X8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
  46         _(B8G8R8X8_SRGB,  UNORM, C2, C1, C0, ONE, 8_8_8_8),
  47         _(B5G5R5A1_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
  48         _(B4G4R4A4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
  49
  50         _(B5G6R5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5),
  51
  52         _(L8_UNORM, UNORM, C0, C0, C0, ONE, 8),
  53         _(L8_SRGB,  UNORM, C0, C0, C0, ONE, 8),
  54         _(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
  55         _(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
  56
  57         _(L8A8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
  58         _(L8A8_SRGB,  UNORM, C0, C0, C0, C1, 8_8),
  59
  60         _(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
  61         _(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
  62         _(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3),
  63         _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5),
  64
  65         _MIXED(S8Z24_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8),
  66         _MIXED(Z24S8_UNORM, UNORM, UINT, UINT, UINT, C0, C0, C0, ONE, 8_24),
  67
  68         _(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16),
  69         _(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16),
  70         _(R32G32B32A32_FLOAT, FLOAT, C0, C1, C2, C3, 32_32_32_32),
  71
  72         _(R16G16_SNORM, SNORM, C0, C1, ZERO, ONE, 16_16),
  73         _(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16),
  74
  75         _MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH)
  76 };
  77
  78 #undef _
  79 #undef _MIXED
  80
  81 static INLINE uint32_t
  82 nv50_tic_swizzle(uint32_t tc, unsigned swz)
  83 {
  84         switch (swz) {
  85         case PIPE_SWIZZLE_RED:
  86                 return (tc & NV50TIC_0_0_MAPR_MASK) >> NV50TIC_0_0_MAPR_SHIFT;
  87         case PIPE_SWIZZLE_GREEN:
  88                 return (tc & NV50TIC_0_0_MAPG_MASK) >> NV50TIC_0_0_MAPG_SHIFT;
  89         case PIPE_SWIZZLE_BLUE:
  90                 return (tc & NV50TIC_0_0_MAPB_MASK) >> NV50TIC_0_0_MAPB_SHIFT;
  91         case PIPE_SWIZZLE_ALPHA:
  92                 return (tc & NV50TIC_0_0_MAPA_MASK) >> NV50TIC_0_0_MAPA_SHIFT;
  93         case PIPE_SWIZZLE_ONE:
  94                 return 7;
  95         case PIPE_SWIZZLE_ZERO:
  96         default:
  97                 return 0;
  98         }
  99 }
 100
 101 boolean
 102 nv50_tex_construct(struct nv50_sampler_view *view)
 103 {
 104         const struct util_format_description *desc;
 105         struct nv50_miptree *mt = nv50_miptree(view->pipe.texture);
 106         uint32_t swz[4], *tic = view->tic;
 107
 108         tic[0] = nv50_texture_formats[view->pipe.format];
 109
 110         swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
 111         swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
 112         swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b);
 113         swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a);
 114         view->tic[0] = (tic[0] &  ~NV50TIC_0_0_SWIZZLE_MASK) |
 115                 (swz[0] << NV50TIC_0_0_MAPR_SHIFT) |
 116                 (swz[1] << NV50TIC_0_0_MAPG_SHIFT) |
 117                 (swz[2] << NV50TIC_0_0_MAPB_SHIFT) |
 118                 (swz[3] << NV50TIC_0_0_MAPA_SHIFT);
 119
 120         tic[2] = 0x50001000;
 121         tic[2] |= ((mt->base.bo->tile_mode & 0x0f) << 22) |
 122                   ((mt->base.bo->tile_mode & 0xf0) << 21);
 123
 124         desc = util_format_description(mt->base.base.format);
 125         if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
 126                 tic[2] |= NV50TIC_0_2_COLORSPACE_SRGB;
 127
 128         switch (mt->base.base.target) {
 129         case PIPE_TEXTURE_1D:
 130                 tic[2] |= NV50TIC_0_2_TARGET_1D;
 131                 break;
 132         case PIPE_TEXTURE_2D:
 133                 tic[2] |= NV50TIC_0_2_TARGET_2D;
 134                 break;
 135         case PIPE_TEXTURE_3D:
 136                 tic[2] |= NV50TIC_0_2_TARGET_3D;
 137                 break;
 138         case PIPE_TEXTURE_CUBE:
 139                 tic[2] |= NV50TIC_0_2_TARGET_CUBE;
 140                 break;
 141         default:
 142                 NOUVEAU_ERR("invalid texture target: %d\n",
 143                             mt->base.base.target);
 144                 return FALSE;
 145         }
 146
 147         tic[3] = 0x00300000;
 148
 149         tic[4] = (1 << 31) | mt->base.base.width0;
 150         tic[5] = (mt->base.base.last_level << 28) |
 151                 (mt->base.base.depth0 << 16) | mt->base.base.height0;
 152
 153         tic[6] = 0x03000000;
 154
 155         tic[7] = (view->pipe.last_level << 4) | view->pipe.first_level;
 156
 157         return TRUE;
 158 }
 159
 160 static int
 161 nv50_validate_textures(struct nv50_context *nv50, struct nouveau_stateobj *so,
 162                        unsigned p)
 163 {
 164         struct nouveau_grobj *eng2d = nv50->screen->eng2d;
 165         struct nouveau_grobj *tesla = nv50->screen->tesla;
 166         unsigned unit, j;
 167
 168         const unsigned rll = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW;
 169         const unsigned rlh = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH
 170                 | NOUVEAU_BO_OR;
 171
 172         nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM,
 173                           p * (32 * 8 * 4), nv50->sampler_view_nr[p] * 8 * 4);
 174
 175         for (unit = 0; unit < nv50->sampler_view_nr[p]; ++unit) {
 176                 struct nv50_sampler_view *view =
 177                         nv50_sampler_view(nv50->sampler_views[p][unit]);
 178
 179                 so_method(so, eng2d, NV50_2D_SIFC_DATA | (2 << 29), 8);
 180                 if (view) {
 181                         uint32_t tic2 = view->tic[2];
 182                         struct nv50_miptree *mt =
 183                                 nv50_miptree(view->pipe.texture);
 184
 185                         if (nv50->sampler[p][unit]->normalized)
 186                                 tic2 |= NV50TIC_0_2_NORMALIZED_COORDS;
 187
 188                         so_data  (so, view->tic[0]);
 189                         so_reloc (so, mt->base.bo, 0, rll, 0, 0);
 190                         so_reloc (so, mt->base.bo, 0, rlh, tic2, tic2);
 191                         so_datap (so, &view->tic[3], 5);
 192
 193                         /* Set TEX insn $t src binding $unit in program type p
 194                          * to TIC, TSC entry (32 * p + unit), mark valid (1).
 195                          */
 196                         so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
 197                         so_data  (so, ((32 * p + unit) << 9) | (unit << 1) | 1);
 198                 } else {
 199                         for (j = 0; j < 8; ++j)
 200                                 so_data(so, 0);
 201                         so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
 202                         so_data  (so, (unit << 1) | 0);
 203                 }
 204         }
 205
 206         for (; unit < nv50->state.sampler_view_nr[p]; unit++) {
 207                 /* Make other bindings invalid. */
 208                 so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
 209                 so_data  (so, (unit << 1) | 0);
 210         }
 211
 212         nv50->state.sampler_view_nr[p] = nv50->sampler_view_nr[p];
 213         return TRUE;
 214 }
 215
 216 void
 217 nv50_tex_relocs(struct nv50_context *nv50)
 218 {
 219         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 220         int p, unit;
 221
 222         p = PIPE_SHADER_FRAGMENT;
 223         for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
 224                 struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
 225                 if (!view)
 226                         continue;
 227                 nouveau_reloc_emit(chan, nv50->screen->tic,
 228                                    ((p * 32) + unit) * 32, NULL,
 229                                    nv50_miptree(view->texture)->base.bo, 0, 0,
 230                                    NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
 231                                    NOUVEAU_BO_RD, 0, 0);
 232         }
 233
 234         p = PIPE_SHADER_VERTEX;
 235         for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
 236                 struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
 237                 if (!view)
 238                         continue;
 239                 nouveau_reloc_emit(chan, nv50->screen->tic,
 240                                    ((p * 32) + unit) * 32, NULL,
 241                                    nv50_miptree(view->texture)->base.bo, 0, 0,
 242                                    NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
 243                                    NOUVEAU_BO_RD, 0, 0);
 244         }
 245 }
 246
 247 struct nouveau_stateobj *
 248 nv50_tex_validate(struct nv50_context *nv50)
 249 {
 250         struct nouveau_stateobj *so;
 251         struct nouveau_grobj *tesla = nv50->screen->tesla;
 252         unsigned p, m = 0, d = 0, r = 0;
 253
 254         for (p = 0; p < 3; ++p) {
 255                 unsigned nr = MAX2(nv50->sampler_view_nr[p],
 256                                    nv50->state.sampler_view_nr[p]);
 257                 m += nr;
 258                 d += nr;
 259                 r += nv50->sampler_view_nr[p];
 260         }
 261         m = m * 2 + 3 * 4 + 1;
 262         d = d * 9 + 3 * 19 + 1;
 263         r = r * 2 + 3 * 2;
 264
 265         so = so_new(m, d, r);
 266
 267         if (nv50_validate_textures(nv50, so, 0) == FALSE ||
 268             nv50_validate_textures(nv50, so, 2) == FALSE) {
 269                 so_ref(NULL, &so);
 270
 271                 NOUVEAU_ERR("failed tex validate\n");
 272                 return NULL;
 273         }
 274
 275         so_method(so, tesla, 0x1330, 1); /* flush TIC */
 276         so_data  (so, 0);
 277
 278         return so;
 279 }